Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 3.8K May 29 16:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 29 16:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 28 11:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 28 11:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 28 09:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.0K May 28 07:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.8K May 27 05:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 27 05:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 26 06:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 26 06:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 921K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ASLink-PT-06b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749149500107
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ASLink-PT-06b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527813390038

Flatten gal took : 737 ms
Constant places removed 1 places and 1 transitions.
Performed 1312 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1313 rules applied. Total rules applied 1313 place count 2825 transition count 2200
Constant places removed 1396 places and 2 transitions.
Reduce isomorphic transitions removed 22 transitions.
Implicit places reduction removed 12 places :[p2555, p2427, p2032, p2006, p1637, p1611, p1242, p1216, p847, p821, p452, p426]
Performed 82 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 1512 rules applied. Total rules applied 2825 place count 1417 transition count 2094
Constant places removed 94 places and 0 transitions.
Performed 30 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 124 rules applied. Total rules applied 2949 place count 1323 transition count 2064
Constant places removed 30 places and 0 transitions.
Implicit places reduction removed 11 places :[p2396, p2382, p2001, p1987, p1606, p1592, p1211, p1197, p816, p802, p407]
Performed 11 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 52 rules applied. Total rules applied 3001 place count 1282 transition count 2053
Constant places removed 11 places and 0 transitions.
Iterating post reduction 4 with 11 rules applied. Total rules applied 3012 place count 1271 transition count 2053
Performed 197 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 5 with 197 Pre rules applied. Total rules applied 3012 place count 1271 transition count 1856
Constant places removed 198 places and 0 transitions.
Implicit places reduction removed 1 places :[p421]
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 5 with 200 rules applied. Total rules applied 3212 place count 1072 transition count 1855
Constant places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 3213 place count 1071 transition count 1855
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 7 with 1 Pre rules applied. Total rules applied 3213 place count 1071 transition count 1854
Constant places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 3214 place count 1070 transition count 1854
Symmetric choice reduction at 8 with 23 rule applications. Total rules 3237 place count 1070 transition count 1854
Constant places removed 23 places and 23 transitions.
Reduce isomorphic transitions removed 1 transitions.
Implicit places reduction removed 1 places :[p2825]
Performed 9 Post agglomeration using F-continuation condition.
Iterating post reduction 8 with 34 rules applied. Total rules applied 3271 place count 1046 transition count 1821
Constant places removed 10 places and 0 transitions.
Iterating post reduction 9 with 10 rules applied. Total rules applied 3281 place count 1036 transition count 1821
Symmetric choice reduction at 10 with 14 rule applications. Total rules 3295 place count 1036 transition count 1821
Constant places removed 14 places and 52 transitions.
Reduce isomorphic transitions removed 1 transitions.
Implicit places reduction removed 7 places :[p2564, p2368, p1973, p1578, p1183, p788, p393]
Performed 15 Post agglomeration using F-continuation condition.
Iterating post reduction 10 with 37 rules applied. Total rules applied 3332 place count 1015 transition count 1753
Constant places removed 15 places and 0 transitions.
Iterating post reduction 11 with 15 rules applied. Total rules applied 3347 place count 1000 transition count 1753
Symmetric choice reduction at 12 with 7 rule applications. Total rules 3354 place count 1000 transition count 1753
Constant places removed 7 places and 14 transitions.
Iterating post reduction 12 with 7 rules applied. Total rules applied 3361 place count 993 transition count 1739
Symmetric choice reduction at 13 with 1 rule applications. Total rules 3362 place count 993 transition count 1739
Constant places removed 1 places and 8 transitions.
Iterating post reduction 13 with 1 rules applied. Total rules applied 3363 place count 992 transition count 1731
Symmetric choice reduction at 14 with 1 rule applications. Total rules 3364 place count 992 transition count 1731
Constant places removed 1 places and 8 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 3365 place count 991 transition count 1723
Symmetric choice reduction at 15 with 1 rule applications. Total rules 3366 place count 991 transition count 1723
Constant places removed 1 places and 8 transitions.
Iterating post reduction 15 with 1 rules applied. Total rules applied 3367 place count 990 transition count 1715
Symmetric choice reduction at 16 with 1 rule applications. Total rules 3368 place count 990 transition count 1715
Constant places removed 1 places and 8 transitions.
Iterating post reduction 16 with 1 rules applied. Total rules applied 3369 place count 989 transition count 1707
Symmetric choice reduction at 17 with 1 rule applications. Total rules 3370 place count 989 transition count 1707
Constant places removed 1 places and 8 transitions.
Iterating post reduction 17 with 1 rules applied. Total rules applied 3371 place count 988 transition count 1699
Symmetric choice reduction at 18 with 1 rule applications. Total rules 3372 place count 988 transition count 1699
Constant places removed 1 places and 8 transitions.
Iterating post reduction 18 with 1 rules applied. Total rules applied 3373 place count 987 transition count 1691
Symmetric choice reduction at 19 with 1 rule applications. Total rules 3374 place count 987 transition count 1691
Constant places removed 1 places and 8 transitions.
Iterating post reduction 19 with 1 rules applied. Total rules applied 3375 place count 986 transition count 1683
Symmetric choice reduction at 20 with 1 rule applications. Total rules 3376 place count 986 transition count 1683
Constant places removed 1 places and 8 transitions.
Iterating post reduction 20 with 1 rules applied. Total rules applied 3377 place count 985 transition count 1675
Symmetric choice reduction at 21 with 1 rule applications. Total rules 3378 place count 985 transition count 1675
Constant places removed 1 places and 8 transitions.
Iterating post reduction 21 with 1 rules applied. Total rules applied 3379 place count 984 transition count 1667
Symmetric choice reduction at 22 with 1 rule applications. Total rules 3380 place count 984 transition count 1667
Constant places removed 1 places and 8 transitions.
Iterating post reduction 22 with 1 rules applied. Total rules applied 3381 place count 983 transition count 1659
Symmetric choice reduction at 23 with 1 rule applications. Total rules 3382 place count 983 transition count 1659
Constant places removed 1 places and 8 transitions.
Iterating post reduction 23 with 1 rules applied. Total rules applied 3383 place count 982 transition count 1651
Symmetric choice reduction at 24 with 1 rule applications. Total rules 3384 place count 982 transition count 1651
Constant places removed 1 places and 8 transitions.
Iterating post reduction 24 with 1 rules applied. Total rules applied 3385 place count 981 transition count 1643
Symmetric choice reduction at 25 with 1 rule applications. Total rules 3386 place count 981 transition count 1643
Constant places removed 1 places and 8 transitions.
Iterating post reduction 25 with 1 rules applied. Total rules applied 3387 place count 980 transition count 1635
Symmetric choice reduction at 26 with 1 rule applications. Total rules 3388 place count 980 transition count 1635
Constant places removed 1 places and 8 transitions.
Iterating post reduction 26 with 1 rules applied. Total rules applied 3389 place count 979 transition count 1627
Symmetric choice reduction at 27 with 1 rule applications. Total rules 3390 place count 979 transition count 1627
Constant places removed 1 places and 8 transitions.
Iterating post reduction 27 with 1 rules applied. Total rules applied 3391 place count 978 transition count 1619
Performed 69 Post agglomeration using F-continuation condition.
Constant places removed 69 places and 0 transitions.
Iterating post reduction 28 with 69 rules applied. Total rules applied 3460 place count 909 transition count 1544
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 1 places and 0 transitions.
Iterating post reduction 29 with 1 rules applied. Total rules applied 3461 place count 908 transition count 1553
Applied a total of 3461 rules in 2507 ms. Remains 908 /2826 variables (removed 1918) and now considering 1553/3513 (removed 1960) transitions.
// Phase 1: matrix 1553 rows 908 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 3 ordering constraints for composite.
built 1435 ordering constraints for composite.
built 1178 ordering constraints for composite.
built 970 ordering constraints for composite.
built 762 ordering constraints for composite.
built 554 ordering constraints for composite.
built 346 ordering constraints for composite.
built 140 ordering constraints for composite.
built 138 ordering constraints for composite.
built 336 ordering constraints for composite.
built 336 ordering constraints for composite.
built 342 ordering constraints for composite.
built 342 ordering constraints for composite.
built 342 ordering constraints for composite.
built 342 ordering constraints for composite.
built 342 ordering constraints for composite.
built 342 ordering constraints for composite.
built 342 ordering constraints for composite.
built 342 ordering constraints for composite.
built 391 ordering constraints for composite.
built 391 ordering constraints for composite.
built 293 ordering constraints for composite.
built 266 ordering constraints for composite.
built 264 ordering constraints for composite.
built 255 ordering constraints for composite.
built 111 ordering constraints for composite.
built 5 ordering constraints for composite.
Compilation finished in 23165 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 130 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 12:36:32 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 12:36:32 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 12:36:33 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 343 ms
Jun 01, 2018 12:36:33 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2826 places.
Jun 01, 2018 12:36:33 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3513 transitions.
Jun 01, 2018 12:36:33 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 01, 2018 12:36:33 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 73 ms
Jun 01, 2018 12:36:34 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 730 ms
Jun 01, 2018 12:36:34 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 27 ms
Jun 01, 2018 12:36:34 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3513 transitions.
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1553 transitions.
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (1553) to apply POR reductions. Disabling POR matrices.
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 261 ms
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 421ms conformant to PINS in folder :/home/mcc/execution
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 206 ms
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 203 ms
Jun 01, 2018 12:36:39 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 12:36:44 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 2134 redundant transitions.
Jun 01, 2018 12:36:44 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 38 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ASLink-PT-06b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ASLink-PT-06b.tgz
mv ASLink-PT-06b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ASLink-PT-06b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749149500107"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;