fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r273-smll-152749149500040
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for ASLink-PT-03a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.590 177291.00 185672.00 665.90 [undef] Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 532K
-rw-r--r-- 1 mcc users 3.9K May 29 16:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 29 16:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 28 11:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 28 11:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 28 09:21 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.8K May 28 09:21 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 28 07:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.4K May 27 05:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 27 05:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 26 06:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 26 06:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 357K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ASLink-PT-03a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749149500040

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ASLink-PT-03a-CTLFireability-00
FORMULA_NAME ASLink-PT-03a-CTLFireability-01
FORMULA_NAME ASLink-PT-03a-CTLFireability-02
FORMULA_NAME ASLink-PT-03a-CTLFireability-03
FORMULA_NAME ASLink-PT-03a-CTLFireability-04
FORMULA_NAME ASLink-PT-03a-CTLFireability-05
FORMULA_NAME ASLink-PT-03a-CTLFireability-06
FORMULA_NAME ASLink-PT-03a-CTLFireability-07
FORMULA_NAME ASLink-PT-03a-CTLFireability-08
FORMULA_NAME ASLink-PT-03a-CTLFireability-09
FORMULA_NAME ASLink-PT-03a-CTLFireability-10
FORMULA_NAME ASLink-PT-03a-CTLFireability-11
FORMULA_NAME ASLink-PT-03a-CTLFireability-12
FORMULA_NAME ASLink-PT-03a-CTLFireability-13
FORMULA_NAME ASLink-PT-03a-CTLFireability-14
FORMULA_NAME ASLink-PT-03a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1527766335469

Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
built 49 ordering constraints for composite.
built 75 ordering constraints for composite.
built 16 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 7 ordering constraints for composite.
built 75 ordering constraints for composite.
built 16 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 11 ordering constraints for composite.
built 11 ordering constraints for composite.
built 75 ordering constraints for composite.
built 16 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 120 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,4.24352e+17,78.1477,1757792,7822,1061,3.72127e+06,5617,2187,3.85316e+06,266,33465,0


Converting to forward existential form...Done !
original formula: EG(A(((i34.u157.p697>=1)&&((u4.p47>=1)&&(u41.p271>=1))) U !(((u4.p40>=1)&&(u41.p280>=1)))))
=> equivalent forward existential formula: [FwdG(Init,!((E(!(!(((u4.p40>=1)&&(u41.p280>=1)))) U (!(((i34.u157.p697>=1)&&((u4.p47>=1)&&(u41.p271>=1)))) * !(!(((u4.p40>=1)&&(u41.p280>=1)))))) + EG(!(!(((u4.p40>=1)&&(u41.p280>=1))))))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13, t14, t15, t16, t17, t18, t19, t23, t25, t26, t27, t28, t29, t31, t679, t680, t681, t1029, t1088, t1111, t1170, t1193, t1252, i6.u13.t155, i6.u18.t145, i6.u23.t135, i15.u48.t174, i15.u53.t184, i15.u58.t194, i24.u83.t117, i24.u88.t107, i24.u93.t97, i34.u157.t210, i34.u157.t216, i34.u157.t222, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :600/633/48/1281
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection

BK_STOP 1527766512760

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 11:32:17 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 31, 2018 11:32:18 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 11:32:18 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 234 ms
May 31, 2018 11:32:18 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 821 places.
May 31, 2018 11:32:18 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1281 transitions.
May 31, 2018 11:32:18 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 31, 2018 11:32:18 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 61 ms
May 31, 2018 11:32:18 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 31, 2018 11:32:19 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 503 ms
May 31, 2018 11:32:19 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 244 ms
May 31, 2018 11:32:19 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 31, 2018 11:32:19 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 199 ms
May 31, 2018 11:32:19 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 31, 2018 11:32:20 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1568 redundant transitions.
May 31, 2018 11:32:20 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 24 ms
May 31, 2018 11:32:20 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 2 ms
ITS-tools command line returned an error code 139

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ASLink-PT-03a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ASLink-PT-03a.tgz
mv ASLink-PT-03a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ASLink-PT-03a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749149500040"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;