fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r272-smll-152749149300456
Last Updated
June 26, 2018

About the Execution of ITS-Tools for DLCflexbar-PT-7a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15754.200 3600000.00 4347388.00 10601.50 F??????????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 6.3M
-rw-r--r-- 1 mcc users 2.9K May 30 05:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 30 05:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 29 04:53 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 29 04:53 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 09:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.7K May 28 07:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.4K May 27 20:00 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 27 20:00 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 26 20:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 26 20:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 6.2M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DLCflexbar-PT-7a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r272-smll-152749149300456

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-00
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-01
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-02
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-03
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-04
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-05
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-06
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-07
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-08
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-09
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-10
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-11
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-12
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-13
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-14
FORMULA_NAME DLCflexbar-PT-7a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527994791046

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Checking formula 0 : !((F(X("((u132.p873>=1)&&(u111.p779>=1))"))))
Formula 0 simplified : !FX"((u132.p873>=1)&&(u111.p779>=1))"
built 4105 ordering constraints for composite.
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
115849 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1165.71,4018664,1,0,1.38037e+06,8649,52126,1.98822e+06,282,6874,823775
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA DLCflexbar-PT-7a-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F((G("((u119.p851>=1)&&(u1883.p2624>=1))"))U(G("((u22.p154>=1)&&(u1703.p2444>=1))")))))
Formula 1 simplified : !F(G"((u119.p851>=1)&&(u1883.p2624>=1))" U G"((u22.p154>=1)&&(u1703.p2444>=1))")

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 2:59:54 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 03, 2018 2:59:54 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 2:59:55 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 739 ms
Jun 03, 2018 2:59:55 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2913 places.
Jun 03, 2018 2:59:56 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 23319 transitions.
Jun 03, 2018 2:59:56 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 03, 2018 2:59:56 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 2:59:57 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 3:00:01 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4329 ms
Jun 03, 2018 3:00:01 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 3:00:08 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 40632 redundant transitions.
Jun 03, 2018 3:00:08 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 249 ms
Jun 03, 2018 3:00:08 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 03, 2018 3:00:10 AM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 2519 identical transitions.
Jun 03, 2018 3:00:10 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 20800 transitions.
Jun 03, 2018 3:00:10 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (20800) to apply POR reductions. Disabling POR matrices.
Jun 03, 2018 3:00:12 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3221ms conformant to PINS in folder :/home/mcc/execution
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:78)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-7a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-7a.tgz
mv DLCflexbar-PT-7a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DLCflexbar-PT-7a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r272-smll-152749149300456"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;