Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 364K
-rw-r--r-- 1 mcc users 3.7K May 29 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 29 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 28 11:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 28 11:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 28 09:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.6K May 28 09:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 28 07:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.7K May 28 07:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.4K May 27 05:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 27 05:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 26 06:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 26 06:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 192K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BusinessProcesses-PT-20, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r272-smll-152749149100359
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BusinessProcesses-PT-20-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527939760087

Flatten gal took : 219 ms
Constant places removed 13 places and 7 transitions.
Performed 503 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 516 rules applied. Total rules applied 516 place count 769 transition count 187
Constant places removed 537 places and 5 transitions.
Implicit places reduction removed 2 places :[p457, p452]
Performed 2 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 541 rules applied. Total rules applied 1057 place count 230 transition count 180
Constant places removed 5 places and 0 transitions.
Implicit places reduction removed 2 places :[p467, p382]
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 8 rules applied. Total rules applied 1065 place count 223 transition count 179
Constant places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 1067 place count 221 transition count 179
Performed 19 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 19 Pre rules applied. Total rules applied 1067 place count 221 transition count 160
Constant places removed 19 places and 0 transitions.
Iterating post reduction 4 with 19 rules applied. Total rules applied 1086 place count 202 transition count 160
Symmetric choice reduction at 5 with 4 rule applications. Total rules 1090 place count 202 transition count 160
Constant places removed 4 places and 4 transitions.
Iterating post reduction 5 with 4 rules applied. Total rules applied 1094 place count 198 transition count 156
Performed 5 Post agglomeration using F-continuation condition.
Constant places removed 5 places and 0 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 6 with 6 rules applied. Total rules applied 1100 place count 193 transition count 150
Performed 3 Post agglomeration using F-continuation condition.
Constant places removed 3 places and 0 transitions.
Iterating post reduction 7 with 3 rules applied. Total rules applied 1103 place count 190 transition count 153
Applied a total of 1103 rules in 209 ms. Remains 190 /782 variables (removed 592) and now considering 153/697 (removed 544) transitions.
Normalized transition count is 152
// Phase 1: matrix 152 rows 190 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 152
// Phase 1: matrix 152 rows 190 cols
invariant :p186 + p662 = 1
invariant :-1'p99 + -1'p101 + p102 + p104 = 0
invariant :p551 + p552 = 1
invariant :p227 + p688 = 1
invariant :p526 + p527 = 1
invariant :p496 + p497 = 1
invariant :p221 + p684 = 1
invariant :p521 + p522 = 1
invariant :p83 + p90 + p92 + -1'p95 + p99 + p101 + -1'p104 + -1'p113 + p114 + p116 + -1'p608 + p754 + -1'p755 + -1'p757 + -1'p761 + p772 + -1'p773 + -1'p775 = 0
invariant :p233 + p692 = 1
invariant :p561 + p562 = 1
invariant :p270 + p718 = 1
invariant :p56 + p64 + p67 = 1
invariant :p421 + p422 = 1
invariant :p573 + p581 + p582 + p605 + p608 + p611 + p618 + p622 + p626 + p632 + p642 + p650 + p654 + p662 + p666 + p673 + p679 + p684 + p688 + p692 + p698 + p702 + p706 + p710 + p714 + p718 + p722 + p728 + p733 + p737 + p743 + p747 + p755 + p757 + p761 + p763 + p767 + p769 + p773 + p775 + p779 + p780 = 1
invariant :p566 + p567 = 1
invariant :p295 + p737 = 1
invariant :p491 + p492 = 1
invariant :p366 + p367 = 1
invariant :p406 + p407 = 1
invariant :p214 + p679 = 1
invariant :-1'p377 + p381 + p451 + p456 + -1'p462 + p466 + p632 + p642 = -2
invariant :p203 + -1'p206 + -1'p777 + p780 = 0
invariant :p282 + p728 = 1
invariant :p426 + p427 = 1
invariant :p69 + -2'p90 + -1'p92 + p95 + p98 + -1'p99 + p104 + p107 + -1'p108 + p113 + -1'p114 + -1'p573 + -1'p581 + -1'p582 + -1'p618 + -1'p622 + -1'p626 + -1'p632 + -1'p642 + -1'p650 + -1'p654 + -1'p662 + -1'p666 + -1'p673 + -1'p679 + -1'p684 + -1'p688 + -1'p692 + -1'p698 + -1'p702 + -1'p706 + -1'p710 + -1'p714 + -1'p718 + -1'p722 + -1'p728 + -1'p733 + -1'p737 + -1'p743 + -1'p747 + -1'p751 + -1'p754 + 2'p755 + p757 + -1'p760 + p761 + -1'p766 + p767 + -1'p772 + p773 + -1'p779 + -1'p780 = 0
invariant :p40 + p48 + p51 = 1
invariant :p86 + p90 + p92 + -1'p98 + p108 + p114 + -1'p611 + -1'p755 + -1'p767 + -1'p773 = 0
invariant :p136 + p632 = 1
invariant :p441 + p442 = 1
invariant :p252 + p706 = 1
invariant :p471 + p472 = 1
invariant :-1'p90 + -1'p92 + p93 + p95 = 0
invariant :p391 + p392 = 1
invariant :p396 + p397 = 1
invariant :p130 + p626 = 1
invariant :p264 + p714 = 1
invariant :p111 + p113 + -1'p114 + -1'p116 = 0
invariant :p301 + p743 = 1
invariant :p446 + p447 = 1
invariant :p105 + p107 + -1'p108 + -1'p110 = 0
invariant :p149 + p642 = 1
invariant :p198 + p206 + p779 = 1
invariant :p180 + p184 + p477 + -1'p482 + -1'p487 + p492 + -1'p662 + p666 + -1'p777 + p780 = 1
invariant :p476 + p477 = 1
invariant :p181 + -1'p184 + -1'p477 + p482 + p487 + -1'p492 + p662 + -1'p666 + p777 + -1'p780 = 0
invariant :p183 + p184 = 1
invariant :p246 + p702 = 1
invariant :p506 + p507 = 1
invariant :p776 + p777 + -1'p779 + -1'p780 = 0
invariant :p411 + p412 = 1
invariant :p770 + p772 + -1'p773 + -1'p775 = 0
invariant :p764 + p766 + -1'p767 + -1'p769 = 0
invariant :p501 + p502 = 1
invariant :p758 + p760 + -1'p761 + -1'p763 = 0
invariant :p124 + p622 = 1
invariant :p536 + p537 = 1
invariant :p289 + p733 = 1
invariant :p752 + p754 + -1'p755 + -1'p757 = 0
invariant :p531 + p532 = 1
invariant :p481 + p482 = 1
invariant :p239 + p698 = 1
invariant :p258 + p710 = 1
invariant :p117 + p618 = 1
invariant :p276 + p722 = 1
invariant :p80 + p90 + p99 + -1'p107 + p108 + p110 + p573 + p581 + p582 + p608 + p611 + p618 + p622 + p626 + p632 + p642 + p650 + p654 + p662 + p666 + p673 + p679 + p684 + p688 + p692 + p698 + p702 + p706 + p710 + p714 + p718 + p722 + p728 + p733 + p737 + p743 + p747 + p751 + p760 + p766 + p773 + p775 + p779 + p780 = 1
invariant :p486 + p487 = 1
invariant :p164 + p650 = 1
invariant :p386 + p387 = 1
invariant :p170 + p654 = 1
invariant :p541 + p542 = 1
invariant :p192 + p666 = 1
invariant :p546 + p547 = 1
invariant :p416 + p417 = 1
invariant :p431 + p432 = 1
invariant :p556 + p557 = 1
invariant :-1'p90 + -1'p92 + p96 + p98 = 0
invariant :p749 + p751 + -1'p755 + -1'p757 = 0
invariant :p401 + p402 = 1
invariant :p516 + p517 = 1
invariant :p436 + p437 = 1
invariant :p511 + p512 = 1
invariant :p208 + p673 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.4882e+10,1.30631,37360,2,5549,5,132160,6,0,911,147341,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,1.99596e+09,2.69432,54312,2,3986,7,252017,9,1,4469,147341,2

System contains 1.99596e+09 deadlocks (shown below if less than --print-limit option) !
FORMULA BusinessProcesses-PT-20-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 1995964416 states ] showing 10 first states
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p391=1 p258=1 p402=1 p396=1 p56=1 p432=1 p40=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p391=1 p258=1 p402=1 p396=1 p56=1 p432=1 p48=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p391=1 p258=1 p402=1 p397=1 p56=1 p432=1 p40=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p391=1 p258=1 p402=1 p397=1 p56=1 p432=1 p48=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p391=1 p258=1 p64=1 p402=1 p396=1 p432=1 p40=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p391=1 p258=1 p64=1 p402=1 p396=1 p432=1 p48=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p391=1 p258=1 p64=1 p402=1 p397=1 p432=1 p40=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p391=1 p258=1 p64=1 p402=1 p397=1 p432=1 p48=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p392=1 p258=1 p402=1 p396=1 p56=1 p432=1 p40=1 p252=1 p69=1 p422=1 p417=1 ]
[ p567=1 p295=1 p561=1 p301=1 p779=1 p289=1 p776=1 p552=1 p542=1 p557=1 p276=1 p491=1 p486=1 p282=1 p547=1 p521=1 p497=1 p527=1 p239=1 p233=1 p227=1 p516=1 p531=1 p512=1 p221=1 p507=1 p208=1 p214=1 p537=1 p246=1 p192=1 p502=1 p186=1 p436=1 p462=1 p149=1 p117=1 p441=1 p482=1 p477=1 p136=1 p377=1 p447=1 p184=1 p181=1 p270=1 p164=1 p472=1 p367=1 p170=1 p124=1 p264=1 p412=1 p427=1 p407=1 p387=1 p130=1 p392=1 p258=1 p402=1 p396=1 p56=1 p432=1 p48=1 p252=1 p69=1 p422=1 p417=1 ]
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527939767843

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 11:42:42 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 11:42:42 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 11:42:42 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 136 ms
Jun 02, 2018 11:42:42 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 782 places.
Jun 02, 2018 11:42:42 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 697 transitions.
Jun 02, 2018 11:42:42 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 11:42:42 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 33 ms
Jun 02, 2018 11:42:43 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 212 ms
Jun 02, 2018 11:42:43 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 9 ms
Jun 02, 2018 11:42:43 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 697 transitions.
Jun 02, 2018 11:42:43 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 1 ms
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 153 transitions.
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 83 place invariants in 42 ms
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 190 variables to be positive in 599 ms
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 153 transitions.
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/153 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 18 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 153 transitions.
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 10 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:42:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 153 transitions.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 02, 2018 11:42:46 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2781ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BusinessProcesses-PT-20"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BusinessProcesses-PT-20.tgz
mv BusinessProcesses-PT-20 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BusinessProcesses-PT-20, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r272-smll-152749149100359"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;