fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r272-smll-152749148900213
Last Updated
June 26, 2018

About the Execution of ITS-Tools for BusinessProcesses-PT-04

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.840 183592.00 373017.00 661.90 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 248K
-rw-r--r-- 1 mcc users 4.2K May 29 16:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 29 16:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 28 11:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 28 11:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 28 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.3K May 28 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:40 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 28 07:40 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 2.8K May 27 05:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 12K May 27 05:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 26 06:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 26 06:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 79K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BusinessProcesses-PT-04, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r272-smll-152749148900213

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-00
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-01
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-02
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-03
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-04
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-05
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-06
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-07
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-08
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-09
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-10
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-11
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-12
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-13
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-14
FORMULA_NAME BusinessProcesses-PT-04-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527881793473

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((((G("(u22.p90>=1)"))U(G("(u44.p148>=1)")))U(X("(u75.p216>=1)"))))
Formula 0 simplified : !((G"(u22.p90>=1)" U G"(u44.p148>=1)") U X"(u75.p216>=1)")
built 108 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 283 rows 288 cols
invariant :u44:p148 + u44:p149 + u44:p150 + u44:p151 + u44:p152 + u73:p130 + u70:p129 + u71:p128 + u68:p127 + u69:p126 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u25:p97 + u25:p98 + u25:p99 + -1'u26:p100 + -1'u26:p101 + -1'u26:p102 = 0
invariant :u15:p49 + u15:p50 + u15:p51 + u87:p7 + u86:p6 + u85:p5 + u84:p4 + u83:p3 + u82:p2 + u81:p1 + u75:p222 + u75:p223 + u79:p0 = 1
invariant :u13:p31 + u13:p32 + u76:p16 + u76:p17 + u76:p19 + u76:p20 + u76:p21 + u76:p22 + u76:p23 + u89:p9 + u88:p8 + u87:p7 + u86:p6 + u85:p5 + u84:p4 + u83:p3 + u82:p2 + u81:p1 + u54:p257 + u75:p207 + u75:p213 + u75:p214 + u75:p215 + u79:p0 = 1
invariant :u76:p25 + u76:p26 + -1'u75:p214 + -1'u75:p215 = 0
invariant :u47:p163 + u47:p164 + u47:p165 + u47:p166 + u47:p167 + u68:p127 + u69:p126 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u18:p77 + u18:p78 + u19:p79 + u78:p75 + -1'u20:p82 + -1'u20:p83 + -1'u20:p84 + u21:p86 + u21:p87 + -1'u22:p89 + -1'u22:p90 + -1'u23:p91 + -1'u25:p98 + -1'u25:p99 + u26:p100 + u26:p101 + u26:p102 + -1'u80:p61 + u80:p63 + -1'u80:p66 + u80:p69 + -1'u56:p262 + -1'u56:p263 + u57:p265 + u57:p266 + -1'u59:p271 + -1'u59:p272 + u60:p274 + u60:p275 + -1'u61:p277 + -1'u61:p278 + u62:p279 + u62:p280 + u62:p281 + u63:p283 + u63:p284 + -1'u64:p285 + -1'u64:p286 + -1'u64:p287 + u75:p229 + -1'u75:p231 + u75:p234 + -1'u75:p237 = 0
invariant :u63:p282 + u63:p283 + u63:p284 + -1'u64:p285 + -1'u64:p286 + -1'u64:p287 = 0
invariant :u57:p264 + u57:p265 + u57:p266 + u77:p260 + -1'u58:p267 + -1'u58:p268 + -1'u58:p269 = 0
invariant :u48:p168 + u48:p169 + u48:p170 + u48:p171 + u48:p172 + u69:p126 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u53:p254 + u53:p255 + u53:p256 + -1'u54:p257 + -1'u54:p258 + -1'u54:p259 = 0
invariant :u80:p73 + u80:p74 + u54:p257 + u54:p258 + u54:p259 + u58:p267 + u58:p268 + u58:p269 + u60:p273 + u60:p274 + u60:p275 + u62:p279 + u62:p280 + u62:p281 + u64:p285 + u64:p286 + u64:p287 + u75:p188 + u75:p189 + u75:p190 + u75:p191 + u75:p192 + u75:p193 + u75:p194 + u75:p195 + u75:p196 + u75:p197 + u75:p198 + u75:p199 + u75:p200 + u75:p201 + u75:p202 + u75:p203 + u75:p204 + u75:p205 + u75:p206 + u75:p207 + u75:p208 + u75:p209 + u75:p210 + u75:p211 + u75:p212 + u75:p213 + u75:p214 + u75:p215 + u75:p216 + u75:p217 + u75:p218 + u75:p219 + u75:p220 + u75:p221 + u75:p222 + u75:p223 + u75:p224 + u75:p225 + u75:p226 + u75:p227 + u75:p228 + u75:p229 + u75:p230 + u75:p231 + u75:p232 + u75:p233 + u75:p234 + u75:p235 + u75:p236 + u75:p237 + u75:p238 + u75:p239 + u75:p240 + u75:p243 + u75:p244 + u75:p245 + u75:p246 + u75:p247 + u75:p248 + u75:p249 + u75:p250 + u75:p251 + u75:p252 + u75:p253 + u79:p0 = 1
invariant :u29:p115 + u29:p116 + u29:p117 + u29:p118 + u83:p3 + u82:p2 + u81:p1 + u79:p0 = 1
invariant :u46:p158 + u46:p159 + u46:p160 + u46:p161 + u46:p162 + u71:p128 + u68:p127 + u69:p126 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u10:p10 + u10:p11 + u10:p12 + u89:p9 + u88:p8 + u87:p7 + u86:p6 + u85:p5 + u84:p4 + u83:p3 + u82:p2 + u81:p1 + u75:p204 + u75:p205 + u79:p0 = 1
invariant :u56:p261 + u56:p262 + u56:p263 + u77:p260 + -1'u58:p267 + -1'u58:p268 + -1'u58:p269 = 0
invariant :u28:p112 + u28:p113 + u28:p114 + -1'u75:p249 + -1'u75:p250 = 0
invariant :u61:p276 + u61:p277 + u61:p278 + -1'u62:p279 + -1'u62:p280 + -1'u62:p281 = 0
invariant :u14:p33 + u14:p34 + u14:p35 + u14:p36 + u14:p37 + u14:p38 + u14:p39 + u14:p40 + u14:p41 + u14:p42 + u14:p43 + u14:p44 + u14:p45 + u14:p46 + u14:p47 + u14:p48 + u88:p8 + u87:p7 + u86:p6 + u85:p5 + u84:p4 + u83:p3 + u82:p2 + u81:p1 + u79:p0 = 1
invariant :u18:p77 + u18:p78 + u21:p86 + u21:p87 + u23:p92 + u23:p93 + u26:p100 + u26:p101 + u26:p102 + u80:p55 + u80:p56 + u80:p58 + u80:p60 + u80:p62 + u80:p63 + u80:p64 + u80:p65 + u80:p67 + u80:p68 + u80:p69 + u80:p70 + u80:p71 + u80:p72 + u86:p6 + u85:p5 + u84:p4 + u83:p3 + u82:p2 + u81:p1 + -1'u54:p257 + -1'u54:p258 + -1'u54:p259 + -1'u56:p262 + -1'u56:p263 + -1'u59:p271 + -1'u59:p272 + -1'u61:p277 + -1'u61:p278 + -1'u64:p285 + -1'u64:p286 + -1'u64:p287 + -1'u75:p188 + -1'u75:p189 + -1'u75:p190 + -1'u75:p191 + -1'u75:p192 + -1'u75:p193 + -1'u75:p194 + -1'u75:p195 + -1'u75:p196 + -1'u75:p197 + -1'u75:p198 + -1'u75:p199 + -1'u75:p200 + -1'u75:p201 + -1'u75:p202 + -1'u75:p203 + -1'u75:p204 + -1'u75:p205 + -1'u75:p206 + -1'u75:p207 + -1'u75:p208 + -1'u75:p209 + -1'u75:p210 + -1'u75:p211 + -1'u75:p212 + -1'u75:p213 + -1'u75:p214 + -1'u75:p215 + -1'u75:p216 + -1'u75:p217 + -1'u75:p218 + -1'u75:p219 + -1'u75:p220 + -1'u75:p221 + -1'u75:p222 + -1'u75:p223 + -1'u75:p224 + -1'u75:p226 + -1'u75:p228 + -1'u75:p230 + -1'u75:p231 + -1'u75:p232 + -1'u75:p233 + -1'u75:p235 + -1'u75:p236 + -1'u75:p237 + -1'u75:p238 + -1'u75:p239 + -1'u75:p240 + -1'u75:p243 + -1'u75:p244 + -1'u75:p245 + -1'u75:p246 + -1'u75:p247 + -1'u75:p248 + -1'u75:p249 + -1'u75:p250 + -1'u75:p251 + -1'u75:p252 + -1'u75:p253 = 0
invariant :u28:p109 + u28:p110 + u28:p111 + u84:p4 + u83:p3 + u82:p2 + u81:p1 + u75:p249 + u75:p250 + u79:p0 = 1
invariant :u59:p270 + u59:p271 + u59:p272 + -1'u60:p273 + -1'u60:p274 + -1'u60:p275 = 0
invariant :-1'u18:p77 + -1'u18:p78 + u20:p82 + u20:p83 + u20:p84 + -1'u21:p86 + -1'u21:p87 + u22:p88 + u22:p89 + u22:p90 + u23:p91 + u80:p57 + u80:p59 + u80:p61 + u80:p66 + u56:p262 + u56:p263 + -1'u58:p267 + -1'u58:p268 + -1'u58:p269 + u59:p271 + u59:p272 + -1'u60:p273 + -1'u60:p274 + -1'u60:p275 + u61:p277 + u61:p278 + -1'u62:p279 + -1'u62:p280 + -1'u62:p281 + -1'u75:p225 + -1'u75:p227 + -1'u75:p229 + -1'u75:p234 = 0
invariant :u43:p143 + u43:p144 + u43:p145 + u43:p146 + u43:p147 + u72:p131 + u73:p130 + u70:p129 + u71:p128 + u68:p127 + u69:p126 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :-1'u18:p77 + -1'u18:p78 + u20:p82 + u20:p83 + u20:p84 + u21:p85 + u23:p91 + u80:p57 + u80:p59 + u80:p61 + u80:p66 + u56:p262 + u56:p263 + -1'u58:p267 + -1'u58:p268 + -1'u58:p269 + u59:p271 + u59:p272 + -1'u60:p273 + -1'u60:p274 + -1'u60:p275 + u61:p277 + u61:p278 + -1'u62:p279 + -1'u62:p280 + -1'u62:p281 + -1'u75:p225 + -1'u75:p227 + -1'u75:p229 + -1'u75:p234 = 0
invariant :u15:p52 + u15:p53 + u15:p54 + -1'u75:p222 + -1'u75:p223 = 0
invariant :u45:p153 + u45:p154 + u45:p155 + u45:p156 + u45:p157 + u70:p129 + u71:p128 + u68:p127 + u69:p126 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u20:p82 + u24:p94 + u26:p100 + u80:p57 + u80:p61 + u80:p63 + u80:p72 + -1'u58:p267 + -1'u62:p279 + -1'u64:p285 + -1'u75:p225 + -1'u75:p229 + -1'u75:p231 + -1'u75:p240 = 0
invariant :u27:p103 + u27:p104 + u27:p105 + u85:p5 + u84:p4 + u83:p3 + u82:p2 + u81:p1 + u75:p245 + u75:p246 + u79:p0 = 1
invariant :u30:p119 + u30:p120 + u30:p121 + u30:p122 + u82:p2 + u81:p1 + u79:p0 = 1
invariant :u51:p183 + u51:p184 + u51:p185 + u51:p186 + u51:p187 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u54:p257 + u54:p258 + u54:p259 + u58:p267 + u58:p268 + u58:p269 + u60:p273 + u60:p274 + u60:p275 + u62:p279 + u62:p280 + u62:p281 + u64:p285 + u64:p286 + u64:p287 + u75:p188 + u75:p189 + u75:p190 + u75:p191 + u75:p192 + u75:p193 + u75:p194 + u75:p195 + u75:p196 + u75:p197 + u75:p198 + u75:p199 + u75:p200 + u75:p201 + u75:p202 + u75:p203 + u75:p204 + u75:p205 + u75:p206 + u75:p207 + u75:p208 + u75:p209 + u75:p210 + u75:p211 + u75:p212 + u75:p213 + u75:p214 + u75:p215 + u75:p216 + u75:p217 + u75:p218 + u75:p219 + u75:p220 + u75:p221 + u75:p222 + u75:p223 + u75:p224 + u75:p225 + u75:p226 + u75:p227 + u75:p228 + u75:p229 + u75:p230 + u75:p231 + u75:p232 + u75:p233 + u75:p234 + u75:p235 + u75:p236 + u75:p237 + u75:p238 + u75:p239 + u75:p240 + u75:p241 + u75:p242 + u75:p243 + u75:p244 + u75:p245 + u75:p246 + u75:p247 + u75:p248 + u75:p249 + u75:p250 + u75:p251 + u75:p252 + u75:p253 + u79:p0 = 1
invariant :u12:p28 + u12:p29 + -1'u13:p31 + -1'u13:p32 + -1'u76:p21 + u76:p24 + -1'u53:p255 + -1'u53:p256 + u54:p258 + u54:p259 + u75:p210 + -1'u75:p213 = 0
invariant :u27:p106 + u27:p107 + u27:p108 + -1'u75:p245 + -1'u75:p246 = 0
invariant :u18:p76 + u18:p77 + u18:p78 + u78:p75 + -1'u20:p82 + -1'u20:p83 + -1'u20:p84 = 0
invariant :u42:p138 + u42:p139 + u42:p140 + u42:p141 + u42:p142 + u74:p132 + u72:p131 + u73:p130 + u70:p129 + u71:p128 + u68:p127 + u69:p126 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u12:p27 + u76:p18 + u76:p21 + u53:p255 + u53:p256 + -1'u54:p257 + -1'u54:p258 + -1'u54:p259 + -1'u75:p207 + -1'u75:p210 = 0
invariant :u41:p133 + u41:p134 + u41:p135 + u41:p136 + u41:p137 + u74:p132 + u72:p131 + u73:p130 + u70:p129 + u71:p128 + u68:p127 + u69:p126 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :-1'u18:p77 + -1'u18:p78 + u19:p80 + u19:p81 + -1'u21:p86 + -1'u21:p87 + u22:p89 + u22:p90 + u23:p91 + u25:p98 + u25:p99 + -1'u26:p100 + -1'u26:p101 + -1'u26:p102 + u80:p61 + -1'u80:p63 + u80:p66 + -1'u80:p69 + u56:p262 + u56:p263 + -1'u57:p265 + -1'u57:p266 + u59:p271 + u59:p272 + -1'u60:p274 + -1'u60:p275 + u61:p277 + u61:p278 + -1'u62:p279 + -1'u62:p280 + -1'u62:p281 + -1'u63:p283 + -1'u63:p284 + u64:p285 + u64:p286 + u64:p287 + -1'u75:p229 + u75:p231 + -1'u75:p234 + u75:p237 = 0
invariant :u49:p173 + u49:p174 + u49:p175 + u49:p176 + u49:p177 + u66:p125 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u50:p178 + u50:p179 + u50:p180 + u50:p181 + u50:p182 + u67:p124 + u65:p123 + u81:p1 + u79:p0 = 1
invariant :u13:p30 + u76:p18 + u76:p24 + -1'u54:p257 + -1'u75:p207 + -1'u75:p213 = 0
invariant :-1'u20:p82 + -1'u23:p91 + -1'u23:p92 + -1'u23:p93 + u24:p95 + u24:p96 + -1'u26:p100 + -1'u80:p57 + -1'u80:p61 + -1'u80:p63 + -1'u80:p72 + u58:p267 + u62:p279 + u64:p285 + u75:p225 + u75:p229 + u75:p231 + u75:p240 = 0
invariant :u10:p13 + u10:p14 + u10:p15 + -1'u75:p204 + -1'u75:p205 = 0
Reverse transition relation is NOT exact ! Due to transitions t136, t182, u10.t194, u76.t185, u76.t187, u76.t191, u14.t168, u14.t170, u14.t173, u14.t175, u14.t177, u14.t181, u15.t165, u80.t139, u80.t141, u80.t143, u80.t147, u80.t151, u80.t155, u80.t161, u27.t135, u28.t131, u29.t127, u43.t114, u43.t115, u44.t110, u44.t111, u45.t106, u45.t107, u46.t102, u46.t103, u47.t98, u47.t99, u48.t94, u48.t95, u49.t90, u49.t91, u50.t86, u50.t87, u51.t82, u51.t83, u75.t11, u75.t13, u75.t16, u75.t19, u75.t22, u75.t24, u75.t26, u75.t30, u75.t34, u75.t38, u75.t44, u75.t47, u75.t49, u75.t51, u75.t54, u75.t56, u75.t60, u75.t63, u75.t65, u75.t70, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :42/180/61/283
Computing Next relation with stutter on 460 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
5487 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,54.9332,1167772,1,0,1.9329e+06,412044,3474,2.91327e+06,2114,1.73893e+06,10775571
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F(F("(((u49.p176>=1)&&(u80.p69>=1))&&(u57.p264>=1))"))))
Formula 1 simplified : !F"(((u49.p176>=1)&&(u80.p69>=1))&&(u57.p264>=1))"
Computing Next relation with stutter on 460 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
951 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,64.447,1397188,1,0,2.37512e+06,428220,3629,3.67235e+06,2114,1.88789e+06,12180043
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !(((G(X("(u75.p189>=1)")))U(F("(u80.p68>=1)"))))
Formula 2 simplified : !(GX"(u75.p189>=1)" U F"(u80.p68>=1)")
Computing Next relation with stutter on 460 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
439 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,68.8302,1527604,1,0,2.64524e+06,428220,3744,4.10624e+06,2115,1.89132e+06,13082290
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((F(G((X("(((u45.p156>=1)&&(u23.p91>=1))&&(u61.p276>=1))"))U(X("(((u49.p176>=1)&&(u22.p88>=1))&&(u75.p237>=1))"))))))
Formula 3 simplified : !FG(X"(((u45.p156>=1)&&(u23.p91>=1))&&(u61.p276>=1))" U X"(((u49.p176>=1)&&(u22.p88>=1))&&(u75.p237>=1))")
Computing Next relation with stutter on 460 deadlock states
52 unique states visited
51 strongly connected components in search stack
53 transitions explored
52 items max in DFS search stack
232 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,71.1418,1592280,1,0,2.75245e+06,434073,3905,4.32689e+06,2115,1.96924e+06,13333834
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((G(X(F(X("(u27.p107>=1)"))))))
Formula 4 simplified : !GXFX"(u27.p107>=1)"
Computing Next relation with stutter on 460 deadlock states
54 unique states visited
54 strongly connected components in search stack
55 transitions explored
54 items max in DFS search stack
1098 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,82.1303,1834128,1,0,3.28161e+06,438533,3965,5.0501e+06,2116,2.02855e+06,14611509
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !(((X(G("(u14.p35>=1)")))U(G(("(((u49.p176>=1)&&(u19.p79>=1))&&(u57.p264>=1))")U("(((u50.p181>=1)&&(u26.p100>=1))&&(u62.p279>=1))")))))
Formula 5 simplified : !(XG"(u14.p35>=1)" U G("(((u49.p176>=1)&&(u19.p79>=1))&&(u57.p264>=1))" U "(((u50.p181>=1)&&(u26.p100>=1))&&(u62.p279>=1))"))
Computing Next relation with stutter on 460 deadlock states
51 unique states visited
51 strongly connected components in search stack
51 transitions explored
51 items max in DFS search stack
48 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,82.6102,1845184,1,0,3.29536e+06,438533,4121,5.06724e+06,2116,2.02856e+06,14721386
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((G("(u75.p244>=1)")))
Formula 6 simplified : !G"(u75.p244>=1)"
Computing Next relation with stutter on 460 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,82.6158,1845448,1,0,3.29536e+06,438533,4139,5.06724e+06,2117,2.02856e+06,14721477
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((("(u80.p61>=1)")U((X("(u75.p235>=1)"))U(X("(u14.p45>=1)")))))
Formula 7 simplified : !("(u80.p61>=1)" U (X"(u75.p235>=1)" U X"(u14.p45>=1)"))
Computing Next relation with stutter on 460 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,82.6187,1845448,1,0,3.29536e+06,438533,4160,5.06724e+06,2120,2.02856e+06,14721669
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !(("(((u50.p181>=1)&&(u26.p100>=1))&&(u64.p285>=1))"))
Formula 8 simplified : !"(((u50.p181>=1)&&(u26.p100>=1))&&(u64.p285>=1))"
Computing Next relation with stutter on 460 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,82.6195,1845448,1,0,3.29536e+06,438533,4166,5.06724e+06,2120,2.02856e+06,14721713
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((G(X(G(F(X("(u75.p231>=1)")))))))
Formula 9 simplified : !GXGFX"(u75.p231>=1)"
Computing Next relation with stutter on 460 deadlock states
53 unique states visited
53 strongly connected components in search stack
54 transitions explored
53 items max in DFS search stack
934 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,91.9605,2026816,1,0,3.69036e+06,438555,4266,5.67647e+06,2121,2.0549e+06,15518038
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((X(F((F("(u80.p58>=1)"))U("(u14.p48>=1)")))))
Formula 10 simplified : !XF(F"(u80.p58>=1)" U "(u14.p48>=1)")
Computing Next relation with stutter on 460 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
13 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,92.0956,2030512,1,0,3.69807e+06,438555,4328,5.68678e+06,2122,2.0549e+06,15543796
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-04-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((F(F(F(G(G("(u46.p162>=1)")))))))
Formula 11 simplified : !FG"(u46.p162>=1)"
Computing Next relation with stutter on 460 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5554 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 50 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(<>([]([]((LTLAP20==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 191 ms.
FORMULA BusinessProcesses-PT-04-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](<>([]([]((LTLAP21==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 165 ms.
FORMULA BusinessProcesses-PT-04-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 158 ms.
FORMULA BusinessProcesses-PT-04-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP23==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 159 ms.
FORMULA BusinessProcesses-PT-04-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP24==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 159 ms.
FORMULA BusinessProcesses-PT-04-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527881977065

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 7:36:35 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 7:36:35 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 7:36:35 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 102 ms
Jun 01, 2018 7:36:35 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 288 places.
Jun 01, 2018 7:36:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 283 transitions.
Jun 01, 2018 7:36:36 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 01, 2018 7:36:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 25 ms
Jun 01, 2018 7:36:36 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 7:36:36 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 7:36:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 110 ms
Jun 01, 2018 7:36:36 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 7:36:36 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 131 redundant transitions.
Jun 01, 2018 7:36:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 12 ms
Jun 01, 2018 7:36:36 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 01, 2018 7:36:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 283 transitions.
Jun 01, 2018 7:36:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 44 place invariants in 123 ms
Jun 01, 2018 7:36:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 288 variables to be positive in 689 ms
Jun 01, 2018 7:36:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 283 transitions.
Jun 01, 2018 7:36:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/283 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 7:36:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 37 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 7:36:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 283 transitions.
Jun 01, 2018 7:36:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 7:36:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 283 transitions.
Jun 01, 2018 7:36:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/283) took 3741 ms. Total solver calls (SAT/UNSAT): 829(670/159)
Jun 01, 2018 7:36:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/283) took 9571 ms. Total solver calls (SAT/UNSAT): 1182(756/426)
Jun 01, 2018 7:36:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/283) took 13654 ms. Total solver calls (SAT/UNSAT): 1356(801/555)
Jun 01, 2018 7:37:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/283) took 21338 ms. Total solver calls (SAT/UNSAT): 1918(884/1034)
Jun 01, 2018 7:37:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/283) took 26738 ms. Total solver calls (SAT/UNSAT): 2212(939/1273)
Jun 01, 2018 7:37:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/283) took 30801 ms. Total solver calls (SAT/UNSAT): 2525(1001/1524)
Jun 01, 2018 7:37:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/283) took 33929 ms. Total solver calls (SAT/UNSAT): 3940(1418/2522)
Jun 01, 2018 7:37:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/283) took 37244 ms. Total solver calls (SAT/UNSAT): 4689(1895/2794)
Jun 01, 2018 7:37:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/283) took 41709 ms. Total solver calls (SAT/UNSAT): 4828(1924/2904)
Jun 01, 2018 7:37:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/283) took 46172 ms. Total solver calls (SAT/UNSAT): 5111(1969/3142)
Jun 01, 2018 7:37:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/283) took 49393 ms. Total solver calls (SAT/UNSAT): 5492(2021/3471)
Jun 01, 2018 7:37:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/283) took 53757 ms. Total solver calls (SAT/UNSAT): 5907(2103/3804)
Jun 01, 2018 7:37:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/283) took 62471 ms. Total solver calls (SAT/UNSAT): 6306(2154/4152)
Jun 01, 2018 7:37:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/283) took 71380 ms. Total solver calls (SAT/UNSAT): 6732(2242/4490)
Jun 01, 2018 7:37:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/283) took 78660 ms. Total solver calls (SAT/UNSAT): 6964(2279/4685)
Jun 01, 2018 7:38:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/283) took 84181 ms. Total solver calls (SAT/UNSAT): 7227(2344/4883)
Jun 01, 2018 7:38:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/283) took 89010 ms. Total solver calls (SAT/UNSAT): 7584(2401/5183)
Jun 01, 2018 7:38:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/283) took 96690 ms. Total solver calls (SAT/UNSAT): 7717(2438/5279)
Jun 01, 2018 7:38:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/283) took 103778 ms. Total solver calls (SAT/UNSAT): 7848(2474/5374)
Jun 01, 2018 7:38:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/283) took 107325 ms. Total solver calls (SAT/UNSAT): 8421(2697/5724)
Jun 01, 2018 7:38:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/283) took 110667 ms. Total solver calls (SAT/UNSAT): 8667(2730/5937)
Jun 01, 2018 7:38:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/283) took 115411 ms. Total solver calls (SAT/UNSAT): 9122(2886/6236)
Jun 01, 2018 7:38:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/283) took 119083 ms. Total solver calls (SAT/UNSAT): 9331(2927/6404)
Jun 01, 2018 7:38:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/283) took 122186 ms. Total solver calls (SAT/UNSAT): 9437(2949/6488)
Jun 01, 2018 7:38:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/283) took 125273 ms. Total solver calls (SAT/UNSAT): 10456(3324/7132)
Jun 01, 2018 7:38:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/283) took 129926 ms. Total solver calls (SAT/UNSAT): 10564(3347/7217)
Jun 01, 2018 7:38:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/283) took 133658 ms. Total solver calls (SAT/UNSAT): 10671(3369/7302)
Jun 01, 2018 7:38:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/283) took 137776 ms. Total solver calls (SAT/UNSAT): 10769(3390/7379)
Jun 01, 2018 7:39:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/283) took 140927 ms. Total solver calls (SAT/UNSAT): 11059(3447/7612)
Jun 01, 2018 7:39:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/283) took 148007 ms. Total solver calls (SAT/UNSAT): 11242(3485/7757)
Jun 01, 2018 7:39:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/283) took 152319 ms. Total solver calls (SAT/UNSAT): 11426(3520/7906)
Jun 01, 2018 7:39:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/283) took 159219 ms. Total solver calls (SAT/UNSAT): 11970(3635/8335)
Jun 01, 2018 7:39:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/283) took 163144 ms. Total solver calls (SAT/UNSAT): 12062(3652/8410)
Jun 01, 2018 7:39:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(210/283) took 166149 ms. Total solver calls (SAT/UNSAT): 13228(4598/8630)
Jun 01, 2018 7:39:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(272/283) took 169322 ms. Total solver calls (SAT/UNSAT): 14915(4783/10132)
Jun 01, 2018 7:39:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 169689 ms. Total solver calls (SAT/UNSAT): 14960(4784/10176)
Jun 01, 2018 7:39:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 283 transitions.
Jun 01, 2018 7:39:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 322 ms. Total solver calls (SAT/UNSAT): 199(0/199)
Jun 01, 2018 7:39:29 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 172468ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BusinessProcesses-PT-04"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BusinessProcesses-PT-04.tgz
mv BusinessProcesses-PT-04 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BusinessProcesses-PT-04, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r272-smll-152749148900213"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;