Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 3.9K May 29 16:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 29 16:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 28 11:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 28 11:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.5K May 28 07:39 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.7K May 27 05:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 27 05:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 26 06:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 26 06:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 1.4M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ASLink-PT-10b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r272-smll-152749148900179
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ASLink-PT-10b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527876391761

Flatten gal took : 1548 ms
Constant places removed 1 places and 1 transitions.
Performed 2080 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 2081 rules applied. Total rules applied 2081 place count 4409 transition count 3324
Constant places removed 2216 places and 2 transitions.
Reduce isomorphic transitions removed 34 transitions.
Implicit places reduction removed 20 places :[p4139, p4011, p3616, p3590, p3221, p3195, p2826, p2800, p2431, p2405, p2036, p2010, p1641, p1615, p1246, p1220, p851, p825, p456, p430]
Performed 134 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2404 rules applied. Total rules applied 4485 place count 2173 transition count 3154
Constant places removed 154 places and 0 transitions.
Performed 50 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 204 rules applied. Total rules applied 4689 place count 2019 transition count 3104
Constant places removed 50 places and 0 transitions.
Implicit places reduction removed 19 places :[p3980, p3966, p3585, p3571, p3190, p3176, p2795, p2781, p2400, p2386, p2005, p1991, p1610, p1596, p1215, p1201, p820, p806, p411]
Performed 19 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 88 rules applied. Total rules applied 4777 place count 1950 transition count 3085
Constant places removed 19 places and 0 transitions.
Iterating post reduction 4 with 19 rules applied. Total rules applied 4796 place count 1931 transition count 3085
Performed 293 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 5 with 293 Pre rules applied. Total rules applied 4796 place count 1931 transition count 2792
Constant places removed 294 places and 0 transitions.
Implicit places reduction removed 1 places :[p425]
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 5 with 296 rules applied. Total rules applied 5092 place count 1636 transition count 2791
Constant places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 5093 place count 1635 transition count 2791
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 7 with 1 Pre rules applied. Total rules applied 5093 place count 1635 transition count 2790
Constant places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 5094 place count 1634 transition count 2790
Symmetric choice reduction at 8 with 35 rule applications. Total rules 5129 place count 1634 transition count 2790
Constant places removed 35 places and 35 transitions.
Reduce isomorphic transitions removed 1 transitions.
Implicit places reduction removed 1 places :[p4409]
Performed 13 Post agglomeration using F-continuation condition.
Iterating post reduction 8 with 50 rules applied. Total rules applied 5179 place count 1598 transition count 2741
Constant places removed 14 places and 0 transitions.
Iterating post reduction 9 with 14 rules applied. Total rules applied 5193 place count 1584 transition count 2741
Symmetric choice reduction at 10 with 22 rule applications. Total rules 5215 place count 1584 transition count 2741
Constant places removed 22 places and 80 transitions.
Reduce isomorphic transitions removed 1 transitions.
Implicit places reduction removed 11 places :[p4148, p3952, p3557, p3162, p2767, p2372, p1977, p1582, p1187, p792, p397]
Performed 23 Post agglomeration using F-continuation condition.
Iterating post reduction 10 with 57 rules applied. Total rules applied 5272 place count 1551 transition count 2637
Constant places removed 23 places and 0 transitions.
Iterating post reduction 11 with 23 rules applied. Total rules applied 5295 place count 1528 transition count 2637
Symmetric choice reduction at 12 with 11 rule applications. Total rules 5306 place count 1528 transition count 2637
Constant places removed 11 places and 18 transitions.
Iterating post reduction 12 with 11 rules applied. Total rules applied 5317 place count 1517 transition count 2619
Symmetric choice reduction at 13 with 1 rule applications. Total rules 5318 place count 1517 transition count 2619
Constant places removed 1 places and 8 transitions.
Iterating post reduction 13 with 1 rules applied. Total rules applied 5319 place count 1516 transition count 2611
Symmetric choice reduction at 14 with 1 rule applications. Total rules 5320 place count 1516 transition count 2611
Constant places removed 1 places and 8 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 5321 place count 1515 transition count 2603
Symmetric choice reduction at 15 with 1 rule applications. Total rules 5322 place count 1515 transition count 2603
Constant places removed 1 places and 8 transitions.
Iterating post reduction 15 with 1 rules applied. Total rules applied 5323 place count 1514 transition count 2595
Symmetric choice reduction at 16 with 1 rule applications. Total rules 5324 place count 1514 transition count 2595
Constant places removed 1 places and 8 transitions.
Iterating post reduction 16 with 1 rules applied. Total rules applied 5325 place count 1513 transition count 2587
Symmetric choice reduction at 17 with 1 rule applications. Total rules 5326 place count 1513 transition count 2587
Constant places removed 1 places and 8 transitions.
Iterating post reduction 17 with 1 rules applied. Total rules applied 5327 place count 1512 transition count 2579
Symmetric choice reduction at 18 with 1 rule applications. Total rules 5328 place count 1512 transition count 2579
Constant places removed 1 places and 8 transitions.
Iterating post reduction 18 with 1 rules applied. Total rules applied 5329 place count 1511 transition count 2571
Symmetric choice reduction at 19 with 1 rule applications. Total rules 5330 place count 1511 transition count 2571
Constant places removed 1 places and 8 transitions.
Iterating post reduction 19 with 1 rules applied. Total rules applied 5331 place count 1510 transition count 2563
Symmetric choice reduction at 20 with 1 rule applications. Total rules 5332 place count 1510 transition count 2563
Constant places removed 1 places and 8 transitions.
Iterating post reduction 20 with 1 rules applied. Total rules applied 5333 place count 1509 transition count 2555
Symmetric choice reduction at 21 with 1 rule applications. Total rules 5334 place count 1509 transition count 2555
Constant places removed 1 places and 8 transitions.
Iterating post reduction 21 with 1 rules applied. Total rules applied 5335 place count 1508 transition count 2547
Symmetric choice reduction at 22 with 1 rule applications. Total rules 5336 place count 1508 transition count 2547
Constant places removed 1 places and 8 transitions.
Iterating post reduction 22 with 1 rules applied. Total rules applied 5337 place count 1507 transition count 2539
Symmetric choice reduction at 23 with 1 rule applications. Total rules 5338 place count 1507 transition count 2539
Constant places removed 1 places and 8 transitions.
Iterating post reduction 23 with 1 rules applied. Total rules applied 5339 place count 1506 transition count 2531
Symmetric choice reduction at 24 with 1 rule applications. Total rules 5340 place count 1506 transition count 2531
Constant places removed 1 places and 8 transitions.
Iterating post reduction 24 with 1 rules applied. Total rules applied 5341 place count 1505 transition count 2523
Symmetric choice reduction at 25 with 1 rule applications. Total rules 5342 place count 1505 transition count 2523
Constant places removed 1 places and 8 transitions.
Iterating post reduction 25 with 1 rules applied. Total rules applied 5343 place count 1504 transition count 2515
Symmetric choice reduction at 26 with 1 rule applications. Total rules 5344 place count 1504 transition count 2515
Constant places removed 1 places and 8 transitions.
Iterating post reduction 26 with 1 rules applied. Total rules applied 5345 place count 1503 transition count 2507
Symmetric choice reduction at 27 with 1 rule applications. Total rules 5346 place count 1503 transition count 2507
Constant places removed 1 places and 8 transitions.
Iterating post reduction 27 with 1 rules applied. Total rules applied 5347 place count 1502 transition count 2499
Performed 109 Post agglomeration using F-continuation condition.
Constant places removed 109 places and 0 transitions.
Iterating post reduction 28 with 109 rules applied. Total rules applied 5456 place count 1393 transition count 2380
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 1 places and 0 transitions.
Iterating post reduction 29 with 1 rules applied. Total rules applied 5457 place count 1392 transition count 2389
Applied a total of 5457 rules in 5943 ms. Remains 1392 /4410 variables (removed 3018) and now considering 2389/5405 (removed 3016) transitions.
// Phase 1: matrix 2389 rows 1392 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
No direction supplied, using forward translation only.
Compilation finished in 35878 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 69 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 43 groups

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 6:06:34 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 6:06:35 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 6:06:35 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 637 ms
Jun 01, 2018 6:06:35 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 4410 places.
Jun 01, 2018 6:06:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 5405 transitions.
Jun 01, 2018 6:06:36 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 01, 2018 6:06:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1540 ms
Jun 01, 2018 6:06:38 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 110 ms
Jun 01, 2018 6:06:38 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 5405 transitions.
Jun 01, 2018 6:06:48 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 66 ms
Jun 01, 2018 6:06:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2389 transitions.
Jun 01, 2018 6:06:48 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2389) to apply POR reductions. Disabling POR matrices.
Jun 01, 2018 6:06:48 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 579ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ASLink-PT-10b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ASLink-PT-10b.tgz
mv ASLink-PT-10b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ASLink-PT-10b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r272-smll-152749148900179"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;