fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r272-smll-152749148700089
Last Updated
June 26, 2018

About the Execution of ITS-Tools for ASLink-PT-05b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15751.710 218069.00 447398.00 1030.50 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 968K
-rw-r--r-- 1 mcc users 3.8K May 29 16:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 29 16:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 28 11:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 28 11:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 28 09:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 09:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 28 07:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.0K May 27 05:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K May 27 05:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 26 06:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 26 06:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 795K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ASLink-PT-05b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r272-smll-152749148700089

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ASLink-PT-05b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527799395848

Flatten gal took : 732 ms
Constant places removed 1 places and 1 transitions.
Performed 1120 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1121 rules applied. Total rules applied 1121 place count 2429 transition count 1919
Constant places removed 1191 places and 2 transitions.
Reduce isomorphic transitions removed 19 transitions.
Implicit places reduction removed 10 places :[p2159, p2031, p1636, p1610, p1241, p1215, p846, p820, p451, p425]
Performed 69 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 1289 rules applied. Total rules applied 2410 place count 1228 transition count 1829
Constant places removed 79 places and 0 transitions.
Performed 25 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 104 rules applied. Total rules applied 2514 place count 1149 transition count 1804
Constant places removed 25 places and 0 transitions.
Implicit places reduction removed 9 places :[p2000, p1986, p1605, p1591, p1210, p1196, p815, p801, p406]
Performed 9 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 43 rules applied. Total rules applied 2557 place count 1115 transition count 1795
Constant places removed 9 places and 0 transitions.
Iterating post reduction 4 with 9 rules applied. Total rules applied 2566 place count 1106 transition count 1795
Performed 173 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 5 with 173 Pre rules applied. Total rules applied 2566 place count 1106 transition count 1622
Constant places removed 174 places and 0 transitions.
Implicit places reduction removed 1 places :[p420]
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 5 with 176 rules applied. Total rules applied 2742 place count 931 transition count 1621
Constant places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 2743 place count 930 transition count 1621
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 7 with 1 Pre rules applied. Total rules applied 2743 place count 930 transition count 1620
Constant places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 2744 place count 929 transition count 1620
Symmetric choice reduction at 8 with 20 rule applications. Total rules 2764 place count 929 transition count 1620
Constant places removed 20 places and 20 transitions.
Reduce isomorphic transitions removed 1 transitions.
Implicit places reduction removed 1 places :[p2429]
Performed 8 Post agglomeration using F-continuation condition.
Iterating post reduction 8 with 30 rules applied. Total rules applied 2794 place count 908 transition count 1591
Constant places removed 9 places and 0 transitions.
Iterating post reduction 9 with 9 rules applied. Total rules applied 2803 place count 899 transition count 1591
Symmetric choice reduction at 10 with 12 rule applications. Total rules 2815 place count 899 transition count 1591
Constant places removed 12 places and 45 transitions.
Reduce isomorphic transitions removed 1 transitions.
Implicit places reduction removed 6 places :[p2168, p1972, p1577, p1182, p787, p392]
Performed 13 Post agglomeration using F-continuation condition.
Iterating post reduction 10 with 32 rules applied. Total rules applied 2847 place count 881 transition count 1532
Constant places removed 13 places and 0 transitions.
Iterating post reduction 11 with 13 rules applied. Total rules applied 2860 place count 868 transition count 1532
Symmetric choice reduction at 12 with 6 rule applications. Total rules 2866 place count 868 transition count 1532
Constant places removed 6 places and 13 transitions.
Iterating post reduction 12 with 6 rules applied. Total rules applied 2872 place count 862 transition count 1519
Symmetric choice reduction at 13 with 1 rule applications. Total rules 2873 place count 862 transition count 1519
Constant places removed 1 places and 8 transitions.
Iterating post reduction 13 with 1 rules applied. Total rules applied 2874 place count 861 transition count 1511
Symmetric choice reduction at 14 with 1 rule applications. Total rules 2875 place count 861 transition count 1511
Constant places removed 1 places and 8 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 2876 place count 860 transition count 1503
Symmetric choice reduction at 15 with 1 rule applications. Total rules 2877 place count 860 transition count 1503
Constant places removed 1 places and 8 transitions.
Iterating post reduction 15 with 1 rules applied. Total rules applied 2878 place count 859 transition count 1495
Symmetric choice reduction at 16 with 1 rule applications. Total rules 2879 place count 859 transition count 1495
Constant places removed 1 places and 8 transitions.
Iterating post reduction 16 with 1 rules applied. Total rules applied 2880 place count 858 transition count 1487
Symmetric choice reduction at 17 with 1 rule applications. Total rules 2881 place count 858 transition count 1487
Constant places removed 1 places and 8 transitions.
Iterating post reduction 17 with 1 rules applied. Total rules applied 2882 place count 857 transition count 1479
Symmetric choice reduction at 18 with 1 rule applications. Total rules 2883 place count 857 transition count 1479
Constant places removed 1 places and 8 transitions.
Iterating post reduction 18 with 1 rules applied. Total rules applied 2884 place count 856 transition count 1471
Symmetric choice reduction at 19 with 1 rule applications. Total rules 2885 place count 856 transition count 1471
Constant places removed 1 places and 8 transitions.
Iterating post reduction 19 with 1 rules applied. Total rules applied 2886 place count 855 transition count 1463
Symmetric choice reduction at 20 with 1 rule applications. Total rules 2887 place count 855 transition count 1463
Constant places removed 1 places and 8 transitions.
Iterating post reduction 20 with 1 rules applied. Total rules applied 2888 place count 854 transition count 1455
Symmetric choice reduction at 21 with 1 rule applications. Total rules 2889 place count 854 transition count 1455
Constant places removed 1 places and 8 transitions.
Iterating post reduction 21 with 1 rules applied. Total rules applied 2890 place count 853 transition count 1447
Symmetric choice reduction at 22 with 1 rule applications. Total rules 2891 place count 853 transition count 1447
Constant places removed 1 places and 8 transitions.
Iterating post reduction 22 with 1 rules applied. Total rules applied 2892 place count 852 transition count 1439
Symmetric choice reduction at 23 with 1 rule applications. Total rules 2893 place count 852 transition count 1439
Constant places removed 1 places and 8 transitions.
Iterating post reduction 23 with 1 rules applied. Total rules applied 2894 place count 851 transition count 1431
Symmetric choice reduction at 24 with 1 rule applications. Total rules 2895 place count 851 transition count 1431
Constant places removed 1 places and 8 transitions.
Iterating post reduction 24 with 1 rules applied. Total rules applied 2896 place count 850 transition count 1423
Symmetric choice reduction at 25 with 1 rule applications. Total rules 2897 place count 850 transition count 1423
Constant places removed 1 places and 8 transitions.
Iterating post reduction 25 with 1 rules applied. Total rules applied 2898 place count 849 transition count 1415
Symmetric choice reduction at 26 with 1 rule applications. Total rules 2899 place count 849 transition count 1415
Constant places removed 1 places and 8 transitions.
Iterating post reduction 26 with 1 rules applied. Total rules applied 2900 place count 848 transition count 1407
Symmetric choice reduction at 27 with 1 rule applications. Total rules 2901 place count 848 transition count 1407
Constant places removed 1 places and 8 transitions.
Iterating post reduction 27 with 1 rules applied. Total rules applied 2902 place count 847 transition count 1399
Performed 59 Post agglomeration using F-continuation condition.
Constant places removed 59 places and 0 transitions.
Iterating post reduction 28 with 59 rules applied. Total rules applied 2961 place count 788 transition count 1335
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 1 places and 0 transitions.
Iterating post reduction 29 with 1 rules applied. Total rules applied 2962 place count 787 transition count 1344
Applied a total of 2962 rules in 2450 ms. Remains 787 /2430 variables (removed 1643) and now considering 1344/3040 (removed 1696) transitions.
// Phase 1: matrix 1344 rows 787 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1344 rows 787 cols
invariant :p1263 + p1264 = 1
invariant :p11 + -1'p59 + -1'p67 + -1'p72 + -1'p76 = 0
invariant :-1'p924 + -1'p927 + -1'p930 + -1'p933 + -1'p936 + -1'p939 + -1'p942 + -1'p945 + p1225 + p1227 + p1229 = 0
invariant :p1503 + p1507 + p1509 + p1510 + p1512 + p1515 + p1517 + -1'p1518 + -1'p1519 + -1'p1520 = 0
invariant :p1741 + p1743 + p1744 + p1746 + p1747 + p1749 + p1750 + p1752 + p1753 + p1755 + p1756 + p1758 + p1759 + p1761 + p1762 + p1764 + p1765 + -1'p1796 = 0
invariant :p529 + p532 + p535 + p538 + p541 + p544 + p547 + p550 + p822 + p828 + -1'p832 + p836 + p840 + -1'p1204 = 0
invariant :p1817 + p1878 + p1915 + p1949 + p2054 = 1
invariant :p213 + p216 + p218 + p223 + p224 + p235 + p236 + p240 + p241 + p245 + p246 + p249 + p250 + p254 + p255 + p296 + p297 + p333 + p334 + p367 + p368 + p398 + p404 + -1'p474 = 0
invariant :-1'p2293 + -1'p2294 + -1'p2295 + p2297 + p2298 + p2299 = 0
invariant :p132 + p134 + p136 + p137 + p139 + p140 + p142 + p143 + p145 + p146 + p148 + p149 + p151 + p152 + p154 + p155 + p157 + -1'p279 + -1'p282 + -1'p285 + -1'p288 + -1'p322 + -1'p325 + -1'p359 = 0
invariant :-1'p1319 + -1'p1322 + -1'p1325 + -1'p1328 + -1'p1331 + -1'p1334 + -1'p1337 + -1'p1340 + -1'p1417 + p1460 + p1464 + p1466 + p1467 + p1469 + p1470 + p1472 + p1473 + p1475 + p1480 + -1'p1481 + -1'p1482 + -1'p1483 + -1'p1515 + -1'p1549 + -1'p1612 + -1'p1618 + p1622 + p1628 + p1994 = 0
invariant :p1679 + p1683 + p1687 + p1691 + p1695 + p1699 + p1703 + p1707 + p2063 + p2066 + p2069 + p2072 + p2075 + p2078 + p2081 + p2084 + p2087 + -1'p2178 + -1'p2181 + -1'p2184 + -1'p2187 + -1'p2366 + -1'p2374 + -1'p2382 + -1'p2412 + -1'p2420 = 0
invariant :p2060 + p2178 + p2181 + p2184 + p2187 + p2366 + p2374 + p2382 + p2412 + p2420 = 1
invariant :-1'p2255 + -1'p2256 + -1'p2257 + p2262 + p2263 + p2264 = 0
invariant :p922 + p924 + p926 + p927 + p929 + p930 + p932 + p933 + p935 + p936 + p938 + p939 + p941 + p942 + p944 + p945 + p947 + -1'p1069 + -1'p1072 + -1'p1075 + -1'p1078 + -1'p1112 + -1'p1115 + -1'p1149 = 0
invariant :-1'p1679 + -1'p1683 + -1'p1687 + -1'p1691 + -1'p1695 + -1'p1699 + -1'p1703 + -1'p1707 + p2065 + p2068 + p2071 + p2074 + p2077 + p2080 + p2083 + p2086 = 0
invariant :p632 + p693 + p730 + p764 + p869 = 1
invariant :p2121 + p2122 + p2128 + p2130 + p2131 + p2133 + p2134 + p2136 + p2137 + p2139 + p2140 + p2142 + p2143 + p2145 + p2146 + p2148 + p2149 + p2151 + p2152 + p2256 + p2257 + -1'p2263 + -1'p2264 + p2267 + p2268 + -1'p2274 + -1'p2275 + p2278 + p2279 + -1'p2282 + -1'p2283 + p2286 + p2287 + -1'p2290 + -1'p2291 + p2294 + p2295 + -1'p2298 + -1'p2299 + -1'p2301 + p2305 + p2310 + p2311 + -1'p2317 + -1'p2318 + p2321 + p2322 + -1'p2325 + -1'p2326 + -1'p2328 + p2332 + p2337 + p2338 + -1'p2344 + -1'p2345 + -1'p2347 + p2351 = 0
invariant :p1994 + p1996 + p1998 + p2005 = 1
invariant :p2328 + p2329 + p2330 + -1'p2332 + -1'p2333 + -1'p2334 = 0
invariant :p2356 + p2357 + -1'p2364 + -1'p2365 + -1'p2366 = 0
invariant :p12 + p16 + p20 + p24 + p28 + p32 + p36 + p40 + p44 + p59 + p67 + p72 + p76 + p163 + p166 + p169 + p172 + p175 + p178 + p181 + p184 = 1
invariant :p414 + p433 + -1'p437 + -1'p443 + -1'p809 = 0
invariant :-1'p529 + -1'p532 + -1'p535 + -1'p538 + -1'p541 + -1'p544 + -1'p547 + -1'p550 + p830 + p832 + p834 = 0
invariant :p608 + p611 + p613 + p618 + p619 + p630 + p631 + p635 + p636 + p640 + p641 + p644 + p645 + p649 + p650 + p691 + p692 + p728 + p729 + p762 + p763 + p793 + p799 + -1'p869 = 0
invariant :p237 + p298 + p335 + p369 + p474 = 1
invariant :p1319 + p1322 + p1325 + p1328 + p1331 + p1334 + p1337 + p1340 + p1612 + p1618 + -1'p1622 + p1626 + p1630 + -1'p1994 = 0
invariant :p229 + p232 + p234 + -1'p235 + -1'p236 + -1'p240 + -1'p241 + -1'p245 + -1'p246 + -1'p249 + -1'p250 + -1'p254 + -1'p255 + p298 + p335 + p369 + p474 = 1
invariant :p2376 + p2377 + p2378 + -1'p2380 + -1'p2381 + -1'p2382 = 0
invariant :-1'p1714 + -1'p1717 + -1'p1720 + -1'p1723 + -1'p1726 + -1'p1729 + -1'p1732 + -1'p1735 + p2016 + p2018 + p2019 = 0
invariant :p881 + p1013 + p1014 + p1025 + p1026 + p1030 + p1035 + p1039 + p1044 + p1086 + p1087 + p1123 + p1124 + p1157 + p1158 + p1188 + -1'p1264 = 0
invariant :p431 + p437 + p443 + p809 = 1
invariant :p1793 + p1796 + p1798 + p1803 + p1804 + p1815 + p1816 + p1820 + p1821 + p1825 + p1826 + p1829 + p1830 + p1834 + p1835 + p1876 + p1877 + p1913 + p1914 + p1947 + p1948 + p1978 + p1984 + -1'p2054 = 0
invariant :p355 + p359 + p361 + p364 + p366 + -1'p367 + -1'p368 + -1'p369 = 0
invariant :p1317 + p1319 + p1321 + p1322 + p1324 + p1325 + p1327 + p1328 + p1330 + p1331 + p1333 + p1334 + p1336 + p1337 + p1339 + p1340 + p1342 + -1'p1464 + -1'p1467 + -1'p1470 + -1'p1473 + -1'p1507 + -1'p1510 + -1'p1544 = 0
invariant :p624 + p627 + p629 + -1'p630 + -1'p631 + -1'p635 + -1'p636 + -1'p640 + -1'p641 + -1'p644 + -1'p645 + -1'p649 + -1'p650 + p693 + p730 + p764 + p869 = 1
invariant :-1'p529 + -1'p532 + -1'p535 + -1'p538 + -1'p541 + -1'p544 + -1'p547 + -1'p550 + -1'p627 + p670 + p674 + p676 + p677 + p679 + p680 + p682 + p683 + p685 + p690 + -1'p691 + -1'p692 + -1'p693 + -1'p725 + -1'p759 + -1'p822 + -1'p828 + p832 + p838 + p1204 = 0
invariant :p2115 + p2264 + p2275 + p2283 + p2291 + p2299 + p2307 + p2318 + p2326 + p2334 + p2345 + p2353 = 1
invariant :p134 + p137 + p140 + p143 + p146 + p149 + p152 + p155 + p427 + p433 + -1'p437 + p441 + p445 + -1'p809 = 0
invariant :p1221 + p1227 + p1233 + p1599 = 1
invariant :-1'p2309 + -1'p2310 + -1'p2311 + p2316 + p2317 + p2318 = 0
invariant :-1'p1714 + -1'p1717 + -1'p1720 + -1'p1723 + -1'p1726 + -1'p1729 + -1'p1732 + -1'p1735 + -1'p2005 + -1'p2007 + p2012 + p2018 + -1'p2022 + -1'p2025 + -1'p2121 + p2125 + -1'p2130 + -1'p2133 + -1'p2136 + -1'p2139 + -1'p2142 + -1'p2145 + -1'p2148 + -1'p2151 + -1'p2256 + -1'p2257 + p2263 + -1'p2267 + p2274 + -1'p2278 + p2282 + -1'p2286 + p2290 + -1'p2294 + p2298 + p2301 + -1'p2305 + -1'p2307 + -1'p2310 + p2317 + -1'p2321 + p2325 + p2328 + -1'p2332 + -1'p2334 + -1'p2337 + p2344 + p2347 + -1'p2351 + -1'p2353 = -1
invariant :p1003 + p1006 + p1008 + p1013 + p1014 + p1025 + p1026 + p1030 + p1031 + p1035 + p1036 + p1039 + p1040 + p1044 + p1045 + p1086 + p1087 + p1123 + p1124 + p1157 + p1158 + p1188 + p1194 + -1'p1264 = 0
invariant :p2394 + p2402 + -1'p2410 + -1'p2411 + -1'p2412 = 0
invariant :p924 + p927 + p930 + p933 + p936 + p939 + p942 + p945 + p1022 + p1083 + p1120 + p1154 + p1217 + p1223 + -1'p1227 + -1'p1233 + -1'p1599 = 0
invariant :p1658 + p1659 = 1
invariant :p1671 + p1803 + p1804 + p1815 + p1816 + p1820 + p1825 + p1829 + p1834 + p1876 + p1877 + p1913 + p1914 + p1947 + p1948 + p1978 + -1'p2054 = 0
invariant :p1027 + p1088 + p1125 + p1159 + p1264 = 1
invariant :p1809 + p1812 + p1814 + -1'p1815 + -1'p1816 + -1'p1820 + -1'p1821 + -1'p1825 + -1'p1826 + -1'p1829 + -1'p1830 + -1'p1834 + -1'p1835 + p1878 + p1915 + p1949 + p2054 = 1
invariant :p826 + p832 + p838 + p1204 = 1
invariant :-1'p2266 + -1'p2267 + -1'p2268 + p2273 + p2274 + p2275 = 0
invariant :-1'p2320 + -1'p2321 + -1'p2322 + p2324 + p2325 + p2326 = 0
invariant :p99 + p103 + p107 + p111 + p115 + p119 + p123 + p127 + -1'p558 + -1'p561 + -1'p564 + -1'p567 + -1'p570 + -1'p573 + -1'p576 + -1'p579 = 0
invariant :p473 + p474 = 1
invariant :p1738 + p1796 = 1
invariant :p2360 + p2361 + p2362 + -1'p2364 + -1'p2365 + -1'p2366 = 0
invariant :p1714 + p1717 + p1720 + p1723 + p1726 + p1729 + p1732 + p1735 + p1812 + p1873 + p1910 + p1944 + p2005 + p2007 = 1
invariant :p1616 + p1622 + p1628 + p1994 = 1
invariant :p2118 + p2125 + -1'p2256 + p2263 + -1'p2267 + p2274 + -1'p2278 + p2282 + -1'p2286 + p2290 + -1'p2294 + p2298 + p2301 + p2303 + -1'p2305 + -1'p2307 + -1'p2310 + p2317 + -1'p2321 + p2325 + p2328 + p2330 + -1'p2332 + -1'p2334 + -1'p2337 + p2344 + p2347 + p2349 + -1'p2351 + -1'p2353 = 0
invariant :p130 + p279 + p282 + p285 + p288 + p322 + p325 + p359 = 1
invariant :p809 + p811 + p813 + p828 + -1'p832 + -1'p838 + -1'p1204 = 0
invariant :p1346 + p1348 + p1349 + p1351 + p1352 + p1354 + p1355 + p1357 + p1358 + p1360 + p1361 + p1363 + p1364 + p1366 + p1367 + p1369 + p1370 + -1'p1401 = 0
invariant :p1599 + p1601 + p1603 + p1618 + -1'p1622 + -1'p1628 + -1'p1994 = 0
invariant :p713 + p717 + p719 + p720 + p722 + p725 + p727 + -1'p728 + -1'p729 + -1'p730 = 0
invariant :p318 + p322 + p324 + p325 + p327 + p330 + p332 + -1'p333 + -1'p334 + -1'p335 = 0
invariant :p1276 + p1408 + p1409 + p1420 + p1421 + p1425 + p1430 + p1434 + p1439 + p1481 + p1482 + p1518 + p1519 + p1552 + p1553 + p1583 + -1'p1659 = 0
invariant :p51 + p55 + p59 + p64 + p71 + p72 + p74 + p76 + p433 + -1'p437 + -1'p443 + -1'p809 = 0
invariant :p529 + p532 + p535 + p538 + p541 + p544 + p547 + p550 + p627 + p688 + p725 + p759 + p822 + p828 + -1'p832 + -1'p838 + -1'p1204 = 0
invariant :p2053 + p2054 = 1
invariant :p55 + p59 + p64 + p66 + p67 + p69 + p71 + p72 + p74 + p76 + p433 + -1'p437 + -1'p443 + -1'p809 = 0
invariant :p2347 + p2348 + p2349 + -1'p2351 + -1'p2352 + -1'p2353 = 0
invariant :p2157 + -1'p2362 + -1'p2370 + -1'p2378 + -1'p2416 = 0
invariant :p161 + p163 + p164 + p166 + p167 + p169 + p170 + p172 + p173 + p175 + p176 + p178 + p179 + p181 + p182 + p184 + p185 + -1'p216 = 0
invariant :p1315 + p1464 + p1467 + p1470 + p1473 + p1507 + p1510 + p1544 = 1
invariant :p527 + p529 + p531 + p532 + p534 + p535 + p537 + p538 + p540 + p541 + p543 + p544 + p546 + p547 + p549 + p550 + p552 + -1'p674 + -1'p677 + -1'p680 + -1'p683 + -1'p717 + -1'p720 + -1'p754 = 0
invariant :p1145 + p1149 + p1151 + p1154 + p1156 + -1'p1157 + -1'p1158 + -1'p1159 = 0
invariant :p1898 + p1902 + p1904 + p1905 + p1907 + p1910 + p1912 + -1'p1913 + -1'p1914 + -1'p1915 = 0
invariant :p1422 + p1483 + p1520 + p1554 + p1659 = 1
invariant :p553 + p611 = 1
invariant :-1'p1714 + -1'p1717 + -1'p1720 + -1'p1723 + -1'p1726 + -1'p1729 + -1'p1732 + -1'p1735 + -1'p1812 + p1855 + p1859 + p1861 + p1862 + p1864 + p1865 + p1867 + p1868 + p1870 + p1875 + -1'p1876 + -1'p1877 + -1'p1878 + -1'p1910 + -1'p1944 + -1'p2005 + -1'p2007 = -1
invariant :p1284 + p1288 + p1292 + p1296 + p1300 + p1304 + p1308 + p1312 + -1'p1743 + -1'p1746 + -1'p1749 + -1'p1752 + -1'p1755 + -1'p1758 + -1'p1761 + -1'p1764 = 0
invariant :p96 + p100 + p104 + p108 + p112 + p116 + p120 + p124 + p128 + -1'p223 + -1'p224 + -1'p235 + -1'p236 + -1'p240 + -1'p245 + -1'p249 + -1'p254 + -1'p296 + -1'p297 + -1'p333 + -1'p334 + -1'p367 + -1'p368 + -1'p398 + p474 + p558 + p561 + p564 + p567 + p570 + p573 + p576 + p579 = 1
invariant :p1540 + p1544 + p1546 + p1549 + p1551 + -1'p1552 + -1'p1553 + -1'p1554 = 0
invariant :p1108 + p1112 + p1114 + p1115 + p1117 + p1120 + p1122 + -1'p1123 + -1'p1124 + -1'p1125 = 0
invariant :p1714 + p1717 + p1720 + p1723 + p1726 + p1729 + p1732 + p1735 + p2005 + p2007 + p2022 + p2024 + p2025 = 1
invariant :-1'p1319 + -1'p1322 + -1'p1325 + -1'p1328 + -1'p1331 + -1'p1334 + -1'p1337 + -1'p1340 + p1620 + p1622 + p1624 = 0
invariant :p1281 + p1285 + p1289 + p1293 + p1297 + p1301 + p1305 + p1309 + p1313 + -1'p1408 + -1'p1409 + -1'p1420 + -1'p1421 + -1'p1425 + -1'p1430 + -1'p1434 + -1'p1439 + -1'p1481 + -1'p1482 + -1'p1518 + -1'p1519 + -1'p1552 + -1'p1553 + -1'p1583 + p1659 + p1743 + p1746 + p1749 + p1752 + p1755 + p1758 + p1761 + p1764 = 1
invariant :p1710 + p1859 + p1862 + p1865 + p1868 + p1902 + p1905 + p1939 = 1
invariant :p2368 + p2369 + p2370 + -1'p2372 + -1'p2373 + -1'p2374 = 0
invariant :p15 + p19 + p23 + p27 + p31 + p35 + p39 + p43 + -1'p163 + -1'p166 + -1'p169 + -1'p172 + -1'p175 + -1'p178 + -1'p181 + -1'p184 = 0
invariant :p2127 + -1'p2268 + -1'p2279 + -1'p2287 + -1'p2295 + -1'p2311 + -1'p2322 + -1'p2338 = 0
invariant :p494 + p498 + p502 + p506 + p510 + p514 + p518 + p522 + -1'p953 + -1'p956 + -1'p959 + -1'p962 + -1'p965 + -1'p968 + -1'p971 + -1'p974 = 0
invariant :p2301 + p2302 + p2303 + -1'p2305 + -1'p2306 + -1'p2307 = 0
invariant :-1'p2277 + -1'p2278 + -1'p2279 + p2281 + p2282 + p2283 = 0
invariant :-1'p2336 + -1'p2337 + -1'p2338 + p2343 + p2344 + p2345 = 0
invariant :p2161 + p2362 + p2370 + p2378 + p2416 = 1
invariant :p525 + p674 + p677 + p680 + p683 + p717 + p720 + p754 = 1
invariant :p868 + p869 = 1
invariant :p924 + p927 + p930 + p933 + p936 + p939 + p942 + p945 + p1217 + p1223 + -1'p1227 + p1231 + p1235 + -1'p1599 = 0
invariant :p2178 + p2180 + p2181 + p2183 + p2184 + p2186 + p2187 + p2189 + p2190 + p2251 + p2255 + p2256 + p2257 + p2266 + p2267 + p2268 + p2277 + p2278 + p2279 + p2285 + p2286 + p2287 + p2293 + p2294 + p2295 + p2305 + p2306 + p2307 + p2309 + p2310 + p2311 + p2320 + p2321 + p2322 + p2332 + p2333 + p2334 + p2336 + p2337 + p2338 + p2351 + p2352 + p2353 + p2364 + p2365 + p2366 + p2372 + p2373 + p2374 + p2380 + p2381 + p2382 + p2410 + p2411 + p2412 + p2418 + p2419 + p2420 = 1
invariant :p1319 + p1322 + p1325 + p1328 + p1331 + p1334 + p1337 + p1340 + p1417 + p1478 + p1515 + p1549 + p1612 + p1618 + -1'p1622 + -1'p1628 + -1'p1994 = 0
invariant :p158 + p216 = 1
invariant :p2170 + p2178 + p2180 + p2181 + p2183 + p2184 + p2186 + p2187 + p2189 = 1
invariant :-1'p924 + -1'p927 + -1'p930 + -1'p933 + -1'p936 + -1'p939 + -1'p942 + -1'p945 + -1'p1022 + p1065 + p1069 + p1071 + p1072 + p1074 + p1075 + p1077 + p1078 + p1080 + p1085 + -1'p1086 + -1'p1087 + -1'p1088 + -1'p1120 + -1'p1154 + -1'p1217 + -1'p1223 + p1227 + p1233 + p1599 = 0
invariant :p1935 + p1939 + p1941 + p1944 + p1946 + -1'p1947 + -1'p1948 + -1'p1949 = 0
invariant :p134 + p137 + p140 + p143 + p146 + p149 + p152 + p155 + p232 + p293 + p330 + p364 + p427 + p433 + -1'p437 + -1'p443 + -1'p809 = 0
invariant :p948 + p1006 = 1
invariant :p1204 + p1206 + p1208 + p1223 + -1'p1227 + -1'p1233 + -1'p1599 = 0
invariant :p491 + p495 + p499 + p503 + p507 + p511 + p515 + p519 + p523 + -1'p618 + -1'p619 + -1'p630 + -1'p631 + -1'p635 + -1'p640 + -1'p644 + -1'p649 + -1'p691 + -1'p692 + -1'p728 + -1'p729 + -1'p762 + -1'p763 + -1'p793 + p869 + p953 + p956 + p959 + p962 + p965 + p968 + p971 + p974 = 1
invariant :p920 + p1069 + p1072 + p1075 + p1078 + p1112 + p1115 + p1149 = 1
invariant :p1398 + p1401 + p1403 + p1408 + p1409 + p1420 + p1421 + p1425 + p1426 + p1430 + p1431 + p1434 + p1435 + p1439 + p1440 + p1481 + p1482 + p1518 + p1519 + p1552 + p1553 + p1583 + p1589 + -1'p1659 = 0
invariant :p1712 + p1714 + p1716 + p1717 + p1719 + p1720 + p1722 + p1723 + p1725 + p1726 + p1728 + p1729 + p1731 + p1732 + p1734 + p1735 + p1737 + -1'p1859 + -1'p1862 + -1'p1865 + -1'p1868 + -1'p1902 + -1'p1905 + -1'p1939 = 0
invariant :p2414 + p2415 + p2416 + -1'p2418 + -1'p2419 + -1'p2420 = 0
invariant :p2120 + -1'p2257 + -1'p2303 + -1'p2330 + -1'p2349 = 0
invariant :p91 + p223 + p224 + p235 + p236 + p240 + p245 + p249 + p254 + p296 + p297 + p333 + p334 + p367 + p368 + p398 + -1'p474 = 0
invariant :p486 + p618 + p619 + p630 + p631 + p635 + p640 + p644 + p649 + p691 + p692 + p728 + p729 + p762 + p763 + p793 + -1'p869 = 0
invariant :p1019 + p1022 + p1024 + -1'p1025 + -1'p1026 + -1'p1030 + -1'p1031 + -1'p1035 + -1'p1036 + -1'p1039 + -1'p1040 + -1'p1044 + -1'p1045 + p1088 + p1125 + p1159 + p1264 = 1
invariant :p951 + p953 + p954 + p956 + p957 + p959 + p960 + p962 + p963 + p965 + p966 + p968 + p969 + p971 + p972 + p974 + p975 + -1'p1006 = 0
invariant :p1414 + p1417 + p1419 + -1'p1420 + -1'p1421 + -1'p1425 + -1'p1426 + -1'p1430 + -1'p1431 + -1'p1434 + -1'p1435 + -1'p1439 + -1'p1440 + p1483 + p1520 + p1554 + p1659 = 1
invariant :p750 + p754 + p756 + p759 + p761 + -1'p762 + -1'p763 + -1'p764 = 0
invariant :-1'p134 + -1'p137 + -1'p140 + -1'p143 + -1'p146 + -1'p149 + -1'p152 + -1'p155 + -1'p232 + p275 + p279 + p281 + p282 + p284 + p285 + p287 + p288 + p290 + p295 + -1'p296 + -1'p297 + -1'p298 + -1'p330 + -1'p364 + -1'p427 + -1'p433 + p437 + p443 + p809 = 0
invariant :p1714 + p1717 + p1720 + p1723 + p1726 + p1729 + p1732 + p1735 + p2007 + p2010 + p2013 + -1'p2018 + p2022 + p2025 + p2121 + -1'p2125 + p2130 + p2133 + p2136 + p2139 + p2142 + p2145 + p2148 + p2151 + p2256 + p2257 + -1'p2263 + p2267 + -1'p2274 + p2278 + -1'p2282 + p2286 + -1'p2290 + p2294 + -1'p2298 + -1'p2301 + p2305 + p2307 + p2310 + -1'p2317 + p2321 + -1'p2325 + -1'p2328 + p2332 + p2334 + p2337 + -1'p2344 + -1'p2347 + p2351 + p2353 = 1
invariant :-1'p134 + -1'p137 + -1'p140 + -1'p143 + -1'p146 + -1'p149 + -1'p152 + -1'p155 + p435 + p437 + p439 = 0
invariant :p889 + p893 + p897 + p901 + p905 + p909 + p913 + p917 + -1'p1348 + -1'p1351 + -1'p1354 + -1'p1357 + -1'p1360 + -1'p1363 + -1'p1366 + -1'p1369 = 0
invariant :p886 + p890 + p894 + p898 + p902 + p906 + p910 + p914 + p918 + -1'p1013 + -1'p1014 + -1'p1025 + -1'p1026 + -1'p1030 + -1'p1035 + -1'p1039 + -1'p1044 + -1'p1086 + -1'p1087 + -1'p1123 + -1'p1124 + -1'p1157 + -1'p1158 + -1'p1188 + p1264 + p1348 + p1351 + p1354 + p1357 + p1360 + p1363 + p1366 + p1369 = 1
invariant :p556 + p558 + p559 + p561 + p562 + p564 + p565 + p567 + p568 + p570 + p571 + p573 + p574 + p576 + p577 + p579 + p580 + -1'p611 = 0
invariant :p53 + -1'p55 + -1'p59 + -1'p64 + -1'p71 + -1'p72 + -1'p74 + -1'p76 + -1'p433 + p437 + p443 + p809 = 1
invariant :p1343 + p1401 = 1
invariant :-1'p2285 + -1'p2286 + -1'p2287 + p2289 + p2290 + p2291 = 0
invariant :p1676 + p1679 + p1680 + p1683 + p1684 + p1687 + p1688 + p1691 + p1692 + p1695 + p1696 + p1699 + p1700 + p1703 + p1704 + p1707 + p1708 + -1'p1803 + -1'p1804 + -1'p1815 + -1'p1816 + -1'p1820 + -1'p1825 + -1'p1829 + -1'p1834 + -1'p1876 + -1'p1877 + -1'p1913 + -1'p1914 + -1'p1947 + -1'p1948 + -1'p1978 + p2054 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 22729 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 105 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
LTSmin run took 10251 ms.
FORMULA ASLink-PT-05b-ReachabilityDeadlock-0 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527799613917

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 8:43:18 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 31, 2018 8:43:18 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 8:43:18 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 302 ms
May 31, 2018 8:43:18 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2430 places.
May 31, 2018 8:43:18 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3040 transitions.
May 31, 2018 8:43:18 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 31, 2018 8:43:18 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 102 ms
May 31, 2018 8:43:19 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 726 ms
May 31, 2018 8:43:19 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 21 ms
May 31, 2018 8:43:20 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3040 transitions.
May 31, 2018 8:43:24 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 10 ms
May 31, 2018 8:43:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1344 transitions.
May 31, 2018 8:43:25 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 130 place invariants in 398 ms
May 31, 2018 8:43:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 787 variables to be positive in 2059 ms
May 31, 2018 8:43:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1344 transitions.
May 31, 2018 8:43:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1344 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 8:43:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 194 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 8:43:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1344 transitions.
May 31, 2018 8:43:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 72 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 8:43:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1344 transitions.
May 31, 2018 8:43:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/1344) took 3016 ms. Total solver calls (SAT/UNSAT): 851(788/63)
May 31, 2018 8:43:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/1344) took 6132 ms. Total solver calls (SAT/UNSAT): 4025(3962/63)
May 31, 2018 8:43:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/1344) took 9135 ms. Total solver calls (SAT/UNSAT): 7076(7013/63)
May 31, 2018 8:43:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/1344) took 12154 ms. Total solver calls (SAT/UNSAT): 10230(10167/63)
May 31, 2018 8:43:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/1344) took 15174 ms. Total solver calls (SAT/UNSAT): 13441(13378/63)
May 31, 2018 8:43:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/1344) took 18250 ms. Total solver calls (SAT/UNSAT): 16943(15892/1051)
May 31, 2018 8:43:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/1344) took 21300 ms. Total solver calls (SAT/UNSAT): 21330(16094/5236)
May 31, 2018 8:43:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(215/1344) took 24351 ms. Total solver calls (SAT/UNSAT): 25044(18645/6399)
May 31, 2018 8:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(243/1344) took 27362 ms. Total solver calls (SAT/UNSAT): 28334(21935/6399)
May 31, 2018 8:43:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/1344) took 30382 ms. Total solver calls (SAT/UNSAT): 31480(25081/6399)
May 31, 2018 8:44:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(296/1344) took 33427 ms. Total solver calls (SAT/UNSAT): 34655(28256/6399)
May 31, 2018 8:44:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(326/1344) took 36482 ms. Total solver calls (SAT/UNSAT): 37679(31280/6399)
May 31, 2018 8:44:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(345/1344) took 39536 ms. Total solver calls (SAT/UNSAT): 39689(32975/6714)
May 31, 2018 8:44:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(365/1344) took 42599 ms. Total solver calls (SAT/UNSAT): 42317(35459/6858)
May 31, 2018 8:44:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(388/1344) took 45637 ms. Total solver calls (SAT/UNSAT): 45376(38518/6858)
May 31, 2018 8:44:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(417/1344) took 48699 ms. Total solver calls (SAT/UNSAT): 48477(41547/6930)
May 31, 2018 8:44:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(440/1344) took 51928 ms. Total solver calls (SAT/UNSAT): 50036(42375/7661)
May 31, 2018 8:44:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(470/1344) took 55101 ms. Total solver calls (SAT/UNSAT): 51473(43460/8013)
May 31, 2018 8:44:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(501/1344) took 58202 ms. Total solver calls (SAT/UNSAT): 52977(44617/8360)
May 31, 2018 8:44:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(530/1344) took 61461 ms. Total solver calls (SAT/UNSAT): 54340(45704/8636)
May 31, 2018 8:44:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(552/1344) took 64950 ms. Total solver calls (SAT/UNSAT): 55472(46401/9071)
May 31, 2018 8:44:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(556/1344) took 68321 ms. Total solver calls (SAT/UNSAT): 55858(46651/9207)
May 31, 2018 8:44:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(563/1344) took 71566 ms. Total solver calls (SAT/UNSAT): 56447(47081/9366)
May 31, 2018 8:44:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(582/1344) took 75011 ms. Total solver calls (SAT/UNSAT): 57678(47719/9959)
May 31, 2018 8:44:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(589/1344) took 78291 ms. Total solver calls (SAT/UNSAT): 58317(47842/10475)
May 31, 2018 8:44:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(595/1344) took 82817 ms. Total solver calls (SAT/UNSAT): 58821(47994/10827)
May 31, 2018 8:44:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(600/1344) took 87232 ms. Total solver calls (SAT/UNSAT): 59264(48223/11041)
May 31, 2018 8:44:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(603/1344) took 90882 ms. Total solver calls (SAT/UNSAT): 59515(48373/11142)
May 31, 2018 8:45:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(619/1344) took 94061 ms. Total solver calls (SAT/UNSAT): 60397(48826/11571)
May 31, 2018 8:45:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(625/1344) took 97324 ms. Total solver calls (SAT/UNSAT): 60941(49192/11749)
May 31, 2018 8:45:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(634/1344) took 100895 ms. Total solver calls (SAT/UNSAT): 61720(49675/12045)
May 31, 2018 8:45:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(644/1344) took 103981 ms. Total solver calls (SAT/UNSAT): 62356(50120/12236)
May 31, 2018 8:45:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(712/1344) took 107199 ms. Total solver calls (SAT/UNSAT): 65011(50439/14572)
May 31, 2018 8:45:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(747/1344) took 110237 ms. Total solver calls (SAT/UNSAT): 66815(52243/14572)
May 31, 2018 8:45:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(786/1344) took 113258 ms. Total solver calls (SAT/UNSAT): 67905(53333/14572)
May 31, 2018 8:45:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(847/1344) took 116408 ms. Total solver calls (SAT/UNSAT): 69950(55378/14572)
May 31, 2018 8:45:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(893/1344) took 119445 ms. Total solver calls (SAT/UNSAT): 72064(57492/14572)
May 31, 2018 8:45:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(930/1344) took 122489 ms. Total solver calls (SAT/UNSAT): 73337(58765/14572)
May 31, 2018 8:45:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(983/1344) took 125549 ms. Total solver calls (SAT/UNSAT): 74913(60341/14572)
May 31, 2018 8:45:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1014/1344) took 128573 ms. Total solver calls (SAT/UNSAT): 76857(62212/14645)
May 31, 2018 8:45:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1055/1344) took 131631 ms. Total solver calls (SAT/UNSAT): 78105(63417/14688)
May 31, 2018 8:45:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1060/1344) took 134987 ms. Total solver calls (SAT/UNSAT): 78475(63587/14888)
May 31, 2018 8:45:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1073/1344) took 137997 ms. Total solver calls (SAT/UNSAT): 79224(64197/15027)
May 31, 2018 8:45:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1138/1344) took 141006 ms. Total solver calls (SAT/UNSAT): 80333(65024/15309)
May 31, 2018 8:45:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1249/1344) took 144045 ms. Total solver calls (SAT/UNSAT): 81340(65759/15581)
May 31, 2018 8:45:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1294/1344) took 147054 ms. Total solver calls (SAT/UNSAT): 82342(66189/16153)
May 31, 2018 8:45:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1342/1344) took 150069 ms. Total solver calls (SAT/UNSAT): 83036(66440/16596)
May 31, 2018 8:45:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 150092 ms. Total solver calls (SAT/UNSAT): 83036(66440/16596)
May 31, 2018 8:45:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1344 transitions.
May 31, 2018 8:46:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 21729 ms. Total solver calls (SAT/UNSAT): 11282(0/11282)
May 31, 2018 8:46:19 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 175314ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ASLink-PT-05b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ASLink-PT-05b.tgz
mv ASLink-PT-05b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ASLink-PT-05b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r272-smll-152749148700089"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;