Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 680K
-rw-r--r-- 1 mcc users 3.0K May 29 16:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 29 16:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 28 11:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 28 11:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.2K May 28 07:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.3K May 27 05:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 27 05:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 26 06:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 26 06:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 516K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ASLink-PT-05a, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r272-smll-152749148700080
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ASLink-PT-05a-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527793137247

Flatten gal took : 737 ms
Constant places removed 21 places and 1 transitions.
Reduce isomorphic transitions removed 19 transitions.
Implicit places reduction removed 10 places :[p1068, p1001, p806, p794, p611, p599, p416, p404, p221, p209]
Performed 221 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 271 rules applied. Total rules applied 271 place count 1180 transition count 1586
Constant places removed 274 places and 0 transitions.
Performed 17 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 291 rules applied. Total rules applied 562 place count 906 transition count 1569
Constant places removed 18 places and 0 transitions.
Implicit places reduction removed 6 places :[p978, p783, p588, p393, p206, p199]
Performed 6 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 30 rules applied. Total rules applied 592 place count 882 transition count 1563
Constant places removed 6 places and 0 transitions.
Iterating post reduction 3 with 6 rules applied. Total rules applied 598 place count 876 transition count 1563
Performed 20 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 20 Pre rules applied. Total rules applied 598 place count 876 transition count 1543
Constant places removed 20 places and 0 transitions.
Iterating post reduction 4 with 20 rules applied. Total rules applied 618 place count 856 transition count 1543
Symmetric choice reduction at 5 with 13 rule applications. Total rules 631 place count 856 transition count 1543
Constant places removed 13 places and 46 transitions.
Reduce isomorphic transitions removed 2 transitions.
Implicit places reduction removed 8 places :[p1210, p1071, p969, p774, p579, p384, p190, p23]
Performed 9 Post agglomeration using F-continuation condition.
Iterating post reduction 5 with 32 rules applied. Total rules applied 663 place count 835 transition count 1486
Constant places removed 9 places and 0 transitions.
Iterating post reduction 6 with 9 rules applied. Total rules applied 672 place count 826 transition count 1486
Symmetric choice reduction at 7 with 6 rule applications. Total rules 678 place count 826 transition count 1486
Constant places removed 6 places and 13 transitions.
Iterating post reduction 7 with 6 rules applied. Total rules applied 684 place count 820 transition count 1473
Symmetric choice reduction at 8 with 1 rule applications. Total rules 685 place count 820 transition count 1473
Constant places removed 1 places and 8 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 686 place count 819 transition count 1465
Symmetric choice reduction at 9 with 1 rule applications. Total rules 687 place count 819 transition count 1465
Constant places removed 1 places and 8 transitions.
Iterating post reduction 9 with 1 rules applied. Total rules applied 688 place count 818 transition count 1457
Symmetric choice reduction at 10 with 1 rule applications. Total rules 689 place count 818 transition count 1457
Constant places removed 1 places and 8 transitions.
Iterating post reduction 10 with 1 rules applied. Total rules applied 690 place count 817 transition count 1449
Symmetric choice reduction at 11 with 1 rule applications. Total rules 691 place count 817 transition count 1449
Constant places removed 1 places and 8 transitions.
Iterating post reduction 11 with 1 rules applied. Total rules applied 692 place count 816 transition count 1441
Symmetric choice reduction at 12 with 1 rule applications. Total rules 693 place count 816 transition count 1441
Constant places removed 1 places and 8 transitions.
Iterating post reduction 12 with 1 rules applied. Total rules applied 694 place count 815 transition count 1433
Symmetric choice reduction at 13 with 1 rule applications. Total rules 695 place count 815 transition count 1433
Constant places removed 1 places and 8 transitions.
Iterating post reduction 13 with 1 rules applied. Total rules applied 696 place count 814 transition count 1425
Symmetric choice reduction at 14 with 1 rule applications. Total rules 697 place count 814 transition count 1425
Constant places removed 1 places and 8 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 698 place count 813 transition count 1417
Symmetric choice reduction at 15 with 1 rule applications. Total rules 699 place count 813 transition count 1417
Constant places removed 1 places and 8 transitions.
Iterating post reduction 15 with 1 rules applied. Total rules applied 700 place count 812 transition count 1409
Symmetric choice reduction at 16 with 1 rule applications. Total rules 701 place count 812 transition count 1409
Constant places removed 1 places and 8 transitions.
Iterating post reduction 16 with 1 rules applied. Total rules applied 702 place count 811 transition count 1401
Symmetric choice reduction at 17 with 1 rule applications. Total rules 703 place count 811 transition count 1401
Constant places removed 1 places and 8 transitions.
Iterating post reduction 17 with 1 rules applied. Total rules applied 704 place count 810 transition count 1393
Symmetric choice reduction at 18 with 1 rule applications. Total rules 705 place count 810 transition count 1393
Constant places removed 1 places and 8 transitions.
Iterating post reduction 18 with 1 rules applied. Total rules applied 706 place count 809 transition count 1385
Symmetric choice reduction at 19 with 1 rule applications. Total rules 707 place count 809 transition count 1385
Constant places removed 1 places and 8 transitions.
Iterating post reduction 19 with 1 rules applied. Total rules applied 708 place count 808 transition count 1377
Symmetric choice reduction at 20 with 1 rule applications. Total rules 709 place count 808 transition count 1377
Constant places removed 1 places and 8 transitions.
Iterating post reduction 20 with 1 rules applied. Total rules applied 710 place count 807 transition count 1369
Symmetric choice reduction at 21 with 1 rule applications. Total rules 711 place count 807 transition count 1369
Constant places removed 1 places and 8 transitions.
Iterating post reduction 21 with 1 rules applied. Total rules applied 712 place count 806 transition count 1361
Symmetric choice reduction at 22 with 1 rule applications. Total rules 713 place count 806 transition count 1361
Constant places removed 1 places and 8 transitions.
Iterating post reduction 22 with 1 rules applied. Total rules applied 714 place count 805 transition count 1353
Performed 16 Post agglomeration using F-continuation condition.
Constant places removed 16 places and 0 transitions.
Iterating post reduction 23 with 16 rules applied. Total rules applied 730 place count 789 transition count 1337
Applied a total of 730 rules in 1678 ms. Remains 789 /1211 variables (removed 422) and now considering 1337/1827 (removed 490) transitions.
// Phase 1: matrix 1337 rows 789 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1337 rows 789 cols
invariant :-1'p445 + -1'p447 + -1'p449 + -1'p451 + -1'p453 + -1'p455 + -1'p457 + -1'p459 + p604 + p605 + p606 = 0
invariant :p1072 + p1074 + p1075 + p1076 + p1077 + p1078 + p1079 + p1080 + p1081 = 1
invariant :p1124 + p1125 + p1126 + -1'p1127 + -1'p1128 + -1'p1129 = 0
invariant :p1179 + p1180 + p1181 + -1'p1182 + -1'p1183 + -1'p1184 = 0
invariant :p560 + p562 + p563 + p565 + p566 + -1'p567 + -1'p568 + -1'p576 = 0
invariant :p227 + p228 = 1
invariant :p950 + p952 + p953 + p955 + p956 + -1'p957 + -1'p958 + -1'p966 = 0
invariant :-1'p817 + -1'p819 + -1'p821 + -1'p823 + -1'p825 + -1'p827 + -1'p829 + -1'p831 + p1011 + p1013 + p1015 + p1017 + p1019 + p1021 + p1023 + p1025 = 0
invariant :p98 + p100 + p101 + -1'p102 + -1'p103 + -1'p104 + -1'p105 + -1'p106 + -1'p107 + -1'p108 + -1'p109 + -1'p110 + -1'p111 + p145 + p167 + p187 + p228 = 1
invariant :-1'p640 + -1'p642 + -1'p644 + -1'p646 + -1'p648 + -1'p650 + -1'p652 + -1'p654 + p799 + p800 + p801 = 0
invariant :p1191 + p1192 + -1'p1195 + -1'p1196 + -1'p1197 = 0
invariant :p1198 + p1199 + p1200 + -1'p1201 + -1'p1202 + -1'p1203 = 0
invariant :-1'p232 + -1'p234 + -1'p236 + -1'p238 + -1'p240 + -1'p242 + -1'p244 + -1'p246 + p463 + p465 + p467 + p469 + p471 + p473 + p475 + p477 = 0
invariant :p870 + p871 + p872 + p875 + p881 + p882 + p883 + p884 + p885 + p886 + p887 + p888 + p889 + p890 + p915 + p916 + p937 + p938 + p957 + p958 + p972 + p976 + p982 + -1'p1008 = 0
invariant :p733 + p735 + p736 + p737 + p738 + p740 + p741 + -1'p742 + -1'p743 + -1'p751 = 0
invariant :p343 + p345 + p346 + p347 + p348 + p350 + p351 + -1'p352 + -1'p353 + -1'p361 = 0
invariant :p407 + p410 + p413 + -1'p594 = 0
invariant :p1049 + -1'p1100 + -1'p1108 + -1'p1114 + -1'p1120 + -1'p1132 + -1'p1140 + -1'p1152 = 0
invariant :p1144 + p1145 + p1146 + -1'p1147 + -1'p1148 + -1'p1149 = 0
invariant :p313 + p339 + p361 + p381 + p423 = 1
invariant :p640 + p642 + p644 + p646 + p648 + p650 + p652 + p654 + p684 + p718 + p740 + p760 + p795 + p798 + -1'p800 + -1'p803 + p984 = 1
invariant :p1007 + p1008 = 1
invariant :p593 + p594 = 1
invariant :p35 + p96 + p102 + p103 + p104 + p106 + p108 + p110 + p136 + p137 + p158 + p159 + p178 + p179 + p193 + -1'p228 = 0
invariant :p788 + p789 = 1
invariant :p365 + p367 + p368 + p370 + p371 + -1'p372 + -1'p373 + -1'p381 = 0
invariant :p852 + p853 + p854 + p855 + p856 + p857 + p858 + p859 + p860 + p861 + p862 + p863 + p864 + p865 + p866 + p867 + p868 + -1'p871 = 0
invariant :p1118 + p1119 + p1120 + -1'p1121 + -1'p1122 + -1'p1123 = 0
invariant :p1090 + p1091 + p1092 + -1'p1095 + -1'p1096 + -1'p1097 = 0
invariant :p638 + p709 + p711 + p713 + p715 + p735 + p737 + p757 = 1
invariant :p1130 + p1131 + p1132 + -1'p1135 + -1'p1136 + -1'p1137 = 0
invariant :p91 + p92 + p93 + p96 + p102 + p103 + p104 + p105 + p106 + p107 + p108 + p109 + p110 + p111 + p136 + p137 + p158 + p159 + p178 + p179 + p193 + p197 + p203 + -1'p228 = 0
invariant :p538 + p540 + p541 + p542 + p543 + p545 + p546 + -1'p547 + -1'p548 + -1'p556 = 0
invariant :p55 + p56 + p57 + p58 + p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + p69 + p70 + p71 + -1'p125 + -1'p127 + -1'p129 + -1'p131 + -1'p151 + -1'p153 + -1'p173 = 0
invariant :p619 + p680 + p686 + p687 + p688 + p690 + p692 + p694 + p720 + p721 + p742 + p743 + p762 + p763 + p777 + -1'p813 = 0
invariant :p426 + p428 + p430 + p432 + p434 + p436 + p438 + p440 + p442 + -1'p485 + -1'p491 + -1'p492 + -1'p493 + -1'p495 + -1'p497 + -1'p499 + -1'p525 + -1'p526 + -1'p547 + -1'p548 + -1'p567 + -1'p568 + -1'p582 + p618 + p658 + p660 + p662 + p664 + p666 + p668 + p670 + p672 = 1
invariant :p814 + p875 + p881 + p882 + p883 + p885 + p887 + p889 + p915 + p916 + p937 + p938 + p957 + p958 + p972 + -1'p1008 = 0
invariant :-1'p56 + -1'p58 + -1'p60 + -1'p62 + -1'p64 + -1'p66 + -1'p68 + -1'p70 + p214 + p215 + p216 = 0
invariant :p266 + p286 = 1
invariant :p22 + p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 + p34 + p213 + -1'p215 + -1'p218 + p399 = 1
invariant :p21 + -1'p22 + -1'p25 + -1'p29 + -1'p30 + -1'p31 + -1'p32 + -1'p34 + -1'p213 + p215 + p218 + -1'p399 = 0
invariant :p508 + p534 + p556 + p576 + p618 = 1
invariant :-1'p56 + -1'p58 + -1'p60 + -1'p62 + -1'p64 + -1'p66 + -1'p68 + -1'p70 + -1'p100 + p123 + p125 + p126 + p127 + p128 + p129 + p130 + p131 + p132 + p135 + -1'p136 + -1'p137 + -1'p145 + -1'p156 + -1'p176 + -1'p210 + -1'p213 + p215 + p218 + -1'p399 = -1
invariant :p443 + p514 + p516 + p518 + p520 + p540 + p542 + p562 = 1
invariant :p38 + p40 + p42 + p44 + p46 + p48 + p50 + p52 + p267 + p269 + p271 + p273 + p275 + p277 + p279 + p281 + p283 + -1'p286 = 0
invariant :p1069 + p1169 + p1175 + p1181 + p1200 = 1
invariant :p1067 + -1'p1169 + -1'p1175 + -1'p1181 + -1'p1200 = 0
invariant :p1158 + p1159 + p1160 + -1'p1161 + -1'p1162 + -1'p1163 = 0
invariant :p877 + p879 + p880 + -1'p881 + -1'p882 + -1'p883 + -1'p884 + -1'p885 + -1'p886 + -1'p887 + -1'p888 + -1'p889 + -1'p890 + p924 + p946 + p966 + p1008 = 1
invariant :p657 + p658 + p659 + p660 + p661 + p662 + p663 + p664 + p665 + p666 + p667 + p668 + p669 + p670 + p671 + p672 + p673 + -1'p676 = 0
invariant :p898 + p924 + p946 + p966 + p1008 = 1
invariant :p444 + p445 + p446 + p447 + p448 + p449 + p450 + p451 + p452 + p453 + p454 + p455 + p456 + p457 + p458 + p459 + p460 + -1'p514 + -1'p516 + -1'p518 + -1'p520 + -1'p540 + -1'p542 + -1'p562 = 0
invariant :p212 + p215 + p218 + -1'p399 = 0
invariant :p2 + p4 + p6 + p8 + p10 + p12 + p14 + p16 + p18 + p27 + p30 + p32 + p34 + p74 + p76 + p78 + p80 + p82 + p84 + p86 + p88 = 1
invariant :p703 + p729 + p751 + p771 + p813 = 1
invariant :-1'p399 + p402 + p403 + p408 + -1'p410 + -1'p413 + p594 = 0
invariant :p834 + p835 + p836 + p837 + p838 + p839 + p840 + p841 + p842 + p843 + p844 + p845 + p846 + p847 + p848 + p849 + p850 + -1'p904 + -1'p906 + -1'p908 + -1'p910 + -1'p930 + -1'p932 + -1'p952 = 0
invariant :p248 + p319 + p321 + p323 + p325 + p345 + p347 + p367 = 1
invariant :p617 + p618 = 1
invariant :-1'p835 + -1'p837 + -1'p839 + -1'p841 + -1'p843 + -1'p845 + -1'p847 + -1'p849 + -1'p989 + -1'p990 + p992 + p995 + -1'p997 + -1'p999 + p1048 + p1050 + p1052 + p1054 + p1056 + p1058 + p1060 + p1062 + p1064 + p1066 + -1'p1097 + p1100 + -1'p1105 + p1108 + -1'p1111 + p1114 + -1'p1117 + p1120 + -1'p1123 + -1'p1129 + p1132 + -1'p1137 + p1140 + -1'p1143 + -1'p1149 + p1152 + -1'p1157 + -1'p1163 = -1
invariant :-1'p594 + p597 + p598 + p603 + -1'p605 + -1'p608 + p789 = 0
invariant :p1167 + p1168 + p1169 + -1'p1170 + -1'p1171 + -1'p1172 = 0
invariant :p983 + p984 = 1
invariant :p1045 + p1048 + -1'p1091 + p1096 + -1'p1099 + p1104 + -1'p1107 + p1110 + -1'p1113 + p1116 + -1'p1119 + p1122 + p1124 + p1126 + -1'p1127 + -1'p1129 + -1'p1131 + p1136 + -1'p1139 + p1142 + p1144 + p1146 + -1'p1147 + -1'p1149 + -1'p1151 + p1156 + p1158 + p1160 + -1'p1161 + -1'p1163 = 0
invariant :p1173 + p1174 + p1175 + -1'p1176 + -1'p1177 + -1'p1178 = 0
invariant :p56 + p58 + p60 + p62 + p64 + p66 + p68 + p70 + p100 + p134 + p156 + p176 + p210 + p213 + -1'p215 + -1'p218 + p399 = 1
invariant :p835 + p837 + p839 + p841 + p843 + p845 + p847 + p849 + p990 + p991 + p993 + -1'p995 + p997 + p999 + -1'p1048 + -1'p1050 + -1'p1052 + -1'p1054 + -1'p1056 + -1'p1058 + -1'p1060 + -1'p1062 + -1'p1064 + -1'p1066 + p1097 + -1'p1100 + p1105 + -1'p1108 + p1111 + -1'p1114 + p1117 + -1'p1120 + p1123 + p1129 + -1'p1132 + p1137 + -1'p1140 + p1143 + p1149 + -1'p1152 + p1157 + p1163 = 1
invariant :p232 + p234 + p236 + p238 + p240 + p242 + p244 + p246 + p462 + p464 + p466 + p468 + p470 + p472 + p474 + p476 + p478 + -1'p481 = 0
invariant :p204 + p213 + -1'p215 + -1'p218 + p399 = 1
invariant :-1'p445 + -1'p447 + -1'p449 + -1'p451 + -1'p453 + -1'p455 + -1'p457 + -1'p459 + -1'p489 + p512 + p514 + p515 + p516 + p517 + p518 + p519 + p520 + p521 + p524 + -1'p525 + -1'p526 + -1'p534 + -1'p545 + -1'p565 + -1'p600 + -1'p603 + p605 + p608 + -1'p789 = -1
invariant :-1'p250 + -1'p252 + -1'p254 + -1'p256 + -1'p258 + -1'p260 + -1'p262 + -1'p264 + -1'p294 + p317 + p319 + p320 + p321 + p322 + p323 + p324 + p325 + p326 + p329 + -1'p330 + -1'p331 + -1'p339 + -1'p350 + -1'p370 + -1'p405 + -1'p408 + p410 + p413 + -1'p594 = -1
invariant :p1047 + p1050 + p1051 + p1052 + p1053 + p1054 + p1055 + p1056 + p1057 + p1058 + p1059 + p1060 + p1061 + p1062 + p1063 + p1064 + p1065 + p1066 + p1091 + p1092 + -1'p1096 + -1'p1097 + p1099 + p1100 + -1'p1104 + -1'p1105 + p1107 + p1108 + -1'p1110 + -1'p1111 + p1113 + p1114 + -1'p1116 + -1'p1117 + p1119 + p1120 + -1'p1122 + -1'p1123 + -1'p1124 + p1127 + p1131 + p1132 + -1'p1136 + -1'p1137 + p1139 + p1140 + -1'p1142 + -1'p1143 + -1'p1144 + p1147 + p1151 + p1152 + -1'p1156 + -1'p1157 + -1'p1158 + p1161 = 0
invariant :p461 + p481 = 1
invariant :p682 + p684 + p685 + -1'p686 + -1'p687 + -1'p688 + -1'p689 + -1'p690 + -1'p691 + -1'p692 + -1'p693 + -1'p694 + -1'p695 + p729 + p751 + p771 + p813 = 1
invariant :p1138 + p1139 + p1140 + -1'p1141 + -1'p1142 + -1'p1143 = 0
invariant :p229 + p290 + p296 + p297 + p298 + p300 + p302 + p304 + p330 + p331 + p352 + p353 + p372 + p373 + p387 + -1'p423 = 0
invariant :p1098 + p1099 + p1100 + -1'p1103 + -1'p1104 + -1'p1105 = 0
invariant :p422 + p423 = 1
invariant :-1'p835 + -1'p837 + -1'p839 + -1'p841 + -1'p843 + -1'p845 + -1'p847 + -1'p849 + p994 + p995 + p996 = 0
invariant :p835 + p837 + p839 + p841 + p843 + p845 + p847 + p849 + p879 + p913 + p935 + p955 + p989 + p990 = 1
invariant :p285 + p286 + p287 + p290 + p296 + p297 + p298 + p299 + p300 + p301 + p302 + p303 + p304 + p305 + p330 + p331 + p352 + p353 + p372 + p373 + p387 + p391 + p397 + -1'p423 = 0
invariant :p292 + p294 + p295 + -1'p296 + -1'p297 + -1'p298 + -1'p299 + -1'p300 + -1'p301 + -1'p302 + -1'p303 + -1'p304 + -1'p305 + p339 + p361 + p381 + p423 = 1
invariant :p851 + p871 = 1
invariant :-1'p640 + -1'p642 + -1'p644 + -1'p646 + -1'p648 + -1'p650 + -1'p652 + -1'p654 + -1'p684 + p707 + p709 + p710 + p711 + p712 + p713 + p714 + p715 + p716 + p719 + -1'p720 + -1'p721 + -1'p729 + -1'p740 + -1'p760 + -1'p795 + -1'p798 + p800 + p803 + -1'p984 = -1
invariant :p1164 + p1165 + -1'p1170 + -1'p1171 + -1'p1172 = 0
invariant :p119 + p145 + p167 + p187 + p228 = 1
invariant :p3 + p5 + p7 + p9 + p11 + p13 + p15 + p17 + -1'p74 + -1'p76 + -1'p78 + -1'p80 + -1'p82 + -1'p84 + -1'p86 + -1'p88 = 0
invariant :p1046 + -1'p1092 + -1'p1126 + -1'p1146 + -1'p1160 = 0
invariant :p398 + p399 = 1
invariant :p1009 + p1074 + p1076 + p1078 + p1080 + p1172 + p1178 + p1184 + p1197 + p1203 = 1
invariant :p639 + p640 + p641 + p642 + p643 + p644 + p645 + p646 + p647 + p648 + p649 + p650 + p651 + p652 + p653 + p654 + p655 + -1'p709 + -1'p711 + -1'p713 + -1'p715 + -1'p735 + -1'p737 + -1'p757 = 0
invariant :p445 + p447 + p449 + p451 + p453 + p455 + p457 + p459 + p489 + p523 + p545 + p565 + p600 + p603 + -1'p605 + -1'p608 + p789 = 1
invariant :p816 + p817 + p818 + p819 + p820 + p821 + p822 + p823 + p824 + p825 + p826 + p827 + p828 + p829 + p830 + p831 + p832 + -1'p875 + -1'p881 + -1'p882 + -1'p883 + -1'p885 + -1'p887 + -1'p889 + -1'p915 + -1'p916 + -1'p937 + -1'p938 + -1'p957 + -1'p958 + -1'p972 + p1008 = 1
invariant :p250 + p252 + p254 + p256 + p258 + p260 + p262 + p264 + p405 + p408 + -1'p410 + p412 + p414 + p594 = 1
invariant :p249 + p250 + p251 + p252 + p253 + p254 + p255 + p256 + p257 + p258 + p259 + p260 + p261 + p262 + p263 + p264 + p265 + -1'p319 + -1'p321 + -1'p323 + -1'p325 + -1'p345 + -1'p347 + -1'p367 = 0
invariant :-1'p38 + -1'p40 + -1'p42 + -1'p44 + -1'p46 + -1'p48 + -1'p50 + -1'p52 + p268 + p270 + p272 + p274 + p276 + p278 + p280 + p282 = 0
invariant :p833 + p904 + p906 + p908 + p910 + p930 + p932 + p952 = 1
invariant :p675 + p676 + p677 + p680 + p686 + p687 + p688 + p689 + p690 + p691 + p692 + p693 + p694 + p695 + p720 + p721 + p742 + p743 + p762 + p763 + p777 + p781 + p787 + -1'p813 = 0
invariant :p20 + p22 + p25 + p29 + p30 + p31 + p32 + p34 + p213 + -1'p215 + -1'p218 + p399 = 1
invariant :p621 + p623 + p625 + p627 + p629 + p631 + p633 + p635 + p637 + -1'p680 + -1'p686 + -1'p687 + -1'p688 + -1'p690 + -1'p692 + -1'p694 + -1'p720 + -1'p721 + -1'p742 + -1'p743 + -1'p762 + -1'p763 + -1'p777 + p813 + p853 + p855 + p857 + p859 + p861 + p863 + p865 + p867 = 1
invariant :p928 + p930 + p931 + p932 + p933 + p935 + p936 + -1'p937 + -1'p938 + -1'p946 = 0
invariant :-1'p250 + -1'p252 + -1'p254 + -1'p256 + -1'p258 + -1'p260 + -1'p262 + -1'p264 + p409 + p410 + p411 = 0
invariant :p1074 + p1075 + p1076 + p1077 + p1078 + p1079 + p1080 + p1081 + p1089 + p1095 + p1096 + p1097 + p1103 + p1104 + p1105 + p1109 + p1110 + p1111 + p1115 + p1116 + p1117 + p1121 + p1122 + p1123 + p1127 + p1128 + p1129 + p1135 + p1136 + p1137 + p1141 + p1142 + p1143 + p1147 + p1148 + p1149 + p1155 + p1156 + p1157 + p1161 + p1162 + p1163 + p1170 + p1171 + p1172 + p1176 + p1177 + p1178 + p1182 + p1183 + p1184 + p1195 + p1196 + p1197 + p1201 + p1202 + p1203 = 1
invariant :p56 + p58 + p60 + p62 + p64 + p66 + p68 + p70 + p210 + p213 + -1'p215 + p217 + p219 + p399 = 1
invariant :p1 + -1'p27 + -1'p30 + -1'p32 + -1'p34 = 0
invariant :p54 + p125 + p127 + p129 + p131 + p151 + p153 + p173 = 1
invariant :p755 + p757 + p758 + p760 + p761 + -1'p762 + -1'p763 + -1'p771 = 0
invariant :p797 + p800 + p803 + -1'p984 = 0
invariant :p427 + p429 + p431 + p433 + p435 + p437 + p439 + p441 + -1'p658 + -1'p660 + -1'p662 + -1'p664 + -1'p666 + -1'p668 + -1'p670 + -1'p672 = 0
invariant :p480 + p481 + p482 + p485 + p491 + p492 + p493 + p494 + p495 + p496 + p497 + p498 + p499 + p500 + p525 + p526 + p547 + p548 + p567 + p568 + p582 + p586 + p592 + -1'p618 = 0
invariant :p231 + p232 + p233 + p234 + p235 + p236 + p237 + p238 + p239 + p240 + p241 + p242 + p243 + p244 + p245 + p246 + p247 + -1'p290 + -1'p296 + -1'p297 + -1'p298 + -1'p300 + -1'p302 + -1'p304 + -1'p330 + -1'p331 + -1'p352 + -1'p353 + -1'p372 + -1'p373 + -1'p387 + p423 = 1
invariant :p73 + p74 + p75 + p76 + p77 + p78 + p79 + p80 + p81 + p82 + p83 + p84 + p85 + p86 + p87 + p88 + p89 + -1'p92 = 0
invariant :p149 + p151 + p152 + p153 + p154 + p156 + p157 + -1'p158 + -1'p159 + -1'p167 = 0
invariant :p1044 + p1097 + p1105 + p1111 + p1117 + p1123 + p1129 + p1137 + p1143 + p1149 + p1157 + p1163 = 1
invariant :-1'p835 + -1'p837 + -1'p839 + -1'p841 + -1'p843 + -1'p845 + -1'p847 + -1'p849 + -1'p879 + p902 + p904 + p905 + p906 + p907 + p908 + p909 + p910 + p911 + p914 + -1'p915 + -1'p916 + -1'p924 + -1'p935 + -1'p955 + -1'p989 + -1'p990 = -1
invariant :p487 + p489 + p490 + -1'p491 + -1'p492 + -1'p493 + -1'p494 + -1'p495 + -1'p496 + -1'p497 + -1'p498 + -1'p499 + -1'p500 + p534 + p556 + p576 + p618 = 1
invariant :p602 + p605 + p608 + -1'p789 = 0
invariant :p424 + p485 + p491 + p492 + p493 + p495 + p497 + p499 + p525 + p526 + p547 + p548 + p567 + p568 + p582 + -1'p618 = 0
invariant :p1112 + p1113 + p1114 + -1'p1115 + -1'p1116 + -1'p1117 = 0
invariant :p622 + p624 + p626 + p628 + p630 + p632 + p634 + p636 + -1'p853 + -1'p855 + -1'p857 + -1'p859 + -1'p861 + -1'p863 + -1'p865 + -1'p867 = 0
invariant :p1106 + p1107 + p1108 + -1'p1109 + -1'p1110 + -1'p1111 = 0
invariant :p250 + p252 + p254 + p256 + p258 + p260 + p262 + p264 + p294 + p328 + p350 + p370 + p405 + p408 + -1'p410 + -1'p413 + p594 = 1
invariant :p171 + p173 + p174 + p176 + p177 + -1'p178 + -1'p179 + -1'p187 = 0
invariant :p37 + p38 + p39 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + p49 + p50 + p51 + p52 + p53 + -1'p96 + -1'p102 + -1'p103 + -1'p104 + -1'p106 + -1'p108 + -1'p110 + -1'p136 + -1'p137 + -1'p158 + -1'p159 + -1'p178 + -1'p179 + -1'p193 + p228 = 1
invariant :p1150 + p1151 + p1152 + -1'p1155 + -1'p1156 + -1'p1157 = 0
invariant :p656 + p676 = 1
invariant :p812 + p813 = 1
invariant :-1'p984 + p987 + p988 + p989 = 0
invariant :p817 + p819 + p821 + p823 + p825 + p827 + p829 + p831 + p1010 + p1012 + p1014 + p1016 + p1018 + p1020 + p1022 + p1024 + p1026 + -1'p1074 + -1'p1076 + -1'p1078 + -1'p1080 + -1'p1172 + -1'p1178 + -1'p1184 + -1'p1197 + -1'p1203 = 0
invariant :-1'p789 + p792 + p793 + p798 + -1'p800 + -1'p803 + p984 = 0
invariant :p640 + p642 + p644 + p646 + p648 + p650 + p652 + p654 + p795 + p798 + -1'p800 + p802 + p804 + p984 = 1
invariant :p72 + p92 = 1
invariant :p445 + p447 + p449 + p451 + p453 + p455 + p457 + p459 + p600 + p603 + -1'p605 + p607 + p609 + p789 = 1
invariant :p835 + p837 + p839 + p841 + p843 + p845 + p847 + p849 + p989 + p990 + p997 + p998 + p999 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 21378 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 106 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
LTSmin run took 93090 ms.
FORMULA ASLink-PT-05a-ReachabilityDeadlock-0 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527793392006

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 6:59:00 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 31, 2018 6:59:00 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 6:59:00 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 293 ms
May 31, 2018 6:59:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1211 places.
May 31, 2018 6:59:01 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1827 transitions.
May 31, 2018 6:59:01 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 31, 2018 6:59:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 57 ms
May 31, 2018 6:59:02 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 731 ms
May 31, 2018 6:59:02 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 11 ms
May 31, 2018 6:59:02 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1827 transitions.
May 31, 2018 6:59:05 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 9 ms
May 31, 2018 6:59:05 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1337 transitions.
May 31, 2018 6:59:06 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 134 place invariants in 348 ms
May 31, 2018 6:59:08 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 789 variables to be positive in 1995 ms
May 31, 2018 6:59:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1337 transitions.
May 31, 2018 6:59:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1337 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 6:59:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 255 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 6:59:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1337 transitions.
May 31, 2018 6:59:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 77 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 6:59:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1337 transitions.
May 31, 2018 6:59:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/1337) took 3335 ms. Total solver calls (SAT/UNSAT): 648(548/100)
May 31, 2018 6:59:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/1337) took 6456 ms. Total solver calls (SAT/UNSAT): 3013(1383/1630)
May 31, 2018 6:59:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/1337) took 9478 ms. Total solver calls (SAT/UNSAT): 6049(4419/1630)
May 31, 2018 6:59:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/1337) took 12529 ms. Total solver calls (SAT/UNSAT): 9123(7493/1630)
May 31, 2018 6:59:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/1337) took 15532 ms. Total solver calls (SAT/UNSAT): 11931(10301/1630)
May 31, 2018 6:59:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(165/1337) took 18636 ms. Total solver calls (SAT/UNSAT): 14771(13132/1639)
May 31, 2018 6:59:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(190/1337) took 21670 ms. Total solver calls (SAT/UNSAT): 17871(16232/1639)
May 31, 2018 6:59:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(223/1337) took 24744 ms. Total solver calls (SAT/UNSAT): 21006(19367/1639)
May 31, 2018 6:59:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(275/1337) took 27773 ms. Total solver calls (SAT/UNSAT): 23736(22097/1639)
May 31, 2018 6:59:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/1337) took 30801 ms. Total solver calls (SAT/UNSAT): 28226(22424/5802)
May 31, 2018 6:59:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(379/1337) took 33819 ms. Total solver calls (SAT/UNSAT): 32336(22572/9764)
May 31, 2018 6:59:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(427/1337) took 36897 ms. Total solver calls (SAT/UNSAT): 35412(24973/10439)
May 31, 2018 6:59:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(454/1337) took 40000 ms. Total solver calls (SAT/UNSAT): 38571(28132/10439)
May 31, 2018 6:59:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(489/1337) took 43065 ms. Total solver calls (SAT/UNSAT): 41581(31142/10439)
May 31, 2018 6:59:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(544/1337) took 46149 ms. Total solver calls (SAT/UNSAT): 44271(33823/10448)
May 31, 2018 6:59:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(569/1337) took 49206 ms. Total solver calls (SAT/UNSAT): 47571(37123/10448)
May 31, 2018 7:00:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(598/1337) took 52243 ms. Total solver calls (SAT/UNSAT): 50616(40168/10448)
May 31, 2018 7:00:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(638/1337) took 55276 ms. Total solver calls (SAT/UNSAT): 53436(42988/10448)
May 31, 2018 7:00:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(681/1337) took 58400 ms. Total solver calls (SAT/UNSAT): 55599(44998/10601)
May 31, 2018 7:00:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(700/1337) took 61414 ms. Total solver calls (SAT/UNSAT): 57414(46570/10844)
May 31, 2018 7:00:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(727/1337) took 64466 ms. Total solver calls (SAT/UNSAT): 59460(48319/11141)
May 31, 2018 7:00:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(749/1337) took 67574 ms. Total solver calls (SAT/UNSAT): 62617(51476/11141)
May 31, 2018 7:00:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(774/1337) took 70576 ms. Total solver calls (SAT/UNSAT): 65617(54476/11141)
May 31, 2018 7:00:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(806/1337) took 73633 ms. Total solver calls (SAT/UNSAT): 68545(57404/11141)
May 31, 2018 7:00:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(859/1337) took 76641 ms. Total solver calls (SAT/UNSAT): 71149(59888/11261)
May 31, 2018 7:00:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(882/1337) took 79757 ms. Total solver calls (SAT/UNSAT): 72140(60239/11901)
May 31, 2018 7:00:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(897/1337) took 84038 ms. Total solver calls (SAT/UNSAT): 72871(60647/12224)
May 31, 2018 7:00:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(915/1337) took 87042 ms. Total solver calls (SAT/UNSAT): 73429(60880/12549)
May 31, 2018 7:00:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(939/1337) took 90153 ms. Total solver calls (SAT/UNSAT): 74224(61324/12900)
May 31, 2018 7:00:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(998/1337) took 93167 ms. Total solver calls (SAT/UNSAT): 75758(62498/13260)
May 31, 2018 7:00:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1063/1337) took 96176 ms. Total solver calls (SAT/UNSAT): 77319(63664/13655)
May 31, 2018 7:00:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1132/1337) took 99202 ms. Total solver calls (SAT/UNSAT): 79213(65036/14177)
May 31, 2018 7:00:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1216/1337) took 102229 ms. Total solver calls (SAT/UNSAT): 80461(65965/14496)
May 31, 2018 7:00:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1334/1337) took 105243 ms. Total solver calls (SAT/UNSAT): 81174(66396/14778)
May 31, 2018 7:00:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 105314 ms. Total solver calls (SAT/UNSAT): 81175(66397/14778)
May 31, 2018 7:00:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1337 transitions.
May 31, 2018 7:01:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 21245 ms. Total solver calls (SAT/UNSAT): 10904(0/10904)
May 31, 2018 7:01:15 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 130084ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ASLink-PT-05a"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ASLink-PT-05a.tgz
mv ASLink-PT-05a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ASLink-PT-05a, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r272-smll-152749148700080"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;