Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................................................................
/home/mcc/execution
total 888K
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 80K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.1K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 8.3K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 31K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 26K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 96K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 481K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool mcc4mcc-full
Input is PermAdmissibility-PT-02, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r262-csrt-152732586900138
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-00
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-01
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-02
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-03
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-04
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-05
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-06
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-07
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-08
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-09
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-10
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-11
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-12
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-13
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-14
FORMULA_NAME PermAdmissibility-PT-02-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527525972144


BK_STOP 1527526330684

--------------------
content from stderr:

Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using PermAdmissibility-PT-02 as instance name.
Using PermAdmissibility as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'LTLFireability', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': False, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': True, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': True, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': False, 'Safe': False, 'Deadlock': True, 'Reversible': False, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 626657, 'Memory': 15945.79, 'Tool': 'lola'}, {'Time': 660858, 'Memory': 15944.45, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 1.0x far from the best tool lola.
LTLFireability lola PermAdmissibility-PT-02...

Time: 3600 - MCC
----- Start make prepare stdout -----
----- Start make prepare stderr -----
===========================================================================================
PermAdmissibility-PT-02: translating PT Petri net model.pnml into LoLA format
===========================================================================================
translating PT Petri net complete


checking for too many tokens
===========================================================================================
PermAdmissibility-PT-02: translating PT formula LTLFireability into LoLA format
===========================================================================================
translating formula complete
touch formulae;
----- Start make result stdout -----
----- Start make result stderr -----
LTLFireability @ PermAdmissibility-PT-02 @ 3540 seconds
Makefile:222: recipe for target 'verify' failed
----- Start make result stdout -----
make: [verify] Error 134 (ignored)
----- Start make result stderr -----
lola: LoLA will run for 3540 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 760/65536 symbol table entries, 0 collisions
lola: preprocessing...
lola: finding significant places
lola: 168 places, 592 transitions, 136 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 820 transition conflict sets
lola: TASK
lola: reading formula from PermAdmissibility-PT-02-LTLFireability.task
lola: A ((FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIREABLE(switch8_5_2))) : A (((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)) U (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4))) U G ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)))))) : A ((FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6))) : A (G (((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6)) U F (G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7))))))) : A (F ((FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIREABLE(switch8_5_2)))) : A (X ((X (G ((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)))) U X (X ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3))))))) : A (F ((((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7)) U (FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6))) U X ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7)))))) : A ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2))) : A (F (F (F (F (X (FIREABLE(display2_6_3))))))) : A (X (FIREABLE(switch11_2_4))) : A (F (X (G (G (X (FIREABLE(display2_1_4))))))) : A (X (G (G (FIREABLE(display1_3_7))))) : A (G (X (G (G (G (FIREABLE(display3_3_6))))))) : A (FIREABLE(switch10_2_5)) : A (FIREABLE(switch11_1_4)) : A ((F (X (X (FIREABLE(switch8_1_7)))) U G (FIREABLE(switch9_2_4))))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 221 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A ((FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIREAB... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIREABLE(... (shortened)
lola: processed formula length: 413
lola: 1 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-02-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 1 will run for 236 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)) U (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)) U (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4))) U G ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3))))))
lola: processed formula: A (((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)) U (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10... (shortened)
lola: processed formula length: 2261
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-02-LTLFireability.task
lola: the resulting B\xfcchi automaton has 11 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 28 unused bits
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 33 markings, 33 edges
lola: ========================================
lola: subprocess 2 will run for 252 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A ((FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6)))
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6))
lola: processed formula length: 101
lola: 1 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-02-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 3 will run for 272 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G (((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6)) U F (G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(dis... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (G (((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6)) U F (G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7)))))))
lola: processed formula: A (G (((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6)) U F (G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(dis... (shortened)
lola: processed formula length: 1847
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-02-LTLFireability.task
lola: the resulting B\xfcchi automaton has 2 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 30 unused bits
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 34 markings, 35 edges
lola: ========================================
lola: subprocess 4 will run for 295 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (F ((FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIR... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (F ((FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIREABLE(switch8_5_2))))
lola: processed formula: A (F ((FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIR... (shortened)
lola: processed formula length: 421
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-02-LTLFireability.task
lola: the resulting B\xfcchi automaton has 1 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 31 unused bits
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: LTL model checker
lola: The net satisfies the given formula (language of the product automaton is empty).
lola: 89675 markings, 119436 edges
lola: ========================================
lola: subprocess 5 will run for 321 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (X ((X (G ((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)))) U X (X ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switc... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (X (X ((G ((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4))) U X ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)))))))
lola: processed formula: A (X (X ((G ((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4))) U X ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4... (shortened)
lola: processed formula length: 539
lola: 1 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-02-LTLFireability.task
lola: the resulting B\xfcchi automaton has 8 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 28 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 33 markings, 33 edges
lola: ========================================
lola: subprocess 6 will run for 354 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (F ((((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(disp... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (F ((((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7)) U (FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6))) U X ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7))))))
lola: processed formula: A (F ((((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(disp... (shortened)
lola: processed formula length: 5197
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-02-LTLFireability.task
lola: the resulting B\xfcchi automaton has 2 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 30 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: 1026312 markings, 1348537 edges, 205262 markings/sec, 0 secs
lola: 2062227 markings, 2712112 edges, 207183 markings/sec, 5 secs
lola: 3036262 markings, 3955380 edges, 194807 markings/sec, 10 secs
lola: 3966894 markings, 5192221 edges, 186126 markings/sec, 15 secs
lola: 4871547 markings, 6403619 edges, 180931 markings/sec, 20 secs
lola: 5821875 markings, 7663501 edges, 190066 markings/sec, 25 secs
lola: 6705720 markings, 8856510 edges, 176769 markings/sec, 30 secs
lola: 7639998 markings, 10086513 edges, 186856 markings/sec, 35 secs
lola: 8577666 markings, 11332734 edges, 187534 markings/sec, 40 secs
lola: 9524369 markings, 12591877 edges, 189341 markings/sec, 45 secs
lola: 10449864 markings, 13855942 edges, 185099 markings/sec, 50 secs
lola: 11314077 markings, 15196122 edges, 172843 markings/sec, 55 secs
lola: 12244726 markings, 16448174 edges, 186130 markings/sec, 60 secs
lola: 13136891 markings, 17643889 edges, 178433 markings/sec, 65 secs
lola: 14013581 markings, 18827195 edges, 175338 markings/sec, 70 secs
lola: 14836081 markings, 19925627 edges, 164500 markings/sec, 75 secs
lola: 15660339 markings, 21052257 edges, 164852 markings/sec, 80 secs
lola: 16498067 markings, 22285884 edges, 167546 markings/sec, 85 secs
lola: 17406564 markings, 23558774 edges, 181699 markings/sec, 90 secs
lola: 18262923 markings, 24697587 edges, 171272 markings/sec, 95 secs
lola: 19106622 markings, 25822032 edges, 168740 markings/sec, 100 secs
lola: 19954647 markings, 26995640 edges, 169605 markings/sec, 105 secs
lola: 20788079 markings, 28131599 edges, 166686 markings/sec, 110 secs
lola: 21631496 markings, 29294617 edges, 168683 markings/sec, 115 secs
lola: 22461950 markings, 30556379 edges, 166091 markings/sec, 120 secs
lola: 23303683 markings, 31705266 edges, 168347 markings/sec, 125 secs
lola: 24124219 markings, 32838364 edges, 164107 markings/sec, 130 secs
lola: 24934613 markings, 34016501 edges, 162079 markings/sec, 135 secs
lola: 25827717 markings, 35362396 edges, 178621 markings/sec, 140 secs
lola: 26713312 markings, 36583725 edges, 177119 markings/sec, 145 secs
lola: 27570402 markings, 37743133 edges, 171418 markings/sec, 150 secs
lola: 28426287 markings, 38864647 edges, 171177 markings/sec, 155 secs
lola: 29252971 markings, 39976457 edges, 165337 markings/sec, 160 secs
lola: 30063967 markings, 41098156 edges, 162199 markings/sec, 165 secs
lola: 30863621 markings, 42202907 edges, 159931 markings/sec, 170 secs
lola: 31696506 markings, 43348635 edges, 166577 markings/sec, 175 secs
lola: 32500372 markings, 44443372 edges, 160773 markings/sec, 180 secs
lola: 33257231 markings, 45495604 edges, 151372 markings/sec, 185 secs
lola: 34013466 markings, 46490906 edges, 151247 markings/sec, 190 secs
lola: 34760432 markings, 47497815 edges, 149393 markings/sec, 195 secs
lola: 35491822 markings, 48532573 edges, 146278 markings/sec, 200 secs
lola: 36196570 markings, 49634061 edges, 140950 markings/sec, 205 secs
lola: 36979019 markings, 50719419 edges, 156490 markings/sec, 210 secs
lola: 37780043 markings, 51823819 edges, 160205 markings/sec, 215 secs
lola: 38576453 markings, 52928188 edges, 159282 markings/sec, 220 secs
lola: 39391447 markings, 54042328 edges, 162999 markings/sec, 225 secs
lola: 40168854 markings, 55130457 edges, 155481 markings/sec, 230 secs
lola: 40954485 markings, 56229016 edges, 157126 markings/sec, 235 secs
lola: 41726714 markings, 57555111 edges, 154446 markings/sec, 240 secs
lola: 42594128 markings, 58769221 edges, 173483 markings/sec, 245 secs
lola: 43477256 markings, 59962737 edges, 176626 markings/sec, 250 secs
lola: 44389067 markings, 61225638 edges, 182362 markings/sec, 255 secs
lola: 45250379 markings, 62428734 edges, 172262 markings/sec, 260 secs
lola: 46025179 markings, 63525395 edges, 154960 markings/sec, 265 secs
lola: 46800639 markings, 64603133 edges, 155092 markings/sec, 270 secs
lola: 47547958 markings, 65756033 edges, 149464 markings/sec, 275 secs
lola: 48305435 markings, 66824837 edges, 151495 markings/sec, 280 secs
lola: 49044170 markings, 67851770 edges, 147747 markings/sec, 285 secs
lola: 49766317 markings, 69038598 edges, 144429 markings/sec, 290 secs
lola: 50637116 markings, 70302697 edges, 174160 markings/sec, 295 secs
lola: 51514704 markings, 71469788 edges, 175518 markings/sec, 300 secs
lola: 52363606 markings, 72599344 edges, 169780 markings/sec, 305 secs
lola: 53210986 markings, 73766755 edges, 169476 markings/sec, 310 secs
lola: 54033170 markings, 74883496 edges, 164437 markings/sec, 315 secs
lola: 54845302 markings, 76022836 edges, 162426 markings/sec, 320 secs
lola: 55675467 markings, 77234295 edges, 166033 markings/sec, 325 secs
lola: 56530626 markings, 78400607 edges, 171032 markings/sec, 330 secs
lola: 57362327 markings, 79563374 edges, 166340 markings/sec, 335 secs
lola: 58192400 markings, 80770409 edges, 166015 markings/sec, 340 secs
lola: 59073804 markings, 81952904 edges, 176281 markings/sec, 345 secs
lola: local time limit reached - aborting
lola: Child process aborted or communication problem between parent and child process
terminate called after throwing an instance of 'std::runtime_error'
what(): parse error at position 0: unexpected character, last read: '\ufffd'
Aborted (core dumped)
FORMULA PermAdmissibility-PT-02-LTLFireability-0 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-1 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-2 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-3 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-4 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-5 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-6 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-7 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-8 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-9 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-10 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-11 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-12 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-13 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-14 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-LTLFireability-15 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
----- Kill lola and sara stdout -----
----- Kill lola and sara stderr -----
----- Finished stderr -----
----- Finished stdout -----

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-02"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="mcc4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-02.tgz
mv PermAdmissibility-PT-02 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool mcc4mcc-full"
echo " Input is PermAdmissibility-PT-02, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r262-csrt-152732586900138"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;