Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 54K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is PermAdmissibility-COL-01, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732585900123
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-00
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-01
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-02
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-03
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-04
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-05
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-06
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-07
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-08
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-09
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-10
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-11
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-12
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-13
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-14
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527503182943

10:26:25.517 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
10:26:25.519 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(F("((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)<=c14_0)"))))
Formula 0 simplified : !GF"((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)<=c14_0)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :c20_0 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -1'aux5_2 + 2'c110_0 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :c18_0 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + aux8_0 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_2 + -1'aux7_2 + -2'c9_0 + -1'aux5_2 + -1'c12_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :aux9_1 + aux10_1 + aux11_1 + aux12_1 + in1_1 + in3_1 + in2_1 + in4_1 + aux8_1 + aux6_1 + aux7_1 + aux5_1 + aux16_1 + aux13_1 + aux15_1 + aux14_1 + -1'out1_0 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out5_1 + out4_1 + out3_1 + out2_0 + 2'out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_1 + out7_1 + out6_1 = 1
invariant :4'c16_0 + 4'c13_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_2 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + aux13_0 + aux13_1 + 3'aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + 4'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + out3_0 + out3_1 + 3'out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + 3'out2_0 + 3'out2_1 + 5'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-10'c16_0 + aux9_0 + aux9_1 + -2'aux9_2 + 3'aux9_3 + 3'aux9_4 + aux9_5 + aux9_6 + 3'aux9_7 + -2'aux10_0 + -2'aux10_1 + -5'aux10_2 + -2'aux10_5 + -2'aux10_6 + 3'aux11_0 + 3'aux11_1 + 5'aux11_3 + 5'aux11_4 + 3'aux11_5 + 3'aux11_6 + 5'aux11_7 + -2'aux12_0 + -2'aux12_1 + -5'aux12_2 + -2'aux12_5 + -2'aux12_6 + -3'in1_2 + 2'in1_3 + 2'in1_4 + 2'in1_7 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -7'in3_2 + -2'in3_3 + -2'in3_4 + -4'in3_5 + -4'in3_6 + -2'in3_7 + -3'in2_2 + 2'in2_3 + 2'in2_4 + 2'in2_7 + 4'in4_0 + 4'in4_1 + in4_2 + 6'in4_3 + 6'in4_4 + 4'in4_5 + 4'in4_6 + 6'in4_7 + -3'aux8_2 + 2'aux8_3 + 2'aux8_4 + 2'aux8_7 + -3'aux6_2 + 2'aux6_3 + 2'aux6_4 + 2'aux6_7 + -3'aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_7 + 4'c9_0 + -2'aux5_0 + -2'aux5_1 + -5'aux5_2 + -2'aux5_5 + -2'aux5_6 + -4'c12_0 + 2'c11_0 + -3'aux16_2 + 2'aux16_3 + 2'aux16_4 + 2'aux16_7 + 2'aux13_0 + 2'aux13_1 + -1'aux13_2 + 4'aux13_3 + 4'aux13_4 + 2'aux13_5 + 2'aux13_6 + 4'aux13_7 + -14'c17_0 + 3'aux15_0 + 3'aux15_1 + 5'aux15_3 + 5'aux15_4 + 3'aux15_5 + 3'aux15_6 + 5'aux15_7 + 2'aux14_0 + 2'aux14_1 + -1'aux14_2 + 4'aux14_3 + 4'aux14_4 + 2'aux14_5 + 2'aux14_6 + 4'aux14_7 + -3'out1_2 + 2'out1_3 + 2'out1_4 + 2'out1_7 + -2'out5_0 + -2'out5_1 + -5'out5_2 + -2'out5_5 + -2'out5_6 + 3'out4_0 + 3'out4_1 + 5'out4_3 + 5'out4_4 + 3'out4_5 + 3'out4_6 + 5'out4_7 + 2'out3_0 + 2'out3_1 + -1'out3_2 + 4'out3_3 + 4'out3_4 + 2'out3_5 + 2'out3_6 + 4'out3_7 + -9'out2_0 + -9'out2_1 + -12'out2_2 + -7'out2_3 + -7'out2_4 + -9'out2_5 + -9'out2_6 + -7'out2_7 + -2'out8_0 + -2'out8_1 + -5'out8_2 + -2'out8_5 + -2'out8_6 + 4'out7_0 + 4'out7_1 + out7_2 + 6'out7_3 + 6'out7_4 + 4'out7_5 + 4'out7_6 + 6'out7_7 + 4'out6_0 + 4'out6_1 + out6_2 + 6'out6_3 + 6'out6_4 + 4'out6_5 + 4'out6_6 + 6'out6_7 = 3
invariant :2'c16_0 + 2'aux9_0 + aux9_1 + 2'aux9_2 + aux9_3 + aux9_4 + aux9_5 + aux9_6 + aux9_7 + aux10_0 + aux10_2 + -1'aux11_1 + -1'aux11_3 + -1'aux11_4 + -1'aux11_5 + -1'aux11_6 + -1'aux11_7 + aux12_0 + aux12_2 + in1_0 + in1_2 + in3_0 + in3_2 + in2_0 + in2_2 + in4_0 + in4_2 + -1'aux8_1 + -1'aux8_3 + -1'aux8_4 + -1'aux8_5 + -1'aux8_6 + -1'aux8_7 + aux6_0 + aux6_2 + aux7_0 + aux7_2 + 2'c9_0 + aux5_0 + aux5_2 + c12_0 + -1'aux16_1 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + aux13_0 + aux13_2 + 4'c17_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_2 + out1_0 + out1_2 + out5_0 + out5_2 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_0 + out3_2 + 4'out2_0 + 3'out2_1 + 4'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + out8_0 + out8_2 + -1'out7_1 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_1 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + -2'aux9_5 + -2'aux9_6 + -2'aux9_7 + 2'c6_0 + 4'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -4'in4_0 + -4'in4_1 + -4'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -4'c9_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = -4
invariant :-2'c16_0 + -2'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_0 + -1'aux10_2 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_0 + -1'aux12_2 + -1'in1_0 + -1'in1_2 + -1'in3_0 + -1'in3_2 + in2_1 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -2'in4_0 + -1'in4_1 + -2'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_0 + -1'aux6_2 + -1'aux7_0 + -1'aux7_2 + -2'c9_0 + -1'aux5_0 + -1'aux5_2 + -1'c12_0 + aux16_1 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -1'aux13_0 + -1'aux13_2 + -4'c17_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_2 + -1'out1_0 + -1'out1_2 + -1'out5_0 + -1'out5_2 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_2 + -4'out2_0 + -3'out2_1 + -4'out2_2 + -3'out2_3 + -3'out2_4 + -3'out2_5 + -3'out2_6 + -3'out2_7 + -1'out8_0 + -1'out8_2 + out7_1 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_1 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = -2
invariant :-2'c16_0 + 3'aux9_0 + 3'aux9_1 + 2'aux9_2 + 3'aux9_3 + 3'aux9_4 + 3'aux9_5 + 3'aux9_6 + 3'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + 4'in4_0 + 4'in4_1 + 3'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + -1'aux8_2 + -1'aux6_2 + 2'aux7_0 + 2'aux7_1 + aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 4'c9_0 + -1'aux5_2 + 2'c11_0 + -1'aux16_2 + 2'aux13_0 + 2'aux13_1 + aux13_2 + 2'aux13_3 + 2'aux13_4 + 2'aux13_5 + 2'aux13_6 + 2'aux13_7 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + 2'aux14_0 + 2'aux14_1 + aux14_2 + 2'aux14_3 + 2'aux14_4 + 2'aux14_5 + 2'aux14_6 + 2'aux14_7 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + 2'out3_0 + 2'out3_1 + out3_2 + 2'out3_3 + 2'out3_4 + 2'out3_5 + 2'out3_6 + 2'out3_7 + out2_0 + out2_1 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out8_2 + 2'out7_0 + 2'out7_1 + out7_2 + 2'out7_3 + 2'out7_4 + 2'out7_5 + 2'out7_6 + 2'out7_7 + 2'out6_0 + 2'out6_1 + out6_2 + 2'out6_3 + 2'out6_4 + 2'out6_5 + 2'out6_6 + 2'out6_7 = 7
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + in3_3 + in2_3 + in4_3 + aux8_3 + aux6_3 + aux7_3 + aux5_3 + aux16_3 + aux13_3 + aux15_3 + aux14_3 + out1_3 + out5_3 + out4_3 + out3_3 + out2_3 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 + out7_0 + out7_1 + out7_2 + 2'out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_3 = 1
invariant :6'c16_0 + aux9_0 + -1'aux9_1 + 2'aux9_2 + -1'aux9_3 + -1'aux9_4 + aux9_5 + aux9_6 + -1'aux9_7 + 2'aux10_0 + 3'aux10_2 + 2'aux10_5 + 2'aux10_6 + -1'aux11_0 + -3'aux11_1 + -3'aux11_3 + -3'aux11_4 + -1'aux11_5 + -1'aux11_6 + -3'aux11_7 + 2'aux12_0 + 3'aux12_2 + 2'aux12_5 + 2'aux12_6 + -2'in1_1 + in1_2 + -2'in1_3 + -2'in1_4 + -2'in1_7 + 4'in3_0 + 2'in3_1 + 5'in3_2 + 2'in3_3 + 2'in3_4 + 4'in3_5 + 4'in3_6 + 2'in3_7 + -2'in2_1 + in2_2 + -2'in2_3 + -2'in2_4 + -2'in2_7 + -2'in4_1 + in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_7 + -2'aux8_1 + aux8_2 + -2'aux8_3 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 3'aux6_2 + 2'aux6_5 + 2'aux6_6 + -2'aux7_1 + aux7_2 + -2'aux7_3 + -2'aux7_4 + -2'aux7_7 + 2'aux5_0 + 3'aux5_2 + 2'aux5_5 + 2'aux5_6 + 2'c12_0 + -2'c11_0 + -2'aux16_1 + aux16_2 + -2'aux16_3 + -2'aux16_4 + -2'aux16_7 + -2'aux13_1 + aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_7 + 10'c17_0 + -1'aux15_0 + -3'aux15_1 + -3'aux15_3 + -3'aux15_4 + -1'aux15_5 + -1'aux15_6 + -3'aux15_7 + -2'aux14_1 + aux14_2 + -2'aux14_3 + -2'aux14_4 + -2'aux14_7 + 2'out1_0 + 3'out1_2 + 2'out1_5 + 2'out1_6 + 2'out5_0 + 3'out5_2 + 2'out5_5 + 2'out5_6 + -1'out4_0 + -3'out4_1 + -3'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -3'out4_7 + -2'out3_1 + out3_2 + -2'out3_3 + -2'out3_4 + -2'out3_7 + 7'out2_0 + 5'out2_1 + 8'out2_2 + 5'out2_3 + 5'out2_4 + 7'out2_5 + 7'out2_6 + 5'out2_7 + 2'out8_0 + 3'out8_2 + 2'out8_5 + 2'out8_6 + -2'out7_0 + -4'out7_1 + -1'out7_2 + -4'out7_3 + -4'out7_4 + -2'out7_5 + -2'out7_6 + -4'out7_7 + -2'out6_0 + -4'out6_1 + -1'out6_2 + -4'out6_3 + -4'out6_4 + -2'out6_5 + -2'out6_6 + -4'out6_7 = 1
invariant :aux9_7 + aux10_7 + aux11_7 + aux12_7 + in1_7 + in3_7 + in2_7 + in4_7 + aux8_7 + aux6_7 + aux7_7 + aux5_7 + aux16_7 + aux13_7 + aux15_7 + aux14_7 + out1_7 + out5_7 + out4_7 + out3_7 + out2_7 + out8_7 + out7_7 + out6_7 = 1
invariant :2'c16_0 + 2'c15_0 + 2'c17_0 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_3 + 2'out2_4 + 2'out2_5 + 2'out2_6 + 2'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + 4'c7_0 + 4'in3_0 + 4'in3_1 + 3'in3_2 + 4'in3_3 + 4'in3_4 + 4'in3_5 + 4'in3_6 + 4'in3_7 + -1'in2_2 + -4'in4_0 + -4'in4_1 + -5'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -4'c9_0 + 2'aux5_0 + 2'aux5_1 + aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :6'c16_0 + 2'aux9_2 + -2'aux9_3 + -2'aux9_7 + 2'aux10_0 + 2'aux10_1 + 4'aux10_2 + 2'aux10_4 + 2'aux10_5 + 2'aux10_6 + -2'aux11_0 + -2'aux11_1 + -4'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -4'aux11_7 + 2'aux12_2 + -2'aux12_3 + -2'aux12_7 + 2'in1_2 + -2'in1_3 + -2'in1_7 + 2'in3_2 + -2'in3_3 + -2'in3_7 + 2'in2_2 + -2'in2_3 + -2'in2_7 + 2'in4_2 + -2'in4_3 + -2'in4_7 + 2'aux8_2 + -2'aux8_3 + -2'aux8_7 + 2'aux6_2 + -2'aux6_3 + -2'aux6_7 + 2'aux7_2 + -2'aux7_3 + -2'aux7_7 + 2'aux5_2 + -2'aux5_3 + -2'aux5_7 + -4'c11_0 + 2'aux16_2 + -2'aux16_3 + -2'aux16_7 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -3'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -3'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -4'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -4'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -3'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + 2'out1_2 + -2'out1_3 + -2'out1_7 + 2'out5_2 + -2'out5_3 + -2'out5_7 + -2'out4_0 + -2'out4_1 + -4'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -4'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -3'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -3'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 3'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 3'out2_7 + 2'out8_0 + 2'out8_1 + 4'out8_2 + 2'out8_4 + 2'out8_5 + 2'out8_6 + -3'out7_0 + -3'out7_1 + -1'out7_2 + -5'out7_3 + -3'out7_4 + -3'out7_5 + -3'out7_6 + -5'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -3'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -3'out6_7 = -2
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 4'c5_0 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -4'in3_2 + -4'in3_3 + -4'in3_4 + -4'in3_5 + -4'in3_6 + -4'in3_7 + 4'in4_0 + 4'in4_1 + 4'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 4
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -2'c17_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 2'c8_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 4
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in3_5 + in2_5 + in4_5 + aux8_5 + aux6_5 + aux7_5 + aux5_5 + aux16_5 + aux13_5 + aux15_5 + aux14_5 + out1_5 + out5_5 + out4_5 + out3_5 + out2_5 + out8_5 + out7_5 + out6_5 = 1
invariant :c19_0 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c14_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c16_0 + aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in3_2 + in2_2 + in4_2 + aux8_2 + aux6_2 + aux7_2 + aux5_2 + aux16_2 + aux13_2 + 2'c17_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_2 + out1_2 + out5_2 + -1'out4_0 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_2 + out2_0 + out2_1 + 2'out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_2 + out7_2 + out6_2 = 1
invariant :6'c16_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 5'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 5'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-1'aux9_5 + -1'aux10_5 + -1'aux11_5 + -1'aux12_5 + in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -2'in3_5 + -1'in3_6 + -1'in3_7 + -1'in2_5 + -1'in4_5 + -1'aux8_5 + -1'aux6_5 + -1'aux7_5 + -1'aux5_5 + -1'aux16_5 + -1'aux13_5 + -1'aux15_5 + -1'aux14_5 + -1'out1_5 + -1'out5_5 + -1'out4_5 + -1'out3_5 + -1'out2_5 + -1'out8_5 + -1'out7_5 + -1'out6_5 = -1
invariant :out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 = 0
invariant :out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 = 0
Reverse transition relation is NOT exact ! Due to transitions switch11, switch10, switch9, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/13/3/16
Computing Next relation with stutter on 18688 deadlock states
21 unique states visited
0 strongly connected components in search stack
25 transitions explored
17 items max in DFS search stack
4552 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,45.6159,1077224,1,0,54,4.2737e+06,62,59,11869,355892,203
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(("((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)<=c20_0)"))
Formula 1 simplified : !"((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)<=c20_0)"
Computing Next relation with stutter on 18688 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,45.6172,1077540,1,0,54,4.2737e+06,65,59,11880,355892,205
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F((X("((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)<=c5_0)"))U(X("((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)<=c5_0)")))))
Formula 2 simplified : !F(X"((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)<=c5_0)" U X"((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)<=c5_0)")
Computing Next relation with stutter on 18688 deadlock states
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,45.6184,1077540,1,0,54,4.2737e+06,74,60,11891,355893,212
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !(("(c8_0>=3)"))
Formula 3 simplified : !"(c8_0>=3)"
Computing Next relation with stutter on 18688 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,45.6192,1077540,1,0,54,4.2737e+06,79,60,11893,355896,219
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((G(X("(c110_0<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7))"))))
Formula 4 simplified : !GX"(c110_0<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7))"
Computing Next relation with stutter on 18688 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,45.636,1077540,1,0,62,4.27372e+06,85,72,11913,356443,256
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((X((G("((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)>=2)"))U(F("((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)>=1)")))))
Formula 5 simplified : !X(G"((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)>=2)" U F"((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)>=1)")
Computing Next relation with stutter on 18688 deadlock states
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,45.6374,1077720,1,0,62,4.27372e+06,94,72,11923,356443,260
no accepting run found
Formula 5 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !(("(c18_0>=2)"))
Formula 6 simplified : !"(c18_0>=2)"
Computing Next relation with stutter on 18688 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,45.6385,1077720,1,0,62,4.27372e+06,97,72,11925,356443,262
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((F(X(X(X("(c18_0<=(((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7))"))))))
Formula 7 simplified : !FXXX"(c18_0<=(((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7))"
Computing Next relation with stutter on 18688 deadlock states
4 unique states visited
0 strongly connected components in search stack
3 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,45.6403,1077720,1,0,62,4.27372e+06,106,73,11936,356444,269
no accepting run found
Formula 7 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((F(G(("((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)<=(((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7))")U("((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7))")))))
Formula 8 simplified : !FG("((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)<=(((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7))" U "((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7))")
Computing Next relation with stutter on 18688 deadlock states
17 unique states visited
0 strongly connected components in search stack
17 transitions explored
17 items max in DFS search stack
117 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,46.808,1077852,1,0,86,4.27605e+06,122,119,12128,415917,465
no accepting run found
Formula 8 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((F(X(F("(c20_0<=(((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7))")))))
Formula 9 simplified : !FXF"(c20_0<=(((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7))"
Computing Next relation with stutter on 18688 deadlock states
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,46.8098,1077852,1,0,86,4.27605e+06,131,119,12139,415917,469
no accepting run found
Formula 9 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((F("((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)<=(((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7))")))
Formula 10 simplified : !F"((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)<=(((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7))"
Computing Next relation with stutter on 18688 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,46.8112,1077852,1,0,86,4.27605e+06,140,119,12156,415917,473
no accepting run found
Formula 10 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((G(G(("(c11_0>=3)")U("((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)>=3)")))))
Formula 11 simplified : !G("(c11_0>=3)" U "((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)>=3)")
Computing Next relation with stutter on 18688 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,46.8139,1077992,1,0,86,4.27605e+06,156,119,12181,415917,480
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !(("((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)>=3)"))
Formula 12 simplified : !"((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)>=3)"
Computing Next relation with stutter on 18688 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,46.8147,1077992,1,0,86,4.27605e+06,157,119,12181,415917,482
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !(((F(X("(c20_0<=(((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7))")))U(G(G("((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=c19_0)")))))
Formula 13 simplified : !(FX"(c20_0<=(((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7))" U G"((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=c19_0)")
Computing Next relation with stutter on 18688 deadlock states
23 unique states visited
0 strongly connected components in search stack
48 transitions explored
12 items max in DFS search stack
76 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,47.569,1078124,1,0,104,4.2762e+06,172,144,12243,421697,653
no accepting run found
Formula 13 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !((X((G("((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)<=c11_0)"))U(G("(c110_0<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7))")))))
Formula 14 simplified : !X(G"((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)<=c11_0)" U G"(c110_0<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7))")
Computing Next relation with stutter on 18688 deadlock states
20 unique states visited
9 strongly connected components in search stack
34 transitions explored
13 items max in DFS search stack
85 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,48.4142,1078928,1,0,125,4.27789e+06,191,181,12320,435127,883
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((G(X("((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)>=3)"))))
Formula 15 simplified : !GX"((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)>=3)"
Computing Next relation with stutter on 18688 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,48.4167,1078928,1,0,125,4.27789e+06,197,181,12336,435129,891
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527503242335

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 10:26:24 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 10:26:24 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 10:26:25 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 10:26:25 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 982 ms
May 28, 2018 10:26:25 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
May 28, 2018 10:26:25 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 10:26:25 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->aux9,aux10,aux11,aux12,in1,in3,in2,in4,aux8,aux6,aux7,aux5,aux16,aux13,aux15,aux14,out1,out5,out4,out3,out2,out8,out7,out6,
Dot->c16,c15,c14,c13,c6,c5,c8,c7,c9,c12,c110,c11,c17,c20,c18,c19,

May 28, 2018 10:26:26 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
May 28, 2018 10:26:26 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 10:26:26 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
May 28, 2018 10:26:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 212 ms
May 28, 2018 10:26:28 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 34 ms
May 28, 2018 10:26:28 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 2 ms
May 28, 2018 10:26:28 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 28, 2018 10:26:28 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
May 28, 2018 10:26:29 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 246 ms
May 28, 2018 10:26:32 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 2971 ms
May 28, 2018 10:26:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1024 transitions.
May 28, 2018 10:26:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1024 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:26:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 135 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:26:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1024 transitions.
May 28, 2018 10:26:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 69 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:26:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1024 transitions.
May 28, 2018 10:26:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1024) took 4193 ms. Total solver calls (SAT/UNSAT): 1023(335/688)
May 28, 2018 10:26:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1/1024) took 8534 ms. Total solver calls (SAT/UNSAT): 2045(670/1375)
May 28, 2018 10:26:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/1024) took 12475 ms. Total solver calls (SAT/UNSAT): 3066(1005/2061)
May 28, 2018 10:26:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/1024) took 17546 ms. Total solver calls (SAT/UNSAT): 4086(1340/2746)
May 28, 2018 10:27:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/1024) took 21804 ms. Total solver calls (SAT/UNSAT): 5105(1675/3430)
May 28, 2018 10:27:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/1024) took 28772 ms. Total solver calls (SAT/UNSAT): 7140(2263/4877)
May 28, 2018 10:27:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/1024) took 35556 ms. Total solver calls (SAT/UNSAT): 9171(2855/6316)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 28, 2018 10:27:21 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 53532ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-01"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-01.tgz
mv PermAdmissibility-COL-01 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is PermAdmissibility-COL-01, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732585900123"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;