fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r261-csrt-152732585800039
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for LamportFastMutEx-PT-6

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15755.520 2236170.00 3629800.00 813.90 FTFFFFF?FFFFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................................................
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 39K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 26K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 36K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 200K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is LamportFastMutEx-PT-6, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732585800039
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-00
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-01
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-02
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-03
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-04
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-05
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-06
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-07
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-08
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-09
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-10
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-11
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-12
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-13
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-14
FORMULA_NAME LamportFastMutEx-PT-6-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527499803264

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(F(F("(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3)")))))
Formula 0 simplified : !GF"(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_3_0 + P_done_3_0 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5497 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 103 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 276 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((<>((LTLAP1==true)))U(<>((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 239 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([]([](X((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 66 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 345 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(([]((LTLAP6==true)))U([]((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 283 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X(<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X(<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 239 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 284 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 402 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X([]((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 59 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 263 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP15==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 303 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11125 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>([]((LTLAP17==true))))U(X([]((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 524 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 693609 ms.
FORMULA LamportFastMutEx-PT-6-LTLCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X(<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X(<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
sparsehash FATAL ERROR: failed to allocate 24 groups

BK_STOP 1527502039434

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 9:30:05 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 9:30:05 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 9:30:05 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 85 ms
May 28, 2018 9:30:05 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 217 places.
May 28, 2018 9:30:05 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 420 transitions.
May 28, 2018 9:30:05 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 27 ms
May 28, 2018 9:30:05 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 149 ms
May 28, 2018 9:30:05 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 5 ms
May 28, 2018 9:30:05 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
May 28, 2018 9:30:06 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
May 28, 2018 9:30:06 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 77 ms
May 28, 2018 9:30:07 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 588 ms
May 28, 2018 9:30:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 420 transitions.
May 28, 2018 9:30:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/420 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 9:30:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 33 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 9:30:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 420 transitions.
May 28, 2018 9:30:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 9:30:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 420 transitions.
May 28, 2018 9:30:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/420) took 39 ms. Total solver calls (SAT/UNSAT): 65(0/65)
May 28, 2018 9:30:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/420) took 3979 ms. Total solver calls (SAT/UNSAT): 3411(163/3248)
May 28, 2018 9:30:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/420) took 7494 ms. Total solver calls (SAT/UNSAT): 4244(228/4016)
May 28, 2018 9:30:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/420) took 10733 ms. Total solver calls (SAT/UNSAT): 7746(393/7353)
May 28, 2018 9:30:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/420) took 14087 ms. Total solver calls (SAT/UNSAT): 8400(439/7961)
May 28, 2018 9:30:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/420) took 18544 ms. Total solver calls (SAT/UNSAT): 9681(575/9106)
May 28, 2018 9:30:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/420) took 22389 ms. Total solver calls (SAT/UNSAT): 10100(619/9481)
May 28, 2018 9:30:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/420) took 25523 ms. Total solver calls (SAT/UNSAT): 13500(966/12534)
May 28, 2018 9:30:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/420) took 28592 ms. Total solver calls (SAT/UNSAT): 15678(1155/14523)
May 28, 2018 9:30:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/420) took 31741 ms. Total solver calls (SAT/UNSAT): 16941(1302/15639)
May 28, 2018 9:30:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/420) took 35094 ms. Total solver calls (SAT/UNSAT): 17970(1412/16558)
May 28, 2018 9:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/420) took 38344 ms. Total solver calls (SAT/UNSAT): 18963(1449/17514)
May 28, 2018 9:30:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(143/420) took 41538 ms. Total solver calls (SAT/UNSAT): 20076(1517/18559)
May 28, 2018 9:30:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(149/420) took 44914 ms. Total solver calls (SAT/UNSAT): 20991(1616/19375)
May 28, 2018 9:31:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/420) took 48727 ms. Total solver calls (SAT/UNSAT): 21581(1680/19901)
May 28, 2018 9:31:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(160/420) took 52928 ms. Total solver calls (SAT/UNSAT): 22575(1785/20790)
May 28, 2018 9:31:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(167/420) took 56557 ms. Total solver calls (SAT/UNSAT): 23520(1883/21637)
May 28, 2018 9:31:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(173/420) took 60185 ms. Total solver calls (SAT/UNSAT): 24291(1961/22330)
May 28, 2018 9:31:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/420) took 63321 ms. Total solver calls (SAT/UNSAT): 24663(1998/22665)
May 28, 2018 9:31:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(199/420) took 66640 ms. Total solver calls (SAT/UNSAT): 26460(2115/24345)
May 28, 2018 9:31:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(218/420) took 69929 ms. Total solver calls (SAT/UNSAT): 27372(2164/25208)
May 28, 2018 9:31:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(228/420) took 73213 ms. Total solver calls (SAT/UNSAT): 27715(2181/25534)
May 28, 2018 9:31:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(237/420) took 76590 ms. Total solver calls (SAT/UNSAT): 28007(2205/25802)
May 28, 2018 9:31:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(246/420) took 79765 ms. Total solver calls (SAT/UNSAT): 28243(2205/26038)
May 28, 2018 9:31:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(253/420) took 82958 ms. Total solver calls (SAT/UNSAT): 28442(2215/26227)
May 28, 2018 9:31:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(264/420) took 86569 ms. Total solver calls (SAT/UNSAT): 28740(2294/26446)
May 28, 2018 9:31:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(298/420) took 89783 ms. Total solver calls (SAT/UNSAT): 29527(2415/27112)
May 28, 2018 9:31:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(310/420) took 92848 ms. Total solver calls (SAT/UNSAT): 30516(2460/28056)
May 28, 2018 9:31:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(320/420) took 96402 ms. Total solver calls (SAT/UNSAT): 31371(2564/28807)
May 28, 2018 9:31:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(332/420) took 99405 ms. Total solver calls (SAT/UNSAT): 32265(2669/29596)
May 28, 2018 9:31:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(341/420) took 102773 ms. Total solver calls (SAT/UNSAT): 32841(2735/30106)
May 28, 2018 9:31:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(372/420) took 105816 ms. Total solver calls (SAT/UNSAT): 34049(2821/31228)
May 28, 2018 9:32:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(397/420) took 109144 ms. Total solver calls (SAT/UNSAT): 34599(2882/31717)
May 28, 2018 9:32:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 110586 ms. Total solver calls (SAT/UNSAT): 34650(2883/31767)
May 28, 2018 9:32:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 420 transitions.
May 28, 2018 9:32:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 33 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 9:32:02 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 116066ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X(<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-6"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-6.tgz
mv LamportFastMutEx-PT-6 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is LamportFastMutEx-PT-6, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732585800039"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;