Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................................
/home/mcc/execution
total 384K
-rw-r--r-- 1 mcc users 8.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 33K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.9K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 35K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 42K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 98K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-PT-2, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585400160
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-2-LTLFireability-00
FORMULA_NAME Peterson-PT-2-LTLFireability-01
FORMULA_NAME Peterson-PT-2-LTLFireability-02
FORMULA_NAME Peterson-PT-2-LTLFireability-03
FORMULA_NAME Peterson-PT-2-LTLFireability-04
FORMULA_NAME Peterson-PT-2-LTLFireability-05
FORMULA_NAME Peterson-PT-2-LTLFireability-06
FORMULA_NAME Peterson-PT-2-LTLFireability-07
FORMULA_NAME Peterson-PT-2-LTLFireability-08
FORMULA_NAME Peterson-PT-2-LTLFireability-09
FORMULA_NAME Peterson-PT-2-LTLFireability-10
FORMULA_NAME Peterson-PT-2-LTLFireability-11
FORMULA_NAME Peterson-PT-2-LTLFireability-12
FORMULA_NAME Peterson-PT-2-LTLFireability-13
FORMULA_NAME Peterson-PT-2-LTLFireability-14
FORMULA_NAME Peterson-PT-2-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527489528755

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(G(G(X(G("(((EndTurn_2_1>=1)||(EndTurn_1_1>=1))||(EndTurn_0_1>=1))")))))))
Formula 0 simplified : !GXG"(((EndTurn_2_1>=1)||(EndTurn_1_1>=1))||(EndTurn_0_1>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 120
// Phase 1: matrix 120 rows 102 cols
invariant :WantSection_2_T + Idle_2 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :Turn_1_2 + Turn_1_0 + Turn_1_1 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + EndTurn_2_0 + EndTurn_2_1 + BeginLoop_2_0_0 + BeginLoop_2_0_1 + BeginLoop_2_1_0 + BeginLoop_2_1_1 + BeginLoop_2_0_2 + BeginLoop_2_1_2 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_0 + TestIdentity_2_0_1 + TestIdentity_2_1_0 + TestIdentity_2_1_2 + TestIdentity_2_1_1 + TestIdentity_2_0_2 + Idle_2 + AskForSection_2_1 + AskForSection_2_0 + CS_2 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_0_0 + Turn_0_1 + Turn_0_2 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + EndTurn_1_0 + EndTurn_1_1 + BeginLoop_1_0_0 + BeginLoop_1_1_0 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_0_2 + TestAlone_1_0_0 + TestAlone_1_1_0 + TestAlone_1_1_2 + TestAlone_1_0_2 + TestIdentity_1_0_0 + TestTurn_1_0 + TestTurn_1_1 + TestIdentity_1_0_1 + TestIdentity_1_1_1 + TestIdentity_1_1_0 + TestIdentity_1_1_2 + TestIdentity_1_0_2 + Idle_1 + CS_1 + AskForSection_1_1 + AskForSection_1_0 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + EndTurn_0_0 + EndTurn_0_1 + BeginLoop_0_0_0 + BeginLoop_0_1_0 + BeginLoop_0_0_1 + BeginLoop_0_0_2 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + TestAlone_0_0_1 + TestAlone_0_0_2 + TestAlone_0_1_1 + TestTurn_0_0 + TestAlone_0_1_2 + TestIdentity_0_0_0 + TestTurn_0_1 + TestIdentity_0_1_1 + TestIdentity_0_1_0 + TestIdentity_0_0_1 + TestIdentity_0_1_2 + TestIdentity_0_0_2 + Idle_0 + CS_0 + AskForSection_0_1 + AskForSection_0_0 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
Reverse transition relation is NOT exact ! Due to transitions EndLoop_1_0, EndLoop_2_0, EndLoop_0_0, NotAlone_0_2_0, NotAlone_2_1_0, NotAlone_1_2_0, NotAlone_2_1_1, NotAlone_0_2_1, NotAlone_1_2_1, UpdateTurn_0_0_0, UpdateTurn_1_0_0, UpdateTurn_1_1_0, UpdateTurn_2_1_0, UpdateTurn_2_0_0, UpdateTurn_0_1_0, UpdateTurn_0_2_1, UpdateTurn_2_1_1, UpdateTurn_2_2_1, UpdateTurn_1_2_1, UpdateTurn_2_0_1, UpdateTurn_1_0_1, UpdateTurn_1_1_1, UpdateTurn_0_1_1, UpdateTurn_1_2_0, UpdateTurn_0_2_0, UpdateTurn_0_0_1, UpdateTurn_2_2_0, BecomeIdle_2, BecomeIdle_1, BecomeIdle_0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/96/30/126
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
164 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.67118,58640,1,0,256,184092,281,129,3290,176039,279
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA Peterson-PT-2-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !(("((((Idle_1>=1)&&(WantSection_1_F>=1))||((WantSection_2_F>=1)&&(Idle_2>=1)))||((Idle_0>=1)&&(WantSection_0_F>=1)))"))
Formula 1 simplified : !"((((Idle_1>=1)&&(WantSection_1_F>=1))||((WantSection_2_F>=1)&&(Idle_2>=1)))||((Idle_0>=1)&&(WantSection_0_F>=1)))"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.67217,58640,1,0,256,184092,284,129,3302,176039,281
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA Peterson-PT-2-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !(((G(X(X("(((((((Turn_0_1>=1)&&(TestTurn_1_0>=1))||((Turn_0_2>=1)&&(TestTurn_2_0>=1)))||((Turn_0_0>=1)&&(TestTurn_0_0>=1)))||((TestTurn_2_1>=1)&&(Turn_1_2>=1)))||((TestTurn_0_1>=1)&&(Turn_1_0>=1)))||((TestTurn_1_1>=1)&&(Turn_1_1>=1)))"))))U((X("((((((((((((((((((BeginLoop_2_0_1>=1)||(BeginLoop_0_0_2>=1))||(BeginLoop_1_0_2>=1))||(BeginLoop_2_0_2>=1))||(BeginLoop_0_1_0>=1))||(BeginLoop_1_1_0>=1))||(BeginLoop_2_1_0>=1))||(BeginLoop_0_1_1>=1))||(BeginLoop_0_0_0>=1))||(BeginLoop_1_0_0>=1))||(BeginLoop_2_0_0>=1))||(BeginLoop_0_0_1>=1))||(BeginLoop_1_0_1>=1))||(BeginLoop_1_1_2>=1))||(BeginLoop_0_1_2>=1))||(BeginLoop_2_1_1>=1))||(BeginLoop_1_1_1>=1))||(BeginLoop_2_1_2>=1))"))U(F("((((((((((((((((((BeginLoop_2_0_1>=1)||(BeginLoop_0_0_2>=1))||(BeginLoop_1_0_2>=1))||(BeginLoop_2_0_2>=1))||(BeginLoop_0_1_0>=1))||(BeginLoop_1_1_0>=1))||(BeginLoop_2_1_0>=1))||(BeginLoop_0_1_1>=1))||(BeginLoop_0_0_0>=1))||(BeginLoop_1_0_0>=1))||(BeginLoop_2_0_0>=1))||(BeginLoop_0_0_1>=1))||(BeginLoop_1_0_1>=1))||(BeginLoop_1_1_2>=1))||(BeginLoop_0_1_2>=1))||(BeginLoop_2_1_1>=1))||(BeginLoop_1_1_1>=1))||(BeginLoop_2_1_2>=1))")))))
Formula 2 simplified : !(GXX"(((((((Turn_0_1>=1)&&(TestTurn_1_0>=1))||((Turn_0_2>=1)&&(TestTurn_2_0>=1)))||((Turn_0_0>=1)&&(TestTurn_0_0>=1)))||((TestTurn_2_1>=1)&&(Turn_1_2>=1)))||((TestTurn_0_1>=1)&&(Turn_1_0>=1)))||((TestTurn_1_1>=1)&&(Turn_1_1>=1)))" U (X"((((((((((((((((((BeginLoop_2_0_1>=1)||(BeginLoop_0_0_2>=1))||(BeginLoop_1_0_2>=1))||(BeginLoop_2_0_2>=1))||(BeginLoop_0_1_0>=1))||(BeginLoop_1_1_0>=1))||(BeginLoop_2_1_0>=1))||(BeginLoop_0_1_1>=1))||(BeginLoop_0_0_0>=1))||(BeginLoop_1_0_0>=1))||(BeginLoop_2_0_0>=1))||(BeginLoop_0_0_1>=1))||(BeginLoop_1_0_1>=1))||(BeginLoop_1_1_2>=1))||(BeginLoop_0_1_2>=1))||(BeginLoop_2_1_1>=1))||(BeginLoop_1_1_1>=1))||(BeginLoop_2_1_2>=1))" U F"((((((((((((((((((BeginLoop_2_0_1>=1)||(BeginLoop_0_0_2>=1))||(BeginLoop_1_0_2>=1))||(BeginLoop_2_0_2>=1))||(BeginLoop_0_1_0>=1))||(BeginLoop_1_1_0>=1))||(BeginLoop_2_1_0>=1))||(BeginLoop_0_1_1>=1))||(BeginLoop_0_0_0>=1))||(BeginLoop_1_0_0>=1))||(BeginLoop_2_0_0>=1))||(BeginLoop_0_0_1>=1))||(BeginLoop_1_0_1>=1))||(BeginLoop_1_1_2>=1))||(BeginLoop_0_1_2>=1))||(BeginLoop_2_1_1>=1))||(BeginLoop_1_1_1>=1))||(BeginLoop_2_1_2>=1))"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
8 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.75435,62328,1,0,319,195918,293,145,3338,189033,418
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA Peterson-PT-2-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !(((("((((((((((((TestIdentity_2_0_0>=1)||(TestIdentity_1_0_0>=1))||(TestIdentity_2_0_1>=1))||(TestIdentity_0_0_1>=1))||(TestIdentity_0_1_1>=1))||(TestIdentity_2_1_1>=1))||(TestIdentity_0_1_2>=1))||(TestIdentity_1_1_2>=1))||(TestIdentity_0_0_2>=1))||(TestIdentity_1_0_2>=1))||(TestIdentity_1_1_0>=1))||(TestIdentity_2_1_0>=1))")U("(((EndTurn_2_1>=1)||(EndTurn_1_1>=1))||(EndTurn_0_1>=1))"))U(G(F(X("((((((((((((IsEndLoop_0_0_0>=1)||(IsEndLoop_2_1_0>=1))||(IsEndLoop_1_1_0>=1))||(IsEndLoop_0_1_0>=1))||(IsEndLoop_2_0_1>=1))||(IsEndLoop_1_0_1>=1))||(IsEndLoop_0_0_1>=1))||(IsEndLoop_2_0_0>=1))||(IsEndLoop_1_0_0>=1))||(IsEndLoop_2_1_1>=1))||(IsEndLoop_1_1_1>=1))||(IsEndLoop_0_1_1>=1))"))))))
Formula 3 simplified : !(("((((((((((((TestIdentity_2_0_0>=1)||(TestIdentity_1_0_0>=1))||(TestIdentity_2_0_1>=1))||(TestIdentity_0_0_1>=1))||(TestIdentity_0_1_1>=1))||(TestIdentity_2_1_1>=1))||(TestIdentity_0_1_2>=1))||(TestIdentity_1_1_2>=1))||(TestIdentity_0_0_2>=1))||(TestIdentity_1_0_2>=1))||(TestIdentity_1_1_0>=1))||(TestIdentity_2_1_0>=1))" U "(((EndTurn_2_1>=1)||(EndTurn_1_1>=1))||(EndTurn_0_1>=1))") U GFX"((((((((((((IsEndLoop_0_0_0>=1)||(IsEndLoop_2_1_0>=1))||(IsEndLoop_1_1_0>=1))||(IsEndLoop_0_1_0>=1))||(IsEndLoop_2_0_1>=1))||(IsEndLoop_1_0_1>=1))||(IsEndLoop_0_0_1>=1))||(IsEndLoop_2_0_0>=1))||(IsEndLoop_1_0_0>=1))||(IsEndLoop_2_1_1>=1))||(IsEndLoop_1_1_1>=1))||(IsEndLoop_0_1_1>=1))")
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
85 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.60514,86408,1,0,355,292475,302,146,3362,304004,518
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA Peterson-PT-2-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((("(((EndTurn_2_1>=1)||(EndTurn_1_1>=1))||(EndTurn_0_1>=1))")U(G(F(G("(((EndTurn_0_0>=1)||(EndTurn_1_0>=1))||(EndTurn_2_0>=1))"))))))
Formula 4 simplified : !("(((EndTurn_2_1>=1)||(EndTurn_1_1>=1))||(EndTurn_0_1>=1))" U GFG"(((EndTurn_0_0>=1)||(EndTurn_1_0>=1))||(EndTurn_2_0>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
307 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.66733,159100,1,0,677,643454,315,265,3369,778711,1109
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA Peterson-PT-2-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((F((("((((((IsEndLoop_2_1_2>=1)||(IsEndLoop_0_1_2>=1))||(IsEndLoop_1_1_2>=1))||(IsEndLoop_1_0_2>=1))||(IsEndLoop_2_0_2>=1))||(IsEndLoop_0_0_2>=1))")U("((((CS_2>=1)&&(WantSection_2_T>=1))||((CS_1>=1)&&(WantSection_1_T>=1)))||((CS_0>=1)&&(WantSection_0_T>=1)))"))U(("(((((((((((((WantSection_2_F>=1)&&(TestAlone_0_0_2>=1))||((WantSection_1_F>=1)&&(TestAlone_2_0_1>=1)))||((TestAlone_0_0_1>=1)&&(WantSection_1_F>=1)))||((WantSection_0_F>=1)&&(TestAlone_2_0_0>=1)))||((TestAlone_1_0_0>=1)&&(WantSection_0_F>=1)))||((TestAlone_1_1_0>=1)&&(WantSection_0_F>=1)))||((WantSection_2_F>=1)&&(TestAlone_1_0_2>=1)))||((TestAlone_0_1_1>=1)&&(WantSection_1_F>=1)))||((WantSection_0_F>=1)&&(TestAlone_2_1_0>=1)))||((TestAlone_0_1_2>=1)&&(WantSection_2_F>=1)))||((WantSection_1_F>=1)&&(TestAlone_2_1_1>=1)))||((WantSection_2_F>=1)&&(TestAlone_1_1_2>=1)))")U("(((((((((((((TestTurn_1_1>=1)&&(Turn_1_0>=1))||((TestTurn_1_0>=1)&&(Turn_0_2>=1)))||((TestTurn_0_0>=1)&&(Turn_0_2>=1)))||((TestTurn_2_0>=1)&&(Turn_0_1>=1)))||((TestTurn_0_1>=1)&&(Turn_1_2>=1)))||((Turn_1_1>=1)&&(TestTurn_2_1>=1)))||((TestTurn_0_1>=1)&&(Turn_1_1>=1)))||((TestTurn_2_1>=1)&&(Turn_1_0>=1)))||((TestTurn_0_0>=1)&&(Turn_0_1>=1)))||((Turn_0_0>=1)&&(TestTurn_2_0>=1)))||((TestTurn_1_0>=1)&&(Turn_0_0>=1)))||((TestTurn_1_1>=1)&&(Turn_1_2>=1)))")))))
Formula 5 simplified : !F(("((((((IsEndLoop_2_1_2>=1)||(IsEndLoop_0_1_2>=1))||(IsEndLoop_1_1_2>=1))||(IsEndLoop_1_0_2>=1))||(IsEndLoop_2_0_2>=1))||(IsEndLoop_0_0_2>=1))" U "((((CS_2>=1)&&(WantSection_2_T>=1))||((CS_1>=1)&&(WantSection_1_T>=1)))||((CS_0>=1)&&(WantSection_0_T>=1)))") U ("(((((((((((((WantSection_2_F>=1)&&(TestAlone_0_0_2>=1))||((WantSection_1_F>=1)&&(TestAlone_2_0_1>=1)))||((TestAlone_0_0_1>=1)&&(WantSection_1_F>=1)))||((WantSection_0_F>=1)&&(TestAlone_2_0_0>=1)))||((TestAlone_1_0_0>=1)&&(WantSection_0_F>=1)))||((TestAlone_1_1_0>=1)&&(WantSection_0_F>=1)))||((WantSection_2_F>=1)&&(TestAlone_1_0_2>=1)))||((TestAlone_0_1_1>=1)&&(WantSection_1_F>=1)))||((WantSection_0_F>=1)&&(TestAlone_2_1_0>=1)))||((TestAlone_0_1_2>=1)&&(WantSection_2_F>=1)))||((WantSection_1_F>=1)&&(TestAlone_2_1_1>=1)))||((WantSection_2_F>=1)&&(TestAlone_1_1_2>=1)))" U "(((((((((((((TestTurn_1_1>=1)&&(Turn_1_0>=1))||((TestTurn_1_0>=1)&&(Turn_0_2>=1)))||((TestTurn_0_0>=1)&&(Turn_0_2>=1)))||((TestTurn_2_0>=1)&&(Turn_0_1>=1)))||((TestTurn_0_1>=1)&&(Turn_1_2>=1)))||((Turn_1_1>=1)&&(TestTurn_2_1>=1)))||((TestTurn_0_1>=1)&&(Turn_1_1>=1)))||((TestTurn_2_1>=1)&&(Turn_1_0>=1)))||((TestTurn_0_0>=1)&&(Turn_0_1>=1)))||((Turn_0_0>=1)&&(TestTurn_2_0>=1)))||((TestTurn_1_0>=1)&&(Turn_0_0>=1)))||((TestTurn_1_1>=1)&&(Turn_1_2>=1)))"))
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
161 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,7.27442,193388,1,0,825,813629,324,326,3401,980157,1432
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA Peterson-PT-2-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((F((F(X("(((((((((((((WantSection_1_T>=1)&&(TestAlone_0_0_1>=1))||((TestAlone_2_0_0>=1)&&(WantSection_0_T>=1)))||((TestAlone_0_0_2>=1)&&(WantSection_2_T>=1)))||((TestAlone_2_0_1>=1)&&(WantSection_1_T>=1)))||((WantSection_0_T>=1)&&(TestAlone_1_1_0>=1)))||((TestAlone_1_0_2>=1)&&(WantSection_2_T>=1)))||((WantSection_1_T>=1)&&(TestAlone_0_1_1>=1)))||((TestAlone_2_1_0>=1)&&(WantSection_0_T>=1)))||((WantSection_0_T>=1)&&(TestAlone_1_0_0>=1)))||((WantSection_1_T>=1)&&(TestAlone_2_1_1>=1)))||((TestAlone_0_1_2>=1)&&(WantSection_2_T>=1)))||((WantSection_2_T>=1)&&(TestAlone_1_1_2>=1)))")))U(("(((((((Turn_0_1>=1)&&(TestTurn_1_0>=1))||((Turn_0_2>=1)&&(TestTurn_2_0>=1)))||((Turn_0_0>=1)&&(TestTurn_0_0>=1)))||((TestTurn_2_1>=1)&&(Turn_1_2>=1)))||((TestTurn_0_1>=1)&&(Turn_1_0>=1)))||((TestTurn_1_1>=1)&&(Turn_1_1>=1)))")U("(((((((((((((WantSection_1_T>=1)&&(TestAlone_0_0_1>=1))||((TestAlone_2_0_0>=1)&&(WantSection_0_T>=1)))||((TestAlone_0_0_2>=1)&&(WantSection_2_T>=1)))||((TestAlone_2_0_1>=1)&&(WantSection_1_T>=1)))||((WantSection_0_T>=1)&&(TestAlone_1_1_0>=1)))||((TestAlone_1_0_2>=1)&&(WantSection_2_T>=1)))||((WantSection_1_T>=1)&&(TestAlone_0_1_1>=1)))||((TestAlone_2_1_0>=1)&&(WantSection_0_T>=1)))||((WantSection_0_T>=1)&&(TestAlone_1_0_0>=1)))||((WantSection_1_T>=1)&&(TestAlone_2_1_1>=1)))||((TestAlone_0_1_2>=1)&&(WantSection_2_T>=1)))||((WantSection_2_T>=1)&&(TestAlone_1_1_2>=1)))")))))
Formula 6 simplified : !F(FX"(((((((((((((WantSection_1_T>=1)&&(TestAlone_0_0_1>=1))||((TestAlone_2_0_0>=1)&&(WantSection_0_T>=1)))||((TestAlone_0_0_2>=1)&&(WantSection_2_T>=1)))||((TestAlone_2_0_1>=1)&&(WantSection_1_T>=1)))||((WantSection_0_T>=1)&&(TestAlone_1_1_0>=1)))||((TestAlone_1_0_2>=1)&&(WantSection_2_T>=1)))||((WantSection_1_T>=1)&&(TestAlone_0_1_1>=1)))||((TestAlone_2_1_0>=1)&&(WantSection_0_T>=1)))||((WantSection_0_T>=1)&&(TestAlone_1_0_0>=1)))||((WantSection_1_T>=1)&&(TestAlone_2_1_1>=1)))||((TestAlone_0_1_2>=1)&&(WantSection_2_T>=1)))||((WantSection_2_T>=1)&&(TestAlone_1_1_2>=1)))" U ("(((((((Turn_0_1>=1)&&(TestTurn_1_0>=1))||((Turn_0_2>=1)&&(TestTurn_2_0>=1)))||((Turn_0_0>=1)&&(TestTurn_0_0>=1)))||((TestTurn_2_1>=1)&&(Turn_1_2>=1)))||((TestTurn_0_1>=1)&&(Turn_1_0>=1)))||((TestTurn_1_1>=1)&&(Turn_1_1>=1)))" U "(((((((((((((WantSection_1_T>=1)&&(TestAlone_0_0_1>=1))||((TestAlone_2_0_0>=1)&&(WantSection_0_T>=1)))||((TestAlone_0_0_2>=1)&&(WantSection_2_T>=1)))||((TestAlone_2_0_1>=1)&&(WantSection_1_T>=1)))||((WantSection_0_T>=1)&&(TestAlone_1_1_0>=1)))||((TestAlone_1_0_2>=1)&&(WantSection_2_T>=1)))||((WantSection_1_T>=1)&&(TestAlone_0_1_1>=1)))||((TestAlone_2_1_0>=1)&&(WantSection_0_T>=1)))||((WantSection_0_T>=1)&&(TestAlone_1_0_0>=1)))||((WantSection_1_T>=1)&&(TestAlone_2_1_1>=1)))||((TestAlone_0_1_2>=1)&&(WantSection_2_T>=1)))||((WantSection_2_T>=1)&&(TestAlone_1_1_2>=1)))"))
Compilation finished in 2118 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 53 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((<>(X((LTLAP11==true))))U(((LTLAP2==true))U((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 82 ms.
FORMULA Peterson-PT-2-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]([]([]([]((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA Peterson-PT-2-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47 ms.
FORMULA Peterson-PT-2-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](([]((LTLAP13==true)))U(<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 19 ms.
FORMULA Peterson-PT-2-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X((X((LTLAP15==true)))U(X((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 26 ms.
FORMULA Peterson-PT-2-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 31 ms.
FORMULA Peterson-PT-2-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP18==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA Peterson-PT-2-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>([]((LTLAP19==true))))U(<>((LTLAP20==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA Peterson-PT-2-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP21==true))U([]((LTLAP22==true))))U([](((LTLAP23==true))U((LTLAP24==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 46 ms.
FORMULA Peterson-PT-2-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>(<>((LTLAP25==true)))))U(<>([]((LTLAP26==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20 ms.
FORMULA Peterson-PT-2-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527489540397

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 6:38:50 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 6:38:50 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 6:38:50 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 56 ms
May 28, 2018 6:38:50 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 102 places.
May 28, 2018 6:38:50 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 126 transitions.
May 28, 2018 6:38:50 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 26 ms
May 28, 2018 6:38:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 43 ms
May 28, 2018 6:38:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 3 ms
May 28, 2018 6:38:51 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 28, 2018 6:38:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 126 transitions.
May 28, 2018 6:38:51 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 11 place invariants in 27 ms
May 28, 2018 6:38:51 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 102 variables to be positive in 161 ms
May 28, 2018 6:38:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 126 transitions.
May 28, 2018 6:38:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/126 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:38:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:38:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 126 transitions.
May 28, 2018 6:38:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 3 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:38:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 126 transitions.
May 28, 2018 6:38:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/126) took 1326 ms. Total solver calls (SAT/UNSAT): 1474(56/1418)
May 28, 2018 6:38:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 3888 ms. Total solver calls (SAT/UNSAT): 2859(132/2727)
May 28, 2018 6:38:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 126 transitions.
May 28, 2018 6:38:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 218 ms. Total solver calls (SAT/UNSAT): 12(0/12)
May 28, 2018 6:38:57 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6223ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-2"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-2.tgz
mv Peterson-PT-2 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-PT-2, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585400160"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;