fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r260-csrt-152732585300125
Last Updated
June 26, 2018

About the Execution of ITS-Tools for PermAdmissibility-COL-02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15746.050 2250061.00 3150303.00 342.70 FFFTF?TTFTFFTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................................................................................
/home/mcc/execution
total 220K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.8K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 54K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PermAdmissibility-COL-02, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585300125
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-00
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-01
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-02
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-03
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-04
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-05
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-06
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-07
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-08
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-09
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-10
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-11
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-12
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-13
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-14
FORMULA_NAME PermAdmissibility-COL-02-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527487606216

06:06:48.470 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
06:06:48.474 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(X(X("((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=3)")))))
Formula 0 simplified : !GXX"((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=3)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :-2'out8_2 + -2'out8_7 + -2'out7_2 + -2'out7_7 + -2'out6_2 + -2'out6_7 + -2'out5_2 + -2'out5_7 + -2'out4_2 + -2'out4_7 + -2'out3_2 + -2'out3_7 + -2'out2_2 + -2'out2_7 + -2'out1_2 + -2'out1_7 + -2'aux13_2 + -2'aux13_7 + -2'aux15_2 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + -2'aux5_7 + -2'aux8_2 + -2'aux8_7 + -2'aux6_2 + -2'aux6_7 + -2'aux7_2 + -2'aux7_7 + -2'in4_2 + -2'in4_7 + -2'in3_2 + -2'in3_7 + -2'in2_2 + -2'in2_7 + -2'in1_2 + -2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + -4'c13_0 + -2'aux9_2 + -2'aux9_7 + -2'aux10_2 + -2'aux10_7 + -2'aux11_2 + -2'aux11_7 + -2'c15_0 + -4'c14_0 = -8
invariant :-2'out8_2 + -2'out8_4 + -2'out8_7 + -2'out7_2 + -2'out7_4 + -2'out7_7 + -2'out6_2 + -2'out6_4 + -2'out6_7 + -2'out5_2 + -2'out5_4 + -2'out5_7 + -2'out4_2 + -2'out4_4 + -2'out4_7 + -2'out3_2 + -2'out3_4 + -2'out3_7 + -2'out2_2 + -2'out2_4 + -2'out2_7 + 4'out1_0 + 4'out1_1 + 2'out1_2 + 4'out1_3 + 2'out1_4 + 4'out1_5 + 4'out1_6 + 2'out1_7 + -2'c18_0 + -2'aux13_2 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 2'aux15_3 + 2'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -3'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + -2'aux5_4 + -2'aux5_7 + -2'aux8_2 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + -2'in4_4 + -2'in4_7 + -2'in3_2 + -2'in3_4 + -2'in3_7 + -2'in2_2 + -2'in2_4 + -2'in2_7 + 4'in1_0 + 4'in1_1 + 2'in1_2 + 4'in1_3 + 2'in1_4 + 4'in1_5 + 4'in1_6 + 2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_5 + 2'aux12_6 + -4'c5_0 + -2'c13_0 + -2'aux9_2 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + -2'aux10_4 + -2'aux10_7 + aux11_0 + aux11_1 + -1'aux11_2 + aux11_3 + -1'aux11_4 + aux11_5 + aux11_6 + -1'aux11_7 + 2'c15_0 + -1'c14_0 = -4
invariant :out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 = 0
invariant :-4'out1_0 + -4'out1_1 + -4'out1_2 + -4'out1_3 + -4'out1_4 + -4'out1_5 + -4'out1_6 + -4'out1_7 + 2'c20_0 + 4'c18_0 + 4'c19_0 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + -1'aux16_0 + -1'aux16_1 + -1'aux16_2 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + 4'c9_0 + -4'aux7_0 + -4'aux7_1 + -4'aux7_2 + -4'aux7_3 + -4'aux7_4 + -4'aux7_5 + -4'aux7_6 + -4'aux7_7 + -12'c7_0 + 4'in2_0 + 4'in2_1 + 4'in2_2 + 4'in2_3 + 4'in2_4 + 4'in2_5 + 4'in2_6 + 4'in2_7 + -12'in1_0 + -12'in1_1 + -12'in1_2 + -12'in1_3 + -12'in1_4 + -12'in1_5 + -12'in1_6 + -12'in1_7 + 12'c5_0 + -2'aux10_0 + -2'aux10_1 + -2'aux10_2 + -2'aux10_3 + -2'aux10_4 + -2'aux10_5 + -2'aux10_6 + -2'aux10_7 + 2'c15_0 = -8
invariant :c20_0 + c18_0 + 2'c19_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'c15_0 = 0
invariant :-2'out8_2 + -2'out8_4 + -2'out8_7 + -2'out7_2 + -2'out7_4 + -2'out7_7 + -2'out6_2 + -2'out6_4 + -2'out6_7 + -2'out5_2 + -2'out5_4 + -2'out5_7 + -2'out4_2 + -2'out4_4 + -2'out4_7 + -2'out3_2 + -2'out3_4 + -2'out3_7 + -2'out2_2 + -2'out2_4 + -2'out2_7 + 4'out1_0 + 4'out1_1 + 2'out1_2 + 4'out1_3 + 2'out1_4 + 4'out1_5 + 4'out1_6 + 2'out1_7 + -2'c18_0 + -2'aux13_2 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 2'aux15_3 + 2'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -3'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + 2'c12_0 + -2'aux5_2 + -2'aux5_4 + -2'aux5_7 + -2'aux8_2 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + -2'in4_4 + -2'in4_7 + -2'in3_2 + -2'in3_4 + -2'in3_7 + -2'in2_2 + -2'in2_4 + -2'in2_7 + 4'in1_0 + 4'in1_1 + 2'in1_2 + 4'in1_3 + 2'in1_4 + 4'in1_5 + 4'in1_6 + 2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_5 + 2'aux12_6 + -4'c5_0 + -2'aux9_2 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + -2'aux10_4 + -2'aux10_7 + -2'aux11_2 + -2'aux11_4 + -2'aux11_7 + 2'c15_0 = -4
invariant :-2'out8_0 + -2'out8_1 + -4'out8_2 + -4'out8_4 + -2'out8_6 + -4'out8_7 + -2'out7_2 + 2'out7_3 + -2'out7_4 + 2'out7_5 + -2'out7_7 + -2'out6_0 + -2'out6_1 + -4'out6_2 + -4'out6_4 + -2'out6_6 + -4'out6_7 + -2'out5_2 + 2'out5_3 + -2'out5_4 + 2'out5_5 + -2'out5_7 + -2'out4_2 + 2'out4_3 + -2'out4_4 + 2'out4_5 + -2'out4_7 + -2'out3_2 + 2'out3_3 + -2'out3_4 + 2'out3_5 + -2'out3_7 + -2'out2_0 + -2'out2_1 + -4'out2_2 + -4'out2_4 + -2'out2_6 + -4'out2_7 + 6'out1_0 + 6'out1_1 + 4'out1_2 + 8'out1_3 + 4'out1_4 + 8'out1_5 + 6'out1_6 + 4'out1_7 + -2'c20_0 + -4'c18_0 + -4'c19_0 + -2'aux13_0 + -2'aux13_1 + -4'aux13_2 + -4'aux13_4 + -2'aux13_6 + -4'aux13_7 + 2'aux15_0 + 2'aux15_1 + 4'aux15_3 + 4'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + aux14_3 + -3'aux14_4 + aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + 3'aux16_3 + -1'aux16_4 + 3'aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + 2'aux5_3 + -2'aux5_4 + 2'aux5_5 + -2'aux5_7 + -2'aux8_0 + -2'aux8_1 + -4'aux8_2 + -4'aux8_4 + -2'aux8_6 + -4'aux8_7 + 2'aux6_0 + 2'aux6_1 + 4'aux6_3 + 4'aux6_5 + 2'aux6_6 + -2'aux7_2 + 2'aux7_3 + -2'aux7_4 + 2'aux7_5 + -2'aux7_7 + -2'in4_2 + 2'in4_3 + -2'in4_4 + 2'in4_5 + -2'in4_7 + 4'c7_0 + -2'in3_2 + 2'in3_3 + -2'in3_4 + 2'in3_5 + -2'in3_7 + -4'in2_0 + -4'in2_1 + -6'in2_2 + -2'in2_3 + -6'in2_4 + -2'in2_5 + -4'in2_6 + -6'in2_7 + 8'in1_0 + 8'in1_1 + 6'in1_2 + 10'in1_3 + 6'in1_4 + 10'in1_5 + 8'in1_6 + 6'in1_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_3 + 4'aux12_5 + 2'aux12_6 + -8'c5_0 + -4'c13_0 + -2'aux9_2 + 2'aux9_3 + -2'aux9_4 + 2'aux9_5 + -2'aux9_7 + -2'aux10_2 + 2'aux10_3 + -2'aux10_4 + 2'aux10_5 + -2'aux10_7 + -2'aux11_2 + 2'aux11_3 + -2'aux11_4 + 2'aux11_5 + -2'aux11_7 + 2'c15_0 = -4
invariant :2'out8_2 + 2'out8_4 + 2'out8_7 + 2'out7_2 + 2'out7_4 + 2'out7_7 + 2'out6_2 + 2'out6_4 + 2'out6_7 + 2'out5_2 + 2'out5_4 + 2'out5_7 + 2'out4_2 + 2'out4_4 + 2'out4_7 + 2'out3_2 + 2'out3_4 + 2'out3_7 + 2'out2_2 + 2'out2_4 + 2'out2_7 + 2'out1_2 + 2'out1_4 + 2'out1_7 + -2'c20_0 + -2'c18_0 + -4'c19_0 + 2'aux13_2 + 2'aux13_4 + 2'aux13_7 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_5 + -2'aux15_6 + 3'aux14_0 + 3'aux14_1 + 5'aux14_2 + 3'aux14_3 + 5'aux14_4 + 3'aux14_5 + 3'aux14_6 + 5'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + 2'aux5_4 + 2'aux5_7 + 2'aux8_0 + 2'aux8_1 + 4'aux8_2 + 2'aux8_3 + 4'aux8_4 + 2'aux8_5 + 2'aux8_6 + 4'aux8_7 + -2'aux6_0 + -2'aux6_1 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + 2'aux7_2 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + 2'in4_4 + 2'in4_7 + -4'c7_0 + 2'in3_2 + 2'in3_4 + 2'in3_7 + 4'in2_0 + 4'in2_1 + 6'in2_2 + 4'in2_3 + 6'in2_4 + 4'in2_5 + 4'in2_6 + 6'in2_7 + -8'in1_0 + -8'in1_1 + -6'in1_2 + -8'in1_3 + -6'in1_4 + -8'in1_5 + -8'in1_6 + -6'in1_7 + -2'aux12_0 + -2'aux12_1 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + 8'c5_0 + 4'c13_0 + 2'aux9_2 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 + 4'c14_0 = 12
invariant :2'out8_2 + 2'out8_4 + 2'out8_7 + 2'out7_2 + 2'out7_4 + 2'out7_7 + 2'out6_2 + 2'out6_4 + 2'out6_7 + 2'out5_2 + 2'out5_4 + 2'out5_7 + 2'out4_2 + 2'out4_4 + 2'out4_7 + 2'out3_2 + 2'out3_4 + 2'out3_7 + 2'out2_2 + 2'out2_4 + 2'out2_7 + 2'out1_2 + 2'out1_4 + 2'out1_7 + -2'c20_0 + -2'c18_0 + -4'c19_0 + 2'aux13_2 + 2'aux13_4 + 2'aux13_7 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_5 + -2'aux15_6 + 3'aux14_0 + 3'aux14_1 + 5'aux14_2 + 3'aux14_3 + 5'aux14_4 + 3'aux14_5 + 3'aux14_6 + 5'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + 2'aux5_4 + 2'aux5_7 + 2'aux8_2 + 2'aux8_4 + 2'aux8_7 + 2'aux6_2 + 2'aux6_4 + 2'aux6_7 + 2'aux7_2 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + 2'in4_4 + 2'in4_7 + 2'in3_2 + 2'in3_4 + 2'in3_7 + 2'in2_2 + 2'in2_4 + 2'in2_7 + 2'in1_2 + 2'in1_4 + 2'in1_7 + -2'aux12_0 + -2'aux12_1 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + 4'c13_0 + 2'aux9_2 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 + 4'c14_0 = 12
invariant :-1'in1_0 + -1'in1_1 + -1'in1_2 + -1'in1_3 + -1'in1_4 + -1'in1_5 + -1'in1_6 + -1'in1_7 + c6_0 + 2'c5_0 = 0
invariant :out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 + c19_0 = 0
invariant :out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c20_0 + c18_0 + c19_0 = 0
invariant :out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 = 0
invariant :out8_1 + out7_1 + out6_1 + out5_1 + -1'out4_0 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_1 + out2_1 + out1_0 + 2'out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'c18_0 + aux13_1 + aux15_1 + aux14_1 + aux16_1 + aux5_1 + aux8_1 + aux6_1 + aux7_1 + -1'in4_0 + -1'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 + -1'in3_0 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 + in2_0 + 2'in2_1 + in2_2 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + in1_0 + 2'in1_1 + in1_2 + in1_3 + in1_4 + in1_5 + in1_6 + in1_7 + aux12_1 + aux9_1 + aux10_1 + aux11_1 = 2
invariant :-2'out8_0 + -2'out8_1 + -4'out8_2 + -4'out8_4 + -2'out8_5 + -2'out8_6 + -4'out8_7 + -2'out7_2 + 2'out7_3 + -2'out7_4 + -2'out7_7 + -2'out6_0 + -2'out6_1 + -4'out6_2 + -4'out6_4 + -2'out6_5 + -2'out6_6 + -4'out6_7 + -2'out5_2 + 2'out5_3 + -2'out5_4 + -2'out5_7 + -2'out4_2 + 2'out4_3 + -2'out4_4 + -2'out4_7 + -2'out3_2 + 2'out3_3 + -2'out3_4 + -2'out3_7 + -2'out2_0 + -2'out2_1 + -4'out2_2 + -4'out2_4 + -2'out2_5 + -2'out2_6 + -4'out2_7 + 6'out1_0 + 6'out1_1 + 4'out1_2 + 8'out1_3 + 4'out1_4 + 6'out1_5 + 6'out1_6 + 4'out1_7 + -2'c18_0 + -2'aux13_2 + 2'aux13_3 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 4'aux15_3 + 2'aux15_5 + 2'aux15_6 + -3'aux14_0 + -3'aux14_1 + -5'aux14_2 + -1'aux14_3 + -5'aux14_4 + -3'aux14_5 + -3'aux14_6 + -5'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + 3'aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + 2'aux5_3 + -2'aux5_4 + -2'aux5_7 + -2'aux8_0 + -2'aux8_1 + -4'aux8_2 + -4'aux8_4 + -2'aux8_5 + -2'aux8_6 + -4'aux8_7 + 2'aux6_0 + 2'aux6_1 + 4'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + 2'aux7_3 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + 2'in4_3 + -2'in4_4 + -2'in4_7 + 4'c7_0 + -2'in3_2 + 2'in3_3 + -2'in3_4 + -2'in3_7 + -4'in2_0 + -4'in2_1 + -6'in2_2 + -2'in2_3 + -6'in2_4 + -4'in2_5 + -4'in2_6 + -6'in2_7 + 8'in1_0 + 8'in1_1 + 6'in1_2 + 10'in1_3 + 6'in1_4 + 8'in1_5 + 8'in1_6 + 6'in1_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_3 + 2'aux12_5 + 2'aux12_6 + -8'c5_0 + -4'c13_0 + -2'aux9_2 + 2'aux9_3 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + 2'aux10_3 + -2'aux10_4 + -2'aux10_7 + -2'aux11_2 + 2'aux11_3 + -2'aux11_4 + -2'aux11_7 + 2'c15_0 + -4'c14_0 = -8
invariant :2'out8_0 + 2'out8_1 + 4'out8_2 + 4'out8_4 + 2'out8_5 + 2'out8_6 + 4'out8_7 + 2'out7_2 + -2'out7_3 + 2'out7_4 + 2'out7_7 + 2'out6_0 + 2'out6_1 + 4'out6_2 + 4'out6_4 + 2'out6_5 + 2'out6_6 + 4'out6_7 + 2'out5_2 + -2'out5_3 + 2'out5_4 + 2'out5_7 + 2'out4_2 + -2'out4_3 + 2'out4_4 + 2'out4_7 + 2'out3_2 + -2'out3_3 + 2'out3_4 + 2'out3_7 + 2'out2_0 + 2'out2_1 + 4'out2_2 + 4'out2_4 + 2'out2_5 + 2'out2_6 + 4'out2_7 + -6'out1_0 + -6'out1_1 + -4'out1_2 + -8'out1_3 + -4'out1_4 + -6'out1_5 + -6'out1_6 + -4'out1_7 + 2'c20_0 + 4'c18_0 + 4'c19_0 + 2'aux13_0 + 2'aux13_1 + 4'aux13_2 + 4'aux13_4 + 2'aux13_5 + 2'aux13_6 + 4'aux13_7 + -2'aux15_0 + -2'aux15_1 + -4'aux15_3 + -2'aux15_5 + -2'aux15_6 + aux14_0 + aux14_1 + 3'aux14_2 + -1'aux14_3 + 3'aux14_4 + aux14_5 + aux14_6 + 3'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -3'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + -2'aux5_3 + 2'aux5_4 + 2'aux5_7 + 2'aux8_0 + 2'aux8_1 + 4'aux8_2 + 4'aux8_4 + 2'aux8_5 + 2'aux8_6 + 4'aux8_7 + -2'aux6_0 + -2'aux6_1 + -4'aux6_3 + -2'aux6_5 + -2'aux6_6 + 2'aux7_2 + -2'aux7_3 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + -2'in4_3 + 2'in4_4 + 2'in4_7 + -4'c7_0 + 2'in3_2 + -2'in3_3 + 2'in3_4 + 2'in3_7 + 4'in2_0 + 4'in2_1 + 6'in2_2 + 2'in2_3 + 6'in2_4 + 4'in2_5 + 4'in2_6 + 6'in2_7 + -8'in1_0 + -8'in1_1 + -6'in1_2 + -10'in1_3 + -6'in1_4 + -8'in1_5 + -8'in1_6 + -6'in1_7 + -2'aux12_0 + -2'aux12_1 + -4'aux12_3 + -2'aux12_5 + -2'aux12_6 + 8'c5_0 + 4'c13_0 + 2'aux9_2 + -2'aux9_3 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + -2'aux10_3 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + -2'aux11_3 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 = 8
invariant :out8_7 + out7_7 + out6_7 + out5_7 + out4_7 + out3_7 + out2_7 + out1_7 + aux13_7 + aux15_7 + aux14_7 + aux16_7 + aux5_7 + aux8_7 + aux6_7 + aux7_7 + in4_7 + in3_7 + in2_7 + in1_7 + aux12_7 + aux9_7 + aux10_7 + aux11_7 = 2
invariant :in3_0 + in3_1 + in3_2 + in3_3 + in3_4 + in3_5 + in3_6 + in3_7 + -1'in1_0 + -1'in1_1 + -1'in1_2 + -1'in1_3 + -1'in1_4 + -1'in1_5 + -1'in1_6 + -1'in1_7 = 0
invariant :-1'out8_1 + -1'out8_6 + -1'out7_1 + -1'out7_6 + -1'out6_1 + -1'out6_6 + -1'out5_1 + -1'out5_6 + out4_0 + out4_2 + out4_3 + out4_4 + out4_5 + out4_7 + -1'out3_1 + -1'out3_6 + -1'out2_1 + -1'out2_6 + -1'out1_0 + -2'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -2'out1_6 + -1'out1_7 + c18_0 + -1'aux13_1 + -1'aux13_6 + -1'aux15_1 + -1'aux15_6 + -1'aux14_1 + -1'aux14_6 + -1'aux16_1 + -1'aux16_6 + aux5_0 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_7 + -1'aux8_1 + -1'aux8_6 + -1'aux6_1 + -1'aux6_6 + -1'aux7_0 + -2'aux7_1 + -1'aux7_2 + -1'aux7_3 + -1'aux7_4 + -1'aux7_5 + -2'aux7_6 + -1'aux7_7 + in4_0 + in4_2 + in4_3 + in4_4 + in4_5 + in4_7 + -2'c7_0 + in3_0 + in3_2 + in3_3 + in3_4 + in3_5 + in3_7 + -1'in2_0 + -2'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -2'in2_6 + -1'in2_7 + -3'in1_0 + -4'in1_1 + -3'in1_2 + -3'in1_3 + -3'in1_4 + -3'in1_5 + -4'in1_6 + -3'in1_7 + -1'aux12_1 + -1'aux12_6 + 4'c5_0 + -1'aux9_1 + -1'aux9_6 + -1'aux10_1 + -1'aux10_6 + -1'aux11_1 + -1'aux11_6 = -4
invariant :in4_0 + in4_1 + in4_2 + in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 = 0
invariant :out8_2 + out7_2 + out6_2 + out5_2 + out4_2 + out3_2 + out2_2 + out1_2 + aux13_2 + aux15_2 + aux14_2 + aux16_2 + aux5_2 + aux8_2 + aux6_2 + aux7_2 + in4_2 + in3_2 + in2_2 + in1_2 + aux12_2 + aux9_2 + aux10_2 + aux11_2 = 2
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 + c19_0 = 0
invariant :out8_6 + out7_6 + out6_6 + out5_6 + out4_6 + out3_6 + out2_6 + out1_6 + aux13_6 + aux15_6 + aux14_6 + aux16_6 + aux5_6 + aux8_6 + aux6_6 + aux7_6 + in4_6 + in3_6 + in2_6 + in1_6 + aux12_6 + aux9_6 + aux10_6 + aux11_6 = 2
invariant :4'out1_0 + 4'out1_1 + 4'out1_2 + 4'out1_3 + 4'out1_4 + 4'out1_5 + 4'out1_6 + 4'out1_7 + -2'c20_0 + -4'c18_0 + -4'c19_0 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + 2'c110_0 + 2'aux7_0 + 2'aux7_1 + 2'aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 4'c7_0 + 4'in1_0 + 4'in1_1 + 4'in1_2 + 4'in1_3 + 4'in1_4 + 4'in1_5 + 4'in1_6 + 4'in1_7 + -4'c5_0 + 2'aux10_0 + 2'aux10_1 + 2'aux10_2 + 2'aux10_3 + 2'aux10_4 + 2'aux10_5 + 2'aux10_6 + 2'aux10_7 + -2'c15_0 = 8
invariant :-1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + 2'c16_0 + 2'c15_0 = 0
invariant :out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c20_0 + c18_0 + c19_0 = 0
invariant :c8_0 + 2'c7_0 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 + 2'in1_0 + 2'in1_1 + 2'in1_2 + 2'in1_3 + 2'in1_4 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -2'c5_0 = 0
invariant :4'out8_2 + 4'out8_4 + 4'out8_7 + 4'out7_2 + 4'out7_4 + 4'out7_7 + 4'out6_2 + 4'out6_4 + 4'out6_7 + 4'out5_2 + 4'out5_4 + 4'out5_7 + 4'out4_2 + 4'out4_4 + 4'out4_7 + 4'out3_2 + 4'out3_4 + 4'out3_7 + 4'out2_2 + 4'out2_4 + 4'out2_7 + -8'out1_0 + -8'out1_1 + -4'out1_2 + -8'out1_3 + -4'out1_4 + -8'out1_5 + -8'out1_6 + -4'out1_7 + 4'c18_0 + 4'aux13_2 + 4'aux13_4 + 4'aux13_7 + -4'aux15_0 + -4'aux15_1 + -4'aux15_3 + -4'aux15_5 + -4'aux15_6 + 3'aux14_0 + 3'aux14_1 + 7'aux14_2 + 3'aux14_3 + 7'aux14_4 + 3'aux14_5 + 3'aux14_6 + 7'aux14_7 + -3'aux16_0 + -3'aux16_1 + aux16_2 + -3'aux16_3 + aux16_4 + -3'aux16_5 + -3'aux16_6 + aux16_7 + 4'c11_0 + 4'aux5_2 + 4'aux5_4 + 4'aux5_7 + 4'aux8_2 + 4'aux8_4 + 4'aux8_7 + -4'aux6_0 + -4'aux6_1 + -4'aux6_3 + -4'aux6_5 + -4'aux6_6 + 4'aux7_2 + 4'aux7_4 + 4'aux7_7 + 4'in4_2 + 4'in4_4 + 4'in4_7 + 4'in3_2 + 4'in3_4 + 4'in3_7 + 4'in2_2 + 4'in2_4 + 4'in2_7 + -8'in1_0 + -8'in1_1 + -4'in1_2 + -8'in1_3 + -4'in1_4 + -8'in1_5 + -8'in1_6 + -4'in1_7 + -4'aux12_0 + -4'aux12_1 + -4'aux12_3 + -4'aux12_5 + -4'aux12_6 + 8'c5_0 + 4'c13_0 + 4'aux9_2 + 4'aux9_4 + 4'aux9_7 + -2'aux10_0 + -2'aux10_1 + 2'aux10_2 + -2'aux10_3 + 2'aux10_4 + -2'aux10_5 + -2'aux10_6 + 2'aux10_7 + 4'aux11_2 + 4'aux11_4 + 4'aux11_7 + -2'c15_0 + 4'c14_0 = 8
invariant :out8_0 + out8_1 + 2'out8_2 + 2'out8_4 + out8_6 + 2'out8_7 + out7_2 + -1'out7_3 + out7_4 + -1'out7_5 + out7_7 + out6_0 + out6_1 + 2'out6_2 + 2'out6_4 + out6_6 + 2'out6_7 + out5_2 + -1'out5_3 + out5_4 + -1'out5_5 + out5_7 + out4_2 + -1'out4_3 + out4_4 + -1'out4_5 + out4_7 + out3_2 + -1'out3_3 + out3_4 + -1'out3_5 + out3_7 + out2_0 + out2_1 + 2'out2_2 + 2'out2_4 + out2_6 + 2'out2_7 + out1_0 + out1_1 + 2'out1_2 + 2'out1_4 + out1_6 + 2'out1_7 + -1'c20_0 + -2'c18_0 + -2'c19_0 + aux13_0 + aux13_1 + 2'aux13_2 + 2'aux13_4 + aux13_6 + 2'aux13_7 + -1'aux15_0 + -1'aux15_1 + -2'aux15_3 + -2'aux15_5 + -1'aux15_6 + 2'aux14_0 + 2'aux14_1 + 3'aux14_2 + aux14_3 + 3'aux14_4 + aux14_5 + 2'aux14_6 + 3'aux14_7 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + aux16_7 + aux5_2 + -1'aux5_3 + aux5_4 + -1'aux5_5 + aux5_7 + aux8_0 + aux8_1 + 2'aux8_2 + 2'aux8_4 + aux8_6 + 2'aux8_7 + -1'aux6_0 + -1'aux6_1 + -2'aux6_3 + -2'aux6_5 + -1'aux6_6 + 2'aux7_0 + 2'aux7_1 + 3'aux7_2 + aux7_3 + 3'aux7_4 + aux7_5 + 2'aux7_6 + 3'aux7_7 + in4_2 + -1'in4_3 + in4_4 + -1'in4_5 + in4_7 + 2'c7_0 + in3_2 + -1'in3_3 + in3_4 + -1'in3_5 + in3_7 + 2'in2_0 + 2'in2_1 + 3'in2_2 + in2_3 + 3'in2_4 + in2_5 + 2'in2_6 + 3'in2_7 + in1_2 + -1'in1_3 + in1_4 + -1'in1_5 + in1_7 + -1'aux12_0 + -1'aux12_1 + -2'aux12_3 + -2'aux12_5 + -1'aux12_6 + 2'c13_0 + aux9_0 + aux9_1 + 2'aux9_2 + 2'aux9_4 + aux9_6 + 2'aux9_7 + aux10_0 + aux10_1 + 2'aux10_2 + 2'aux10_4 + aux10_6 + 2'aux10_7 + aux11_2 + -1'aux11_3 + aux11_4 + -1'aux11_5 + aux11_7 + -2'c15_0 + c14_0 = 10
invariant :out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 = 0
invariant :c20_0 + 2'c18_0 + 2'c19_0 + 2'c17_0 + -1'aux16_0 + -1'aux16_1 + -1'aux16_2 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 13437 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 423 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 80 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([](((LTLAP1==true))U((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3443 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(<>((LTLAP3==true))))U([]((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3468 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3325 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([]([]((LTLAP6==true))))U([](<>((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3407 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP9==true))U(X((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 44 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X([]((LTLAP11==true))))U(<>(X((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4511 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](<>(X((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 111 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(((LTLAP14==true))U((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 61 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3583 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3695 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>((LTLAP19==true))))U((LTLAP20==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 64 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP21==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3574 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(<>((LTLAP22==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 103 ms.
FORMULA PermAdmissibility-COL-02-LTLCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 34 groups
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_STOP 1527489856277

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 6:06:48 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 6:06:48 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 6:06:48 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 6:06:48 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 835 ms
May 28, 2018 6:06:48 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
May 28, 2018 6:06:48 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 6:06:48 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->out8,out7,out6,out5,out4,out3,out2,out1,aux13,aux15,aux14,aux16,aux5,aux8,aux6,aux7,in4,in3,in2,in1,aux12,aux9,aux10,aux11,
Dot->c20,c18,c19,c17,c12,c110,c11,c9,c8,c7,c6,c5,c13,c16,c15,c14,

May 28, 2018 6:06:48 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
May 28, 2018 6:06:48 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 6:06:48 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 9 ms
May 28, 2018 6:06:49 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 159 ms
May 28, 2018 6:06:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 32 ms
May 28, 2018 6:06:51 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 3 ms
May 28, 2018 6:06:52 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 28, 2018 6:06:52 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 128 ms.
May 28, 2018 6:06:53 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 213 ms
May 28, 2018 6:06:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 2308 ms
May 28, 2018 6:06:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1024 transitions.
May 28, 2018 6:06:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1024 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:06:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 164 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:06:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1024 transitions.
May 28, 2018 6:06:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 76 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:07:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1024 transitions.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 28, 2018 6:07:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1024) took 39734 ms. Total solver calls (SAT/UNSAT): 459(459/0)
May 28, 2018 6:07:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 39804 ms. Total solver calls (SAT/UNSAT): 459(459/0)
May 28, 2018 6:07:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1024 transitions.
May 28, 2018 6:08:04 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:09 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:19 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:29 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:30 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:35 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:36 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:37 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:39 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:41 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:44 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:45 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:08:46 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:01 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:02 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:03 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:05 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:10 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:11 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:13 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:14 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:19 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:27 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:28 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:30 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:30 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:30 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:31 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:32 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:33 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:34 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:34 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:34 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:35 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:36 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:38 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:39 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:40 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:42 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:42 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:43 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:43 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:43 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:44 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:44 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:45 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:45 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 28, 2018 6:09:46 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 28, 2018 6:09:46 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 175157ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-02"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-02.tgz
mv PermAdmissibility-COL-02 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-COL-02, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585300125"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;