Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 336K
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.6K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 167K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ParamProductionCell-PT-2, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585300103
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-00
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-01
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-02
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-03
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-04
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-05
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-06
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-07
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-08
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-09
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-10
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-11
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-12
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-13
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-14
FORMULA_NAME ParamProductionCell-PT-2-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527487117459

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(press_ready_for_loading>=2)"))
Formula 0 simplified : !"(press_ready_for_loading>=2)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 202 rows 231 cols
invariant :table_bottom_pos + table_top_pos = 1
invariant :arm1_storing + arm1_having_swivel_1 + arm1_waiting_for_swivel_2 + A1L_out + A1L_loaded + arm1_magnet_off + A1L_ret_rs + A1L_ret_run + A1U_rotated + A1U_in + A1U_rot1_in + A1U_rot2_in + A1U_rot3_in + A1U_rot1_rs + A1U_rot1_run + A1U_rot2_rs + A1U_rot2_run + A1U_rot3_rs + A1U_rot3_run + A1U_extendet + A1U_ext_rs + A1U_ext_run = 1
invariant :ch_A1P_full + ch_A1P_free + press_ready_for_unloading + PU_out + blank_forged + PU_in + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_in + PL_out + PL_lower_rs + PL_lower_run + -1'arm1_storing + -1'arm1_having_swivel_1 + -1'A1L_out + -1'A1L_loaded + -1'arm1_magnet_off + -1'A1L_ret_rs + -1'A1L_ret_run + A1U_out + A1U_unloadet + A1U_ret_rs + A1U_ret_run = 0
invariant :table_upward + -1'TL_lower_rs + -1'TL_lower_run + -1'TU_lift_rs + -1'TU_lift_run = 0
invariant :table_stop_v + TL_lower_rs + TL_lower_run + TU_lift_rs + TU_lift_run = 1
invariant :arm2_release_ext + arm2_retract_ext + arm2_pick_up_ext = 1
invariant :crane_store_free + crane_mag_on + CU_unloaded + CU_ready_to_transport + CU_out + CU_lift_rs + CU_lift_run + CU_trans_rs + CU_trans_run + CL_in + CL_ready_to_grasp + CL_lower_rs + CL_lower_run = 1
invariant :crane_transport_height + crane_release_height + crane_pick_up_height = 1
invariant :press_at_upper_pos + press_at_lower_pos + press_at_middle_pos = 1
invariant :crane_mag_off + crane_mag_on = 1
invariant :belt1_stop + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :arm2_stop + A2U_ext_rs + A2U_ext_run + A2U_ret_rs + A2U_ret_run + A2L_ext_rs + A2L_ext_run + A2L_ret_rs + A2L_ret_run = 1
invariant :belt2_stop + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :robot_right + -1'A2U_rot1_rs + -1'A2U_rot1_run + -1'A2U_rot3_rs + -1'A2U_rot3_run + -1'A1U_rot1_rs + -1'A1U_rot1_run + -1'A1U_rot2_rs + -1'A1U_rot2_run = 0
invariant :arm2_store_free + arm2_waiting_for_swivel_1 + arm2_having_swivel_2 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + A2L_rotated + A2L_in + A2L_rot1_in + A2L_rot2_in + A2L_rot3_in + A2L_rot1_rs + A2L_rot1_run + A2L_rot2_rs + A2L_rot2_run + A2L_rot3_rs + A2L_rot3_run + A2L_extended + A2L_ext_rs + A2L_ext_run = 1
invariant :arm1_magnet_on + arm1_magnet_off = 1
invariant :deposit_belt_idle + deposit_belt_occupied + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :ch_CF_free + ch_CF_full + feed_belt_occupied + feed_belt_empty + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run + CU_unloaded + CU_ready_to_transport + CU_out + CU_ready_to_ungrasp + CU_in + CU_lift_rs + CU_lift_run + CU_trans_rs + CU_trans_run + CU_lower_rs + CU_lower_run = 1
invariant :press_up + -1'PL_lower_rs + -1'PL_lower_run = 0
invariant :ch_A2D_full + ch_A2D_free + deposit_belt_occupied + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run + -1'arm2_storing + -1'arm2_having_swivel_1 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + -1'A2L_out + -1'A2L_loaded + -1'A2L_ret_rs + -1'A2L_ret_run = 1
invariant :belt2_start + -1'DB_trans_rs + -1'DB_trans_run + -1'DB_deliver_rs + -1'DB_deliver_run = 0
invariant :ch_DC_full + ch_CF_full + -1'ch_A1P_free + -1'ch_TA1_free + -1'ch_A2D_free + ch_FT_full + ch_PA2_full + -1'press_ready_for_unloading + -1'PL_in + -1'PL_out + -1'PL_lower_rs + -1'PL_lower_run + table_ready_for_unloading + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run + -1'deposit_belt_empty + feed_belt_occupied + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run + -1'arm2_store_free + arm2_storing + -1'arm2_having_swivel_2 + arm2_having_swivel_1 + -1'A2U_out + -1'A2U_unloaded + -1'arm2_magnet_on + -1'A2U_ret_rs + -1'A2U_ret_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run + arm1_storing + arm1_having_swivel_1 + crane_mag_on + CU_unloaded + CU_ready_to_transport + CU_out + CU_lift_rs + CU_lift_run + CU_trans_rs + CU_trans_run + CL_in + CL_ready_to_grasp + CL_lower_rs + CL_lower_run = -1
invariant :arm1_forward + -1'A1L_ext_rs + -1'A1L_ext_run + -1'A1U_ext_rs + -1'A1U_ext_run = 0
invariant :arm2_forward + -1'A2U_ext_rs + -1'A2U_ext_run + -1'A2L_ext_rs + -1'A2L_ext_run = 0
invariant :press_stop + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_lower_rs + PL_lower_run = 1
invariant :table_right + -1'TL_rot_rs + -1'TL_rot_run + -1'TU_rot_rs + -1'TU_rot_run = 0
invariant :robot_stop + A2U_rot1_rs + A2U_rot1_run + A2U_rot2_rs + A2U_rot2_run + A2U_rot3_rs + A2U_rot3_run + A2L_rot1_rs + A2L_rot1_run + A2L_rot2_rs + A2L_rot2_run + A2L_rot3_rs + A2L_rot3_run + A1L_rot1_rs + A1L_rot1_run + A1L_rot2_rs + A1L_rot2_run + A1L_rot3_rs + A1L_rot3_run + A1U_rot1_rs + A1U_rot1_run + A1U_rot2_rs + A1U_rot2_run + A1U_rot3_rs + A1U_rot3_run = 1
invariant :press_ready_for_loading + press_ready_for_unloading + PU_out + blank_forged + PU_in + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_in + PL_out + PL_lower_rs + PL_lower_run = 1
invariant :ch_TA1_full + ch_TA1_free + -1'table_ready_for_unloading + -1'arm1_store_free + -1'arm1_having_swivel_2 + A1L_out + A1L_loaded + arm1_magnet_off + A1L_ret_rs + A1L_ret_run + -1'A1U_out + -1'A1U_unloadet + -1'A1U_ret_rs + -1'A1U_ret_run = 0
invariant :crane_to_belt2 + -1'CU_trans_rs + -1'CU_trans_run = 0
invariant :press_down + -1'PU_lower_rs + -1'PU_lower_run = 0
invariant :belt1_start + -1'FB_trans_rs + -1'FB_trans_run + -1'FB_deliver_rs + -1'FB_deliver_run = 0
invariant :arm1_store_free + arm1_waiting_for_swivel_1 + arm1_having_swivel_2 + A1L_rotated + A1L_in + A1L_rot1_in + A1L_rot2_in + A1L_rot3_in + A1L_rot1_rs + A1L_rot1_run + A1L_rot2_rs + A1L_rot2_run + A1L_rot3_rs + A1L_rot3_run + A1_extended + -1'arm1_magnet_off + A1L_ext_rs + A1L_ext_run + A1U_out + A1U_unloadet + A1U_ret_rs + A1U_ret_run = 0
invariant :table_ready_for_loading + table_ready_for_unloading + TL_out + TL_in + table_at_load_angle + TL_rot_rs + TL_rot_run + TL_lower_rs + TL_lower_run + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run = 1
invariant :crane_to_belt1 + -1'CL_trans_rs + -1'CL_trans_run = 0
invariant :crane_stop_h + CU_trans_rs + CU_trans_run + CL_trans_rs + CL_trans_run = 1
invariant :crane_lift + -1'CU_lift_rs + -1'CU_lift_run + -1'CL_lift_rs + -1'CL_lift_run = 0
invariant :robot_left + -1'A2U_rot2_rs + -1'A2U_rot2_run + -1'A2L_rot1_rs + -1'A2L_rot1_run + -1'A2L_rot2_rs + -1'A2L_rot2_run + -1'A2L_rot3_rs + -1'A2L_rot3_run + -1'A1L_rot1_rs + -1'A1L_rot1_run + -1'A1L_rot2_rs + -1'A1L_rot2_run + -1'A1L_rot3_rs + -1'A1L_rot3_run + -1'A1U_rot3_rs + -1'A1U_rot3_run = 0
invariant :arm1_stop + A1L_ext_rs + A1L_ext_run + A1L_ret_rs + A1L_ret_run + A1U_ext_rs + A1U_ext_run + A1U_ret_rs + A1U_ret_run = 1
invariant :table_stop_h + TL_rot_rs + TL_rot_run + TU_rot_rs + TU_rot_run = 1
invariant :feed_belt_idle + feed_belt_occupied + feed_belt_empty + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :arm2_magnet_off + arm2_magnet_on = 1
invariant :arm2_backward + -1'A2U_ret_rs + -1'A2U_ret_run + -1'A2L_ret_rs + -1'A2L_ret_run = 0
invariant :crane_above_deposit_belt + crane_above_feed_belt = 1
invariant :crane_storing + -1'crane_mag_on + CU_ready_to_ungrasp + CU_in + CU_lower_rs + CU_lower_run + CL_out + CL_ready_to_transport + CL_loaded + CL_trans_rs + CL_trans_run + CL_lift_rs + CL_lift_run = 0
invariant :crane_lower + -1'CU_lower_rs + -1'CU_lower_run + -1'CL_lower_rs + -1'CL_lower_run = 0
invariant :crane_stop_v + CU_lift_rs + CU_lift_run + CU_lower_rs + CU_lower_run + CL_lower_rs + CL_lower_run + CL_lift_rs + CL_lift_run = 1
invariant :swivel + -1'arm2_store_free + -1'arm2_waiting_for_swivel_1 + -1'arm2_storing + -1'arm2_waiting_for_swivel_2 + -1'arm1_store_free + -1'arm1_waiting_for_swivel_1 + -1'arm1_storing + -1'arm1_waiting_for_swivel_2 = -1
invariant :belt2_light_barrier_true + belt2_light_barrier_false = 1
invariant :arm2_storing + arm2_having_swivel_1 + arm2_waiting_for_swivel_2 + A2U_rotated + A2U_in + A2U_rot1_in + A2U_rot2_in + A2U_rot3_in + A2U_rot1_rs + A2U_rot1_run + A2U_rot2_rs + A2U_rot2_run + A2U_rot3_rs + A2U_rot3_run + A2U_extended + -1'arm2_magnet_on + A2U_ext_rs + A2U_ext_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run = 0
invariant :arm2_release_angle + arm1_pick_up_angle + arm1_release_angle + arm2_pick_up_angle = 1
invariant :ch_DC_free + -1'ch_CF_full + ch_A1P_free + ch_TA1_free + ch_A2D_free + -1'ch_FT_full + -1'ch_PA2_full + press_ready_for_unloading + PL_in + PL_out + PL_lower_rs + PL_lower_run + -1'table_ready_for_unloading + -1'TU_in + -1'TU_out + -1'table_at_unload_angle + -1'TU_lift_rs + -1'TU_lift_run + -1'TU_rot_rs + -1'TU_rot_run + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run + -1'feed_belt_occupied + -1'FB_in + -1'FB_at_end + -1'FB_out + -1'FB_trans_rs + -1'FB_trans_run + -1'FB_deliver_rs + -1'FB_deliver_run + arm2_store_free + -1'arm2_storing + arm2_having_swivel_2 + -1'arm2_having_swivel_1 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + -1'A2L_out + -1'A2L_loaded + -1'A2L_ret_rs + -1'A2L_ret_run + -1'arm1_storing + -1'arm1_having_swivel_1 + -1'crane_mag_on + -1'CU_unloaded + -1'CU_ready_to_transport + -1'CU_out + -1'CU_lift_rs + -1'CU_lift_run + -1'CU_trans_rs + -1'CU_trans_run + CL_out + CL_ready_to_transport + CL_loaded + CL_trans_rs + CL_trans_run + CL_lift_rs + CL_lift_run = 2
invariant :ch_FT_free + ch_FT_full + table_ready_for_unloading + TL_out + TL_in + table_at_load_angle + TL_rot_rs + TL_rot_run + TL_lower_rs + TL_lower_run + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :ch_PA2_free + ch_PA2_full + -1'press_ready_for_unloading + -1'arm2_store_free + -1'arm2_having_swivel_2 + -1'A2U_out + -1'A2U_unloaded + -1'arm2_magnet_on + -1'A2U_ret_rs + -1'A2U_ret_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run = -1
invariant :table_load_angle + table_unload_angle = 1
invariant :arm1_pick_up_ext + arm1_retract_ext + arm1_release_ext = 1
invariant :arm1_backward + -1'A1L_ret_rs + -1'A1L_ret_run + -1'A1U_ret_rs + -1'A1U_ret_run = 0
invariant :belt1_light_barrier_true + belt1_light_barrier_false = 1
invariant :press_upward + -1'forge_rs + -1'forge_run = 0
Reverse transition relation is NOT exact ! Due to transitions PU_lower_Pstart, forge_Pstart, PL_lower_Pstart, TL_rot_Pstart, TL_lower_Pstart, TU_lift_Pstart, TU_rot_Pstart, DB_trans_Pstart, DB_deliver_Pstart, FB_trans_Pstart, FB_deliver_Pstart, arm2_unlock_swivel_1, arm2_unlock_swivel_2, A2U_rot1_Pstop, A2U_rot1_Pstart, A2U_rot2_Pstop, A2U_rot2_Pstart, A2U_rot3_Pstop, A2U_rot3_Pstart, A2U_ext_Pstart, A2U_ret_Pstart, A2L_rot1_Pstop, A2L_rot1_Pstart, A2L_rot2_Pstop, A2L_rot2_Pstart, A2L_rot3_Pstop, A2L_rot3_Pstart, A2L_ext_Pstart, A2L_ret_Pstart, arm1_unlock_swivel_1, arm1_unlock_swivel_2, A1L_rot1_Pstop, A1L_rot1_Pstart, A1L_rot2_Pstop, A1L_rot2_Pstart, A1L_rot3_Pstop, A1L_rot3_Pstart, A1L_ext_Pstart, A1L_ret_Pstart, A1U_rot1_Pstart, A1U_rot2_Pstop, A1U_rot2_Pstart, A1U_rot3_Pstop, A1U_rot3_Pstart, A1U_ext_Pstart, A1U_ret_Pstart, CU_lift_Pstart, CU_trans_Pstart, CU_lower_Pstart, CL_lower_Pstart, CL_trans_Pstart, CL_lift_Pstart, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/150/52/202
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1153 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.5842,291308,1,0,348,888182,430,205,7331,582713,425
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-2-LTLCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((X(X(F("(feed_belt_idle>=1)")))))
Formula 1 simplified : !XXF"(feed_belt_idle>=1)"
3 unique states visited
0 strongly connected components in search stack
2 transitions explored
3 items max in DFS search stack
424 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,15.8394,381304,1,0,1072,1.48155e+06,439,351,7332,1.14887e+06,1879
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-2-LTLCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((F(G(X(F("(arm1_store_free<=arm2_having_swivel_2)"))))))
Formula 2 simplified : !FGXF"(arm1_store_free<=arm2_having_swivel_2)"
2 unique states visited
0 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
688 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,22.7189,527400,1,0,1324,2.25674e+06,448,352,7337,1.69493e+06,2515
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-2-LTLCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((G("(TU_lift_rs<=A1L_loaded)")))
Formula 3 simplified : !G"(TU_lift_rs<=A1L_loaded)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
11 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,22.8327,530024,1,0,1461,2.26785e+06,454,405,7341,1.71545e+06,2783
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-2-LTLCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((X(G(F("(swivel>=2)")))))
Formula 4 simplified : !XGF"(swivel>=2)"
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
3 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,22.8655,530784,1,0,1461,2.26785e+06,463,405,7343,1.71547e+06,2789
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-2-LTLCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((G(G(G(X("(feed_belt_idle>=1)"))))))
Formula 5 simplified : !GX"(feed_belt_idle>=1)"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
3 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,22.8914,531304,1,0,1510,2.27066e+06,466,422,7343,1.72029e+06,2880
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-2-LTLCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !(((X("(arm2_store_free>=3)"))U(X("(arm2_retract_ext<=A2U_rot3_rs)"))))
Formula 6 simplified : !(X"(arm2_store_free>=3)" U X"(arm2_retract_ext<=A2U_rot3_rs)")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,22.8954,531784,1,0,1510,2.27075e+06,476,422,7353,1.72049e+06,2886
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-2-LTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !(("(A1U_rotated<=A2L_rot2_in)"))
Formula 7 simplified : !"(A1U_rotated<=A2L_rot2_in)"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,22.896,531784,1,0,1510,2.27075e+06,479,422,7357,1.72049e+06,2888
no accepting run found
Formula 7 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-2-LTLCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !((F(("(A1U_ret_run>=3)")U(F("(A1L_rot2_rs>=1)")))))
Formula 8 simplified : !F("(A1U_ret_run>=3)" U F"(A1L_rot2_rs>=1)")
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3058 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 66 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP8==true))U(<>((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 123 ms.
FORMULA ParamProductionCell-PT-2-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP10==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 86 ms.
FORMULA ParamProductionCell-PT-2-LTLCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 135 ms.
FORMULA ParamProductionCell-PT-2-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 58 ms.
FORMULA ParamProductionCell-PT-2-LTLCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 34 ms.
FORMULA ParamProductionCell-PT-2-LTLCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 110 ms.
FORMULA ParamProductionCell-PT-2-LTLCardinality-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP15==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 114 ms.
FORMULA ParamProductionCell-PT-2-LTLCardinality-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP16==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 207 ms.
FORMULA ParamProductionCell-PT-2-LTLCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527487151697

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:58:39 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:58:39 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:58:40 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 111 ms
May 28, 2018 5:58:40 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 231 places.
May 28, 2018 5:58:40 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 202 transitions.
May 28, 2018 5:58:40 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 33 ms
May 28, 2018 5:58:40 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 239 ms
May 28, 2018 5:58:40 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 6 ms
May 28, 2018 5:58:40 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
May 28, 2018 5:58:41 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
May 28, 2018 5:58:41 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 59 place invariants in 60 ms
May 28, 2018 5:58:42 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 231 variables to be positive in 830 ms
May 28, 2018 5:58:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 202 transitions.
May 28, 2018 5:58:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/202 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:58:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 11 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:58:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 202 transitions.
May 28, 2018 5:58:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 10 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:58:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 202 transitions.
May 28, 2018 5:58:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/202) took 2416 ms. Total solver calls (SAT/UNSAT): 416(302/114)
May 28, 2018 5:58:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/202) took 5919 ms. Total solver calls (SAT/UNSAT): 1433(983/450)
May 28, 2018 5:58:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/202) took 8985 ms. Total solver calls (SAT/UNSAT): 2480(1853/627)
May 28, 2018 5:58:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/202) took 12294 ms. Total solver calls (SAT/UNSAT): 3355(2401/954)
May 28, 2018 5:58:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/202) took 15716 ms. Total solver calls (SAT/UNSAT): 4864(2815/2049)
May 28, 2018 5:59:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/202) took 18797 ms. Total solver calls (SAT/UNSAT): 5075(2832/2243)
May 28, 2018 5:59:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/202) took 22061 ms. Total solver calls (SAT/UNSAT): 5781(3237/2544)
May 28, 2018 5:59:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 24043 ms. Total solver calls (SAT/UNSAT): 6714(3414/3300)
May 28, 2018 5:59:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 202 transitions.
May 28, 2018 5:59:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 157 ms. Total solver calls (SAT/UNSAT): 61(0/61)
May 28, 2018 5:59:07 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 26211ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-2"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-2.tgz
mv ParamProductionCell-PT-2 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ParamProductionCell-PT-2, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585300103"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;