fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r260-csrt-152732585300099
Last Updated
June 26, 2018

About the Execution of ITS-Tools for ParamProductionCell-PT-0

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15756.180 95988.00 268355.00 397.60 FFTFFFFFTFTFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......................................
/home/mcc/execution
total 292K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.8K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.9K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 144K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ParamProductionCell-PT-0, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585300099
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-00
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-01
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-02
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-03
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-04
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-05
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-06
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-07
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-08
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-09
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-10
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-11
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-12
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-13
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-14
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527486925734

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(deposit_belt_empty>=1)"))
Formula 0 simplified : !"(deposit_belt_empty>=1)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 176 rows 198 cols
invariant :arm2_stop + A2U_ext_rs + A2U_ext_run + A2U_ret_rs + A2U_ret_run + A2L_ext_rs + A2L_ext_run + A2L_ret_rs + A2L_ret_run = 1
invariant :arm2_magnet_off + arm2_magnet_on = 1
invariant :press_stop + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_lower_rs + PL_lower_run = 1
invariant :arm2_backward + -1'A2U_ret_rs + -1'A2U_ret_run + -1'A2L_ret_rs + -1'A2L_ret_run = 0
invariant :table_upward + -1'TL_lower_rs + -1'TL_lower_run + -1'TU_lift_rs + -1'TU_lift_run = 0
invariant :robot_stop + A2U_rot1_rs + A2U_rot1_run + A2U_rot2_rs + A2U_rot2_run + A2U_rot3_rs + A2U_rot3_run + A2L_rot1_rs + A2L_rot1_run + A2L_rot2_rs + A2L_rot2_run + A2L_rot3_rs + A2L_rot3_run + A1L_rot1_rs + A1L_rot1_run + A1L_rot2_rs + A1L_rot2_run + A1L_rot3_rs + A1L_rot3_run + A1U_rot1_rs + A1U_rot1_run + A1U_rot2_rs + A1U_rot2_run + A1U_rot3_rs + A1U_rot3_run = 1
invariant :belt1_light_barrier_true + belt1_light_barrier_false = 1
invariant :deposit_belt_idle + deposit_belt_occupied + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :arm2_storing + arm2_having_swivel_1 + arm2_waiting_for_swivel_2 + A2U_rotated + A2U_in + A2U_rot1_in + A2U_rot2_in + A2U_rot3_in + A2U_rot1_rs + A2U_rot1_run + A2U_rot2_rs + A2U_rot2_run + A2U_rot3_rs + A2U_rot3_run + A2U_extended + -1'arm2_magnet_on + A2U_ext_rs + A2U_ext_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run = 0
invariant :press_upward + -1'forge_rs + -1'forge_run = 0
invariant :arm1_storing + arm1_having_swivel_1 + arm1_waiting_for_swivel_2 + A1L_out + A1L_loaded + arm1_magnet_off + A1L_ret_rs + A1L_ret_run + A1U_rotated + A1U_in + A1U_rot1_in + A1U_rot2_in + A1U_rot3_in + A1U_rot1_rs + A1U_rot1_run + A1U_rot2_rs + A1U_rot2_run + A1U_rot3_rs + A1U_rot3_run + A1U_extendet + A1U_ext_rs + A1U_ext_run = 1
invariant :belt2_start + -1'DB_trans_rs + -1'DB_trans_run + -1'DB_deliver_rs + -1'DB_deliver_run = 0
invariant :c_p2 + c_p1 = 1
invariant :ch_FT_free + ch_FT_full + table_ready_for_unloading + TL_out + TL_in + table_at_load_angle + TL_rot_rs + TL_rot_run + TL_lower_rs + TL_lower_run + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :p_p2 + p_p1 = 1
invariant :press_up + -1'PL_lower_rs + -1'PL_lower_run = 0
invariant :arm2_release_ext + arm2_retract_ext + arm2_pick_up_ext = 1
invariant :ch_TA1_full + ch_TA1_free + -1'table_ready_for_unloading + -1'arm1_store_free + -1'arm1_having_swivel_2 + A1L_out + A1L_loaded + arm1_magnet_off + A1L_ret_rs + A1L_ret_run + -1'A1U_out + -1'A1U_unloadet + -1'A1U_ret_rs + -1'A1U_ret_run = 0
invariant :belt1_stop + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :arm2_forward + -1'A2U_ext_rs + -1'A2U_ext_run + -1'A2L_ext_rs + -1'A2L_ext_run = 0
invariant :ch_CF_free + ch_CF_full + feed_belt_occupied + feed_belt_empty + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :arm1_magnet_on + arm1_magnet_off = 1
invariant :table_bottom_pos + table_top_pos = 1
invariant :robot_left + -1'A2U_rot2_rs + -1'A2U_rot2_run + -1'A2L_rot1_rs + -1'A2L_rot1_run + -1'A2L_rot2_rs + -1'A2L_rot2_run + -1'A2L_rot3_rs + -1'A2L_rot3_run + -1'A1L_rot1_rs + -1'A1L_rot1_run + -1'A1L_rot2_rs + -1'A1L_rot2_run + -1'A1L_rot3_rs + -1'A1L_rot3_run + -1'A1U_rot3_rs + -1'A1U_rot3_run = 0
invariant :arm1_store_free + arm1_waiting_for_swivel_1 + arm1_having_swivel_2 + A1L_rotated + A1L_in + A1L_rot1_in + A1L_rot2_in + A1L_rot3_in + A1L_rot1_rs + A1L_rot1_run + A1L_rot2_rs + A1L_rot2_run + A1L_rot3_rs + A1L_rot3_run + A1_extended + -1'arm1_magnet_off + A1L_ext_rs + A1L_ext_run + A1U_out + A1U_unloadet + A1U_ret_rs + A1U_ret_run = 0
invariant :arm1_forward + -1'A1L_ext_rs + -1'A1L_ext_run + -1'A1U_ext_rs + -1'A1U_ext_run = 0
invariant :table_ready_for_loading + table_ready_for_unloading + TL_out + TL_in + table_at_load_angle + TL_rot_rs + TL_rot_run + TL_lower_rs + TL_lower_run + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run = 1
invariant :arm2_release_angle + arm1_pick_up_angle + arm1_release_angle + arm2_pick_up_angle = 1
invariant :table_load_angle + table_unload_angle = 1
invariant :arm1_pick_up_ext + arm1_retract_ext + arm1_release_ext = 1
invariant :ch_A1P_full + ch_A1P_free + press_ready_for_unloading + PU_out + blank_forged + PU_in + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_in + PL_out + PL_lower_rs + PL_lower_run + -1'arm1_storing + -1'arm1_having_swivel_1 + -1'A1L_out + -1'A1L_loaded + -1'arm1_magnet_off + -1'A1L_ret_rs + -1'A1L_ret_run + A1U_out + A1U_unloadet + A1U_ret_rs + A1U_ret_run = 0
invariant :table_stop_v + TL_lower_rs + TL_lower_run + TU_lift_rs + TU_lift_run = 1
invariant :belt1_start + -1'FB_trans_rs + -1'FB_trans_run + -1'FB_deliver_rs + -1'FB_deliver_run = 0
invariant :press_at_upper_pos + press_at_lower_pos + press_at_middle_pos = 1
invariant :belt2_stop + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :ch_A2D_full + ch_A2D_free + deposit_belt_occupied + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run + -1'arm2_storing + -1'arm2_having_swivel_1 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + -1'A2L_out + -1'A2L_loaded + -1'A2L_ret_rs + -1'A2L_ret_run = 1
invariant :table_stop_h + TL_rot_rs + TL_rot_run + TU_rot_rs + TU_rot_run = 1
invariant :table_right + -1'TL_rot_rs + -1'TL_rot_run + -1'TU_rot_rs + -1'TU_rot_run = 0
invariant :arm1_backward + -1'A1L_ret_rs + -1'A1L_ret_run + -1'A1U_ret_rs + -1'A1U_ret_run = 0
invariant :swivel + -1'arm2_store_free + -1'arm2_waiting_for_swivel_1 + -1'arm2_storing + -1'arm2_waiting_for_swivel_2 + -1'arm1_store_free + -1'arm1_waiting_for_swivel_1 + -1'arm1_storing + -1'arm1_waiting_for_swivel_2 = -1
invariant :ch_DC_full + ch_DC_free + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :arm1_stop + A1L_ext_rs + A1L_ext_run + A1L_ret_rs + A1L_ret_run + A1U_ext_rs + A1U_ext_run + A1U_ret_rs + A1U_ret_run = 1
invariant :feed_belt_idle + feed_belt_occupied + feed_belt_empty + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :press_down + -1'PU_lower_rs + -1'PU_lower_run = 0
invariant :robot_right + -1'A2U_rot1_rs + -1'A2U_rot1_run + -1'A2U_rot3_rs + -1'A2U_rot3_run + -1'A1U_rot1_rs + -1'A1U_rot1_run + -1'A1U_rot2_rs + -1'A1U_rot2_run = 0
invariant :belt2_light_barrier_true + belt2_light_barrier_false = 1
invariant :arm2_store_free + arm2_waiting_for_swivel_1 + arm2_having_swivel_2 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + A2L_rotated + A2L_in + A2L_rot1_in + A2L_rot2_in + A2L_rot3_in + A2L_rot1_rs + A2L_rot1_run + A2L_rot2_rs + A2L_rot2_run + A2L_rot3_rs + A2L_rot3_run + A2L_extended + A2L_ext_rs + A2L_ext_run = 1
invariant :ch_PA2_free + ch_PA2_full + -1'press_ready_for_unloading + -1'arm2_store_free + -1'arm2_having_swivel_2 + -1'A2U_out + -1'A2U_unloaded + -1'arm2_magnet_on + -1'A2U_ret_rs + -1'A2U_ret_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run = -1
invariant :press_ready_for_loading + press_ready_for_unloading + PU_out + blank_forged + PU_in + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_in + PL_out + PL_lower_rs + PL_lower_run = 1
Reverse transition relation is NOT exact ! Due to transitions PU_lower_Pstart, forge_Pstart, PL_lower_Pstart, TL_rot_Pstart, TL_lower_Pstart, TU_lift_Pstart, TU_rot_Pstart, DB_trans_Pstart, DB_deliver_Pstart, FB_trans_Pstart, FB_deliver_Pstart, arm2_unlock_swivel_1, arm2_unlock_swivel_2, A2U_rot1_Pstop, A2U_rot1_Pstart, A2U_rot2_Pstop, A2U_rot2_Pstart, A2U_rot3_Pstop, A2U_rot3_Pstart, A2U_ext_Pstart, A2U_ret_Pstart, A2L_rot1_Pstop, A2L_rot1_Pstart, A2L_rot2_Pstop, A2L_rot2_Pstart, A2L_rot3_Pstart, A2L_ext_Pstart, A2L_ret_Pstart, arm1_unlock_swivel_1, arm1_unlock_swivel_2, A1L_rot1_Pstop, A1L_rot1_Pstart, A1L_rot2_Pstop, A1L_rot2_Pstart, A1L_rot3_Pstop, A1L_rot3_Pstart, A1L_ext_Pstart, A1L_ret_Pstart, A1U_rot1_Pstart, A1U_rot2_Pstop, A1U_rot2_Pstart, A1U_rot3_Pstop, A1U_rot3_Pstart, A1U_ext_Pstart, A1U_ret_Pstart, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/131/45/176
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
696 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,7.01502,165220,1,0,311,544955,378,179,6284,405643,373
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !(((G(F("(TU_lift_rs<=ch_TA1_full)")))U(("(A1U_rot1_run>=2)")U("(A2U_rot2_rs>=3)"))))
Formula 1 simplified : !(GF"(TU_lift_rs<=ch_TA1_full)" U ("(A1U_rot1_run>=2)" U "(A2U_rot2_rs>=3)"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
3220 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,39.2083,738468,1,0,1100,3.64626e+06,393,833,6296,4.10191e+06,3658
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((F((F("(arm2_waiting_for_swivel_1>=1)"))U(F("(A1U_ext_run<=arm1_waiting_for_swivel_2)")))))
Formula 2 simplified : !F(F"(arm2_waiting_for_swivel_1>=1)" U F"(A1U_ext_run<=arm1_waiting_for_swivel_2)")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,39.2094,738468,1,0,1100,3.64626e+06,402,833,6300,4.10192e+06,3662
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !(((F(X("(c_p1>=2)")))U(("(A2U_ext_run>=1)")U("(arm1_magnet_on>=3)"))))
Formula 3 simplified : !(FX"(c_p1>=2)" U ("(A2U_ext_run>=1)" U "(arm1_magnet_on>=3)"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
230 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,41.5157,800736,1,0,1105,3.66764e+06,417,835,6307,4.13953e+06,6305
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((X(F(X(G("(deposit_belt_empty>=3)"))))))
Formula 4 simplified : !XFXG"(deposit_belt_empty>=3)"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
98 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,42.4997,831092,1,0,1240,3.6848e+06,430,970,6309,4.18268e+06,9333
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((F("(belt1_light_barrier_true>=3)")))
Formula 5 simplified : !F"(belt1_light_barrier_true>=3)"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
117 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,43.6706,859076,1,0,1375,3.69526e+06,439,1106,6311,4.20798e+06,11055
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((F(X(G(F("(ch_PA2_full>=2)"))))))
Formula 6 simplified : !FXGF"(ch_PA2_full>=2)"
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,43.6741,859076,1,0,1375,3.69526e+06,448,1106,6313,4.208e+06,11061
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !((F((G("(press_down>=1)"))U(G("(A2L_extended>=2)")))))
Formula 7 simplified : !F(G"(press_down>=1)" U G"(A2L_extended>=2)")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
301 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,46.6878,885676,1,0,1375,3.69526e+06,461,1106,6315,4.20804e+06,13692
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !((X(F("(TL_lower_rs>=1)"))))
Formula 8 simplified : !XF"(TL_lower_rs>=1)"
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
90 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,47.5906,886732,1,0,1915,3.80345e+06,470,1197,6316,4.30151e+06,14915
no accepting run found
Formula 8 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 9 : !((G(X("(arm2_release_ext<=table_unload_angle)"))))
Formula 9 simplified : !GX"(arm2_release_ext<=table_unload_angle)"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1797 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,65.5624,1110412,1,0,3068,5.07736e+06,476,1753,6321,6.00477e+06,17908
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 10 : !(((("(A2L_ret_rs<=PL_out)")U("(FB_in>=1)"))U("(FB_deliver_run<=ch_A1P_full)")))
Formula 10 simplified : !(("(A2L_ret_rs<=PL_out)" U "(FB_in>=1)") U "(FB_deliver_run<=ch_A1P_full)")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,65.565,1110848,1,0,3068,5.07736e+06,498,1753,6341,6.00477e+06,17914
no accepting run found
Formula 10 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 11 : !(("(PL_out>=2)"))
Formula 11 simplified : !"(PL_out>=2)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,65.5653,1110848,1,0,3068,5.07736e+06,501,1753,6343,6.00477e+06,17916
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 12 : !((X(X(G(X("(arm2_having_swivel_2<=arm2_storing)"))))))
Formula 12 simplified : !XXGX"(arm2_having_swivel_2<=arm2_storing)"
6 unique states visited
6 strongly connected components in search stack
6 transitions explored
6 items max in DFS search stack
686 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,72.4191,1200592,1,0,3703,5.5926e+06,507,2032,6348,6.62558e+06,19317
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 13 : !(("(arm1_magnet_on<=TU_lift_run)"))
Formula 13 simplified : !"(arm1_magnet_on<=TU_lift_run)"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,72.4198,1200592,1,0,3703,5.5926e+06,510,2032,6352,6.62558e+06,19319
no accepting run found
Formula 13 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-0-LTLCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 14 : !((F(G(G("(p_p2<=A1U_rot2_in)")))))
Formula 14 simplified : !FG"(p_p2<=A1U_rot2_in)"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5659 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 132 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]([]((LTLAP22==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 191 ms.
FORMULA ParamProductionCell-PT-0-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP23==true))U([](X((LTLAP24==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 197 ms.
FORMULA ParamProductionCell-PT-0-LTLCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527487021722

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:55:31 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:55:31 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:55:31 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 91 ms
May 28, 2018 5:55:31 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 198 places.
May 28, 2018 5:55:31 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 176 transitions.
May 28, 2018 5:55:31 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 18 ms
May 28, 2018 5:55:32 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 264 ms
May 28, 2018 5:55:32 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 6 ms
May 28, 2018 5:55:32 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
May 28, 2018 5:55:33 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 176 transitions.
May 28, 2018 5:55:33 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 49 place invariants in 156 ms
May 28, 2018 5:55:39 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 198 variables to be positive in 5686 ms
May 28, 2018 5:55:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 176 transitions.
May 28, 2018 5:55:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/176 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:55:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 22 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:55:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 176 transitions.
May 28, 2018 5:55:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 33 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:55:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 176 transitions.
May 28, 2018 5:55:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/176) took 357 ms. Total solver calls (SAT/UNSAT): 28(13/15)
May 28, 2018 5:55:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/176) took 3528 ms. Total solver calls (SAT/UNSAT): 209(117/92)
May 28, 2018 5:55:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/176) took 6650 ms. Total solver calls (SAT/UNSAT): 398(221/177)
May 28, 2018 5:55:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/176) took 9700 ms. Total solver calls (SAT/UNSAT): 536(234/302)
May 28, 2018 5:55:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/176) took 12853 ms. Total solver calls (SAT/UNSAT): 836(286/550)
May 28, 2018 5:56:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/176) took 15881 ms. Total solver calls (SAT/UNSAT): 1033(390/643)
May 28, 2018 5:56:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/176) took 19920 ms. Total solver calls (SAT/UNSAT): 1193(448/745)
May 28, 2018 5:56:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/176) took 23966 ms. Total solver calls (SAT/UNSAT): 1361(538/823)
May 28, 2018 5:56:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/176) took 27135 ms. Total solver calls (SAT/UNSAT): 1578(605/973)
May 28, 2018 5:56:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/176) took 31339 ms. Total solver calls (SAT/UNSAT): 1914(687/1227)
May 28, 2018 5:56:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/176) took 34365 ms. Total solver calls (SAT/UNSAT): 2165(737/1428)
May 28, 2018 5:56:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/176) took 38188 ms. Total solver calls (SAT/UNSAT): 2454(755/1699)
May 28, 2018 5:56:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/176) took 41241 ms. Total solver calls (SAT/UNSAT): 2691(772/1919)
May 28, 2018 5:56:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/176) took 44507 ms. Total solver calls (SAT/UNSAT): 2864(783/2081)
May 28, 2018 5:56:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/176) took 47799 ms. Total solver calls (SAT/UNSAT): 2991(851/2140)
May 28, 2018 5:56:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/176) took 50843 ms. Total solver calls (SAT/UNSAT): 3112(914/2198)
May 28, 2018 5:56:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/176) took 53916 ms. Total solver calls (SAT/UNSAT): 3230(969/2261)
May 28, 2018 5:56:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/176) took 57716 ms. Total solver calls (SAT/UNSAT): 3358(1011/2347)
May 28, 2018 5:56:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/176) took 60805 ms. Total solver calls (SAT/UNSAT): 3520(1072/2448)
May 28, 2018 5:56:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/176) took 63984 ms. Total solver calls (SAT/UNSAT): 3754(1098/2656)
May 28, 2018 5:56:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/176) took 67047 ms. Total solver calls (SAT/UNSAT): 3899(1098/2801)
May 28, 2018 5:56:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 68966 ms. Total solver calls (SAT/UNSAT): 3968(1099/2869)
May 28, 2018 5:56:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 176 transitions.
May 28, 2018 5:56:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 312 ms. Total solver calls (SAT/UNSAT): 55(0/55)
May 28, 2018 5:56:54 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 81544ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-0"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-0.tgz
mv ParamProductionCell-PT-0 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ParamProductionCell-PT-0, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585300099"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;