fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r260-csrt-152732585200030
Last Updated
June 26, 2018

About the Execution of ITS-Tools for LamportFastMutEx-COL-8

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15748.230 2502317.00 3467334.00 523.60 FTFFFTFFF?FFFFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..............................................................................
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 44K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-COL-8, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585200030
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-00
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-01
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-02
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-03
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-04
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-05
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-06
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-07
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-08
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-09
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-10
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-11
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-12
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-13
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-14
FORMULA_NAME LamportFastMutEx-COL-8-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527484364108

05:12:47.163 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
05:12:47.178 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("((((((((((pid0.y_0>=1)&&(pid0.P_awaity_0>=1))||((pid0.y_0>=1)&&(pid1.P_awaity_1>=1)))||((pid0.y_0>=1)&&(pid2.P_awaity_2>=1)))||((pid0.y_0>=1)&&(pid3.P_awaity_3>=1)))||((pid0.y_0>=1)&&(pid4.P_awaity_4>=1)))||((pid0.y_0>=1)&&(pid5.P_awaity_5>=1)))||((pid0.y_0>=1)&&(pid6.P_awaity_6>=1)))||((pid0.y_0>=1)&&(pid7.P_awaity_7>=1)))||((pid0.y_0>=1)&&(pid8.P_awaity_8>=1)))"))
Formula 0 simplified : !"((((((((((pid0.y_0>=1)&&(pid0.P_awaity_0>=1))||((pid0.y_0>=1)&&(pid1.P_awaity_1>=1)))||((pid0.y_0>=1)&&(pid2.P_awaity_2>=1)))||((pid0.y_0>=1)&&(pid3.P_awaity_3>=1)))||((pid0.y_0>=1)&&(pid4.P_awaity_4>=1)))||((pid0.y_0>=1)&&(pid5.P_awaity_5>=1)))||((pid0.y_0>=1)&&(pid6.P_awaity_6>=1)))||((pid0.y_0>=1)&&(pid7.P_awaity_7>=1)))||((pid0.y_0>=1)&&(pid8.P_awaity_8>=1)))"
built 163 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 477
// Phase 1: matrix 477 rows 315 cols
invariant :pid0:P_start_1_0 + pid0:P_setx_3_0 + pid0:P_setbi_5_0 + pid0:P_ify0_4_0 + pid0:P_sety_9_0 + pid0:P_ifxi_10_0 + pid0:P_setbi_11_0 + pid0:P_fordo_12_0 + pid0:P_await_13_0 + pid0:P_ifyi_15_0 + pid0:P_awaity_0 + pid0:P_CS_21_0 + pid0:P_setbi_24_0 = 0
invariant :pid_x_pid25:wait_25 + pid_x_pid25:done_25 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid39:wait_39 + pid_x_pid39:done_39 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_pid65:wait_65 + pid_x_pid65:done_65 + -1'pid7:P_await_13_7 = 0
invariant :pid_x_pid7:wait_7 + pid_x_pid7:done_7 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid13:wait_13 + pid_x_pid13:done_13 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid63:wait_63 + pid_x_pid63:done_63 = 0
invariant :pid_x_pid77:wait_77 + pid_x_pid77:done_77 + -1'pid8:P_await_13_8 = 0
invariant :pid1:P_start_1_1 + pid1:P_setx_3_1 + pid1:P_setbi_5_1 + pid1:P_ify0_4_1 + pid1:P_sety_9_1 + pid1:P_ifxi_10_1 + pid1:P_setbi_11_1 + pid1:P_fordo_12_1 + pid1:P_await_13_1 + pid1:P_ifyi_15_1 + pid1:P_awaity_1 + pid1:P_CS_21_1 + pid1:P_setbi_24_1 = 1
invariant :pid_x_pid58:wait_58 + pid_x_pid58:done_58 + -1'pid6:P_await_13_6 = 0
invariant :pid_x_pid27:wait_27 + pid_x_pid27:done_27 = 0
invariant :pid_x_pid2:wait_2 + pid_x_pid2:done_2 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid11:wait_11 + pid_x_pid11:done_11 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid40:wait_40 + pid_x_pid40:done_40 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_pid60:wait_60 + pid_x_pid60:done_60 + -1'pid6:P_await_13_6 = 0
invariant :pid_x_pid75:wait_75 + pid_x_pid75:done_75 + -1'pid8:P_await_13_8 = 0
invariant :pid_x_pid68:wait_68 + pid_x_pid68:done_68 + -1'pid7:P_await_13_7 = 0
invariant :pid_x_pid12:wait_12 + pid_x_pid12:done_12 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid5:wait_5 + pid_x_pid5:done_5 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid74:wait_74 + pid_x_pid74:done_74 + -1'pid8:P_await_13_8 = 0
invariant :pid_x_pid57:wait_57 + pid_x_pid57:done_57 + -1'pid6:P_await_13_6 = 0
invariant :pid_x_pid71:wait_71 + pid_x_pid71:done_71 + -1'pid7:P_await_13_7 = 0
invariant :pid_x_bool6:b_6 + pid_x_bool7:b_7 = 1
invariant :pid_x_pid1:wait_1 + pid_x_pid1:done_1 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid34:wait_34 + pid_x_pid34:done_34 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid28:wait_28 + pid_x_pid28:done_28 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid62:wait_62 + pid_x_pid62:done_62 + -1'pid6:P_await_13_6 = 0
invariant :pid_x_pid49:wait_49 + pid_x_pid49:done_49 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_bool14:b_14 + pid_x_bool15:b_15 = 1
invariant :pid_x_pid10:wait_10 + pid_x_pid10:done_10 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid54:wait_54 + pid_x_pid54:done_54 = 0
invariant :pid_x_pid44:wait_44 + pid_x_pid44:done_44 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_pid36:wait_36 + pid_x_pid36:done_36 = 0
invariant :pid_x_pid53:wait_53 + pid_x_pid53:done_53 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid15:wait_15 + pid_x_pid15:done_15 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid70:wait_70 + pid_x_pid70:done_70 + -1'pid7:P_await_13_7 = 0
invariant :pid_x_pid8:wait_8 + pid_x_pid8:done_8 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid16:wait_16 + pid_x_pid16:done_16 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid22:wait_22 + pid_x_pid22:done_22 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid79:wait_79 + pid_x_pid79:done_79 + -1'pid8:P_await_13_8 = 0
invariant :pid_x_pid17:wait_17 + pid_x_pid17:done_17 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid29:wait_29 + pid_x_pid29:done_29 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid61:wait_61 + pid_x_pid61:done_61 + -1'pid6:P_await_13_6 = 0
invariant :pid_x_pid78:wait_78 + pid_x_pid78:done_78 + -1'pid8:P_await_13_8 = 0
invariant :pid_x_pid42:wait_42 + pid_x_pid42:done_42 + -1'pid4:P_await_13_4 = 0
invariant :pid8:P_start_1_8 + pid8:P_setx_3_8 + pid8:P_setbi_5_8 + pid8:P_ify0_4_8 + pid8:P_sety_9_8 + pid8:P_ifxi_10_8 + pid8:P_setbi_11_8 + pid8:P_fordo_12_8 + pid8:P_await_13_8 + pid8:P_ifyi_15_8 + pid8:P_awaity_8 + pid8:P_CS_21_8 + pid8:P_setbi_24_8 = 1
invariant :pid_x_pid26:wait_26 + pid_x_pid26:done_26 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid48:wait_48 + pid_x_pid48:done_48 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid69:wait_69 + pid_x_pid69:done_69 + -1'pid7:P_await_13_7 = 0
invariant :pid_x_pid31:wait_31 + pid_x_pid31:done_31 + -1'pid3:P_await_13_3 = 0
invariant :pid4:P_start_1_4 + pid4:P_setx_3_4 + pid4:P_setbi_5_4 + pid4:P_ify0_4_4 + pid4:P_sety_9_4 + pid4:P_ifxi_10_4 + pid4:P_setbi_11_4 + pid4:P_fordo_12_4 + pid4:P_await_13_4 + pid4:P_ifyi_15_4 + pid4:P_awaity_4 + pid4:P_CS_21_4 + pid4:P_setbi_24_4 = 1
invariant :pid_x_pid14:wait_14 + pid_x_pid14:done_14 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid76:wait_76 + pid_x_pid76:done_76 + -1'pid8:P_await_13_8 = 0
invariant :pid_x_pid50:wait_50 + pid_x_pid50:done_50 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid52:wait_52 + pid_x_pid52:done_52 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid6:wait_6 + pid_x_pid6:done_6 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid33:wait_33 + pid_x_pid33:done_33 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid43:wait_43 + pid_x_pid43:done_43 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_pid55:wait_55 + pid_x_pid55:done_55 + -1'pid6:P_await_13_6 = 0
invariant :pid3:P_start_1_3 + pid3:P_setx_3_3 + pid3:P_setbi_5_3 + pid3:P_ify0_4_3 + pid3:P_sety_9_3 + pid3:P_ifxi_10_3 + pid3:P_setbi_11_3 + pid3:P_fordo_12_3 + pid3:P_await_13_3 + pid3:P_ifyi_15_3 + pid3:P_awaity_3 + pid3:P_CS_21_3 + pid3:P_setbi_24_3 = 1
invariant :pid_x_pid46:wait_46 + pid_x_pid46:done_46 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid32:wait_32 + pid_x_pid32:done_32 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid37:wait_37 + pid_x_pid37:done_37 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_pid47:wait_47 + pid_x_pid47:done_47 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_bool8:b_8 + pid_x_bool9:b_9 = 1
invariant :pid_x_bool4:b_4 + pid_x_bool5:b_5 = 1
invariant :pid_x_bool10:b_10 + pid_x_bool11:b_11 = 1
invariant :pid_x_pid45:wait_45 + pid_x_pid45:done_45 = 0
invariant :pid_x_bool2:b_2 + pid_x_bool3:b_3 = 1
invariant :pid_x_pid67:wait_67 + pid_x_pid67:done_67 + -1'pid7:P_await_13_7 = 0
invariant :pid_x_bool12:b_12 + pid_x_bool13:b_13 = 1
invariant :pid_x_bool0:b_0 + pid_x_bool1:b_1 = 0
invariant :pid_x_pid41:wait_41 + pid_x_pid41:done_41 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_pid73:wait_73 + pid_x_pid73:done_73 + -1'pid8:P_await_13_8 = 0
invariant :pid5:P_start_1_5 + pid5:P_setx_3_5 + pid5:P_setbi_5_5 + pid5:P_ify0_4_5 + pid5:P_sety_9_5 + pid5:P_ifxi_10_5 + pid5:P_setbi_11_5 + pid5:P_fordo_12_5 + pid5:P_await_13_5 + pid5:P_ifyi_15_5 + pid5:P_awaity_5 + pid5:P_CS_21_5 + pid5:P_setbi_24_5 = 1
invariant :pid_x_pid59:wait_59 + pid_x_pid59:done_59 + -1'pid6:P_await_13_6 = 0
invariant :pid_x_pid64:wait_64 + pid_x_pid64:done_64 + -1'pid7:P_await_13_7 = 0
invariant :pid_x_pid72:wait_72 + pid_x_pid72:done_72 = 0
invariant :pid2:P_start_1_2 + pid2:P_setx_3_2 + pid2:P_setbi_5_2 + pid2:P_ify0_4_2 + pid2:P_sety_9_2 + pid2:P_ifxi_10_2 + pid2:P_setbi_11_2 + pid2:P_fordo_12_2 + pid2:P_await_13_2 + pid2:P_ifyi_15_2 + pid2:P_awaity_2 + pid2:P_CS_21_2 + pid2:P_setbi_24_2 = 1
invariant :pid_x_pid51:wait_51 + pid_x_pid51:done_51 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_bool16:b_16 + pid_x_bool17:b_17 = 1
invariant :pid_x_pid4:wait_4 + pid_x_pid4:done_4 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid38:wait_38 + pid_x_pid38:done_38 + -1'pid4:P_await_13_4 = 0
invariant :pid0:x_0 + pid1:x_1 + pid2:x_2 + pid3:x_3 + pid4:x_4 + pid5:x_5 + pid6:x_6 + pid7:x_7 + pid8:x_8 = 1
invariant :pid6:P_start_1_6 + pid6:P_setx_3_6 + pid6:P_setbi_5_6 + pid6:P_ify0_4_6 + pid6:P_sety_9_6 + pid6:P_ifxi_10_6 + pid6:P_setbi_11_6 + pid6:P_fordo_12_6 + pid6:P_await_13_6 + pid6:P_ifyi_15_6 + pid6:P_awaity_6 + pid6:P_CS_21_6 + pid6:P_setbi_24_6 = 1
invariant :pid_x_pid9:wait_9 + pid_x_pid9:done_9 = 0
invariant :pid_x_pid80:wait_80 + pid_x_pid80:done_80 + -1'pid8:P_await_13_8 = 0
invariant :pid_x_pid30:wait_30 + pid_x_pid30:done_30 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid66:wait_66 + pid_x_pid66:done_66 + -1'pid7:P_await_13_7 = 0
invariant :pid_x_pid18:wait_18 + pid_x_pid18:done_18 = 0
invariant :pid_x_pid19:wait_19 + pid_x_pid19:done_19 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid35:wait_35 + pid_x_pid35:done_35 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid20:wait_20 + pid_x_pid20:done_20 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid21:wait_21 + pid_x_pid21:done_21 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid23:wait_23 + pid_x_pid23:done_23 + -1'pid2:P_await_13_2 = 0
invariant :pid7:P_start_1_7 + pid7:P_setx_3_7 + pid7:P_setbi_5_7 + pid7:P_ify0_4_7 + pid7:P_sety_9_7 + pid7:P_ifxi_10_7 + pid7:P_setbi_11_7 + pid7:P_fordo_12_7 + pid7:P_await_13_7 + pid7:P_ifyi_15_7 + pid7:P_awaity_7 + pid7:P_CS_21_7 + pid7:P_setbi_24_7 = 1
invariant :pid0:y_0 + pid1:y_1 + pid2:y_2 + pid3:y_3 + pid4:y_4 + pid5:y_5 + pid6:y_6 + pid7:y_7 + pid8:y_8 = 1
invariant :pid_x_pid24:wait_24 + pid_x_pid24:done_24 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid56:wait_56 + pid_x_pid56:done_56 + -1'pid6:P_await_13_6 = 0
invariant :pid_x_pid3:wait_3 + pid_x_pid3:done_3 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid0:wait_0 + pid_x_pid0:done_0 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 10264 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 139 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 885 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50787 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 201 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP3==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 264 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 875 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 826 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X((LTLAP0==true)))U(<>(X((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 60 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>([]([]((LTLAP7==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1087 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 179 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](<>(X((LTLAP8==true)))))U([]((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 32 groups
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](<>(X((LTLAP8==true)))))U([]((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP9==true))U(X((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 294 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP9==true))U([]((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 718 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(([]((LTLAP11==true)))U([](X((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 42 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 768 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP8==true))U((LTLAP13==true)))U(<>(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 49 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((X(<>((LTLAP9==true))))U([]([]((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 104 ms.
FORMULA LamportFastMutEx-COL-8-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](<>(X((LTLAP8==true)))))U([]((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](<>(X((LTLAP8==true)))))U([]((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_STOP 1527486866425

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:12:46 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:12:46 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:12:46 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 5:12:47 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1347 ms
May 28, 2018 5:12:47 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
May 28, 2018 5:12:47 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 5:12:47 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

May 28, 2018 5:12:47 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
May 28, 2018 5:12:47 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 5:12:47 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 8 ms
May 28, 2018 5:12:48 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 5:12:48 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 5:12:48 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
May 28, 2018 5:12:48 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
May 28, 2018 5:12:48 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 19.0 instantiations of transitions. Total transitions/syncs built is 633
May 28, 2018 5:12:48 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 159 ms
May 28, 2018 5:12:49 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays P_start_1, x, y, b, P_setx_3, P_setbi_5, P_ify0_4, P_sety_9, P_ifxi_10, P_setbi_11, P_fordo_12, wait, P_await_13, done, P_ifyi_15, P_awaity, P_CS_21, P_setbi_24 to variables to allow decomposition.
May 28, 2018 5:12:49 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 539 redundant transitions.
May 28, 2018 5:12:49 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 51 ms
May 28, 2018 5:12:49 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 13 ms
May 28, 2018 5:12:50 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 121 transitions. Expanding to a total of 786 deterministic transitions.
May 28, 2018 5:12:50 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 39 ms.
May 28, 2018 5:12:51 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 101 place invariants in 196 ms
May 28, 2018 5:12:57 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 315 variables to be positive in 5970 ms
May 28, 2018 5:12:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 666 transitions.
May 28, 2018 5:12:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/666 took 3 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:12:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 94 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:12:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 666 transitions.
May 28, 2018 5:12:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 95 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:13:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 666 transitions.
May 28, 2018 5:13:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/666) took 965 ms. Total solver calls (SAT/UNSAT): 81(0/81)
May 28, 2018 5:13:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/666) took 5586 ms. Total solver calls (SAT/UNSAT): 805(32/773)
May 28, 2018 5:13:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/666) took 8631 ms. Total solver calls (SAT/UNSAT): 1664(64/1600)
May 28, 2018 5:13:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/666) took 12348 ms. Total solver calls (SAT/UNSAT): 2303(106/2197)
May 28, 2018 5:13:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/666) took 16113 ms. Total solver calls (SAT/UNSAT): 2933(139/2794)
May 28, 2018 5:13:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/666) took 19360 ms. Total solver calls (SAT/UNSAT): 3963(185/3778)
May 28, 2018 5:13:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/666) took 24746 ms. Total solver calls (SAT/UNSAT): 4569(221/4348)
May 28, 2018 5:13:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/666) took 30255 ms. Total solver calls (SAT/UNSAT): 4968(240/4728)
May 28, 2018 5:13:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/666) took 33266 ms. Total solver calls (SAT/UNSAT): 7278(355/6923)
May 28, 2018 5:14:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/666) took 36421 ms. Total solver calls (SAT/UNSAT): 8379(424/7955)
May 28, 2018 5:14:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/666) took 40012 ms. Total solver calls (SAT/UNSAT): 9093(461/8632)
May 28, 2018 5:14:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/666) took 43845 ms. Total solver calls (SAT/UNSAT): 10304(524/9780)
May 28, 2018 5:14:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/666) took 46849 ms. Total solver calls (SAT/UNSAT): 10974(578/10396)
May 28, 2018 5:14:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/666) took 50175 ms. Total solver calls (SAT/UNSAT): 11789(616/11173)
May 28, 2018 5:14:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/666) took 53427 ms. Total solver calls (SAT/UNSAT): 12266(658/11608)
May 28, 2018 5:14:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/666) took 57227 ms. Total solver calls (SAT/UNSAT): 13344(723/12621)
May 28, 2018 5:14:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/666) took 60719 ms. Total solver calls (SAT/UNSAT): 13938(773/13165)
May 28, 2018 5:14:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/666) took 64810 ms. Total solver calls (SAT/UNSAT): 14799(829/13970)
May 28, 2018 5:14:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/666) took 69107 ms. Total solver calls (SAT/UNSAT): 15353(875/14478)
May 28, 2018 5:14:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/666) took 73865 ms. Total solver calls (SAT/UNSAT): 16339(923/15416)
May 28, 2018 5:14:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/666) took 77344 ms. Total solver calls (SAT/UNSAT): 17404(1010/16394)
May 28, 2018 5:14:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/666) took 81004 ms. Total solver calls (SAT/UNSAT): 18460(1088/17372)
May 28, 2018 5:14:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/666) took 84621 ms. Total solver calls (SAT/UNSAT): 19159(1112/18047)
May 28, 2018 5:14:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/666) took 89325 ms. Total solver calls (SAT/UNSAT): 19854(1173/18681)
May 28, 2018 5:15:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/666) took 94163 ms. Total solver calls (SAT/UNSAT): 21232(1283/19949)
May 28, 2018 5:15:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/666) took 100034 ms. Total solver calls (SAT/UNSAT): 22932(1393/21539)
May 28, 2018 5:15:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/666) took 103192 ms. Total solver calls (SAT/UNSAT): 23269(1422/21847)
May 28, 2018 5:15:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/666) took 108188 ms. Total solver calls (SAT/UNSAT): 23940(1477/22463)
May 28, 2018 5:15:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/666) took 111429 ms. Total solver calls (SAT/UNSAT): 24607(1528/23079)
May 28, 2018 5:15:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/666) took 115687 ms. Total solver calls (SAT/UNSAT): 26584(1670/24914)
May 28, 2018 5:15:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/666) took 118740 ms. Total solver calls (SAT/UNSAT): 28204(1772/26432)
May 28, 2018 5:15:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/666) took 122850 ms. Total solver calls (SAT/UNSAT): 29799(1917/27882)
May 28, 2018 5:15:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/666) took 128301 ms. Total solver calls (SAT/UNSAT): 30430(1968/28462)
May 28, 2018 5:15:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/666) took 133003 ms. Total solver calls (SAT/UNSAT): 31369(2023/29346)
May 28, 2018 5:15:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(149/666) took 138716 ms. Total solver calls (SAT/UNSAT): 32607(2137/30470)
May 28, 2018 5:15:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/666) took 143339 ms. Total solver calls (SAT/UNSAT): 34132(2243/31889)
May 28, 2018 5:15:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/666) took 149780 ms. Total solver calls (SAT/UNSAT): 36225(2432/33793)
May 28, 2018 5:15:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(165/666) took 152831 ms. Total solver calls (SAT/UNSAT): 37399(2522/34877)
May 28, 2018 5:16:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/666) took 156713 ms. Total solver calls (SAT/UNSAT): 39213(2668/36545)
May 28, 2018 5:16:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/666) took 160461 ms. Total solver calls (SAT/UNSAT): 39582(2692/36890)
May 28, 2018 5:16:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(189/666) took 163832 ms. Total solver calls (SAT/UNSAT): 40235(2716/37519)
May 28, 2018 5:16:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(192/666) took 171553 ms. Total solver calls (SAT/UNSAT): 41081(2830/38251)
May 28, 2018 5:16:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(193/666) took 175288 ms. Total solver calls (SAT/UNSAT): 41361(2866/38495)
May 28, 2018 5:16:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(195/666) took 178477 ms. Total solver calls (SAT/UNSAT): 41918(2935/38983)
May 28, 2018 5:16:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(197/666) took 184199 ms. Total solver calls (SAT/UNSAT): 42471(3000/39471)
May 28, 2018 5:16:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(199/666) took 188766 ms. Total solver calls (SAT/UNSAT): 43020(3031/39989)
May 28, 2018 5:16:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(200/666) took 195336 ms. Total solver calls (SAT/UNSAT): 43293(3061/40232)
May 28, 2018 5:16:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(203/666) took 202237 ms. Total solver calls (SAT/UNSAT): 44106(3145/40961)
May 28, 2018 5:16:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(205/666) took 209934 ms. Total solver calls (SAT/UNSAT): 44643(3196/41447)
May 28, 2018 5:17:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(208/666) took 214058 ms. Total solver calls (SAT/UNSAT): 45441(3243/42198)
May 28, 2018 5:17:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(209/666) took 218041 ms. Total solver calls (SAT/UNSAT): 45705(3265/42440)
May 28, 2018 5:17:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(210/666) took 222111 ms. Total solver calls (SAT/UNSAT): 45968(3286/42682)
May 28, 2018 5:17:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(213/666) took 225427 ms. Total solver calls (SAT/UNSAT): 46751(3343/43408)
May 28, 2018 5:17:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(220/666) took 229070 ms. Total solver calls (SAT/UNSAT): 48543(3462/45081)
May 28, 2018 5:17:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(224/666) took 232089 ms. Total solver calls (SAT/UNSAT): 49545(3532/46013)
May 28, 2018 5:17:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(228/666) took 235177 ms. Total solver calls (SAT/UNSAT): 50531(3598/46933)
May 28, 2018 5:17:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(232/666) took 238582 ms. Total solver calls (SAT/UNSAT): 51501(3672/47829)
May 28, 2018 5:17:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(238/666) took 243104 ms. Total solver calls (SAT/UNSAT): 52926(3774/49152)
May 28, 2018 5:17:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(241/666) took 246468 ms. Total solver calls (SAT/UNSAT): 53625(3828/49797)
May 28, 2018 5:17:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(248/666) took 249646 ms. Total solver calls (SAT/UNSAT): 55221(3949/51272)
May 28, 2018 5:17:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(250/666) took 253172 ms. Total solver calls (SAT/UNSAT): 55668(3984/51684)
May 28, 2018 5:17:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(256/666) took 256996 ms. Total solver calls (SAT/UNSAT): 56985(4086/52899)
May 28, 2018 5:17:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(260/666) took 260428 ms. Total solver calls (SAT/UNSAT): 57843(4156/53687)
May 28, 2018 5:17:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(264/666) took 264277 ms. Total solver calls (SAT/UNSAT): 58685(4222/54463)
May 28, 2018 5:17:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/666) took 268821 ms. Total solver calls (SAT/UNSAT): 60120(4335/55785)
May 28, 2018 5:17:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(274/666) took 273310 ms. Total solver calls (SAT/UNSAT): 60720(4398/56322)
May 28, 2018 5:18:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(277/666) took 277087 ms. Total solver calls (SAT/UNSAT): 61311(4452/56859)
May 28, 2018 5:18:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(280/666) took 281060 ms. Total solver calls (SAT/UNSAT): 61893(4491/57402)
May 28, 2018 5:18:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(284/666) took 284499 ms. Total solver calls (SAT/UNSAT): 62655(4573/58082)
May 28, 2018 5:18:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(287/666) took 290558 ms. Total solver calls (SAT/UNSAT): 63216(4624/58592)
May 28, 2018 5:18:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(297/666) took 294301 ms. Total solver calls (SAT/UNSAT): 64301(4667/59634)
May 28, 2018 5:18:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(306/666) took 297735 ms. Total solver calls (SAT/UNSAT): 65192(4701/60491)
May 28, 2018 5:18:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(317/666) took 300825 ms. Total solver calls (SAT/UNSAT): 66171(4741/61430)
May 28, 2018 5:18:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(329/666) took 304057 ms. Total solver calls (SAT/UNSAT): 67101(4779/62322)
May 28, 2018 5:18:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(340/666) took 307062 ms. Total solver calls (SAT/UNSAT): 67827(4822/63005)
May 28, 2018 5:18:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(347/666) took 310581 ms. Total solver calls (SAT/UNSAT): 68226(4846/63380)
May 28, 2018 5:18:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(364/666) took 313600 ms. Total solver calls (SAT/UNSAT): 68999(4900/64099)
May 28, 2018 5:18:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(376/666) took 316643 ms. Total solver calls (SAT/UNSAT): 69485(4948/64537)
May 28, 2018 5:18:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(409/666) took 319692 ms. Total solver calls (SAT/UNSAT): 70617(5088/65529)
May 28, 2018 5:18:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(427/666) took 323513 ms. Total solver calls (SAT/UNSAT): 71206(5238/65968)
May 28, 2018 5:18:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(447/666) took 326684 ms. Total solver calls (SAT/UNSAT): 71816(5367/66449)
May 28, 2018 5:18:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(458/666) took 329930 ms. Total solver calls (SAT/UNSAT): 72128(5417/66711)
May 28, 2018 5:18:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(469/666) took 333109 ms. Total solver calls (SAT/UNSAT): 72420(5452/66968)
May 28, 2018 5:19:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(480/666) took 336248 ms. Total solver calls (SAT/UNSAT): 73217(5510/67707)
May 28, 2018 5:19:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(490/666) took 339268 ms. Total solver calls (SAT/UNSAT): 74772(5617/69155)
May 28, 2018 5:19:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(493/666) took 343168 ms. Total solver calls (SAT/UNSAT): 75219(5636/69583)
May 28, 2018 5:19:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(502/666) took 347302 ms. Total solver calls (SAT/UNSAT): 76506(5735/70771)
May 28, 2018 5:19:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(513/666) took 352437 ms. Total solver calls (SAT/UNSAT): 77969(5858/72111)
May 28, 2018 5:19:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(521/666) took 355554 ms. Total solver calls (SAT/UNSAT): 78957(5942/73015)
May 28, 2018 5:19:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(545/666) took 358749 ms. Total solver calls (SAT/UNSAT): 81537(6194/75343)
May 28, 2018 5:19:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(583/666) took 361788 ms. Total solver calls (SAT/UNSAT): 84444(6364/78080)
May 28, 2018 5:19:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(620/666) took 365020 ms. Total solver calls (SAT/UNSAT): 85887(6505/79382)
May 28, 2018 5:19:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 366386 ms. Total solver calls (SAT/UNSAT): 86157(6540/79617)
May 28, 2018 5:19:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 666 transitions.
May 28, 2018 5:19:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 80 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:19:32 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 402623ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-8"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-8.tgz
mv LamportFastMutEx-COL-8 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-COL-8, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585200030"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;