Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 33K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 69K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.9K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 121 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 359 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 34K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 107K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.1K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 10 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 598K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BridgeAndVehicles-PT-V20P20N10, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-ebro-152732379600084
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-00
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-01
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-02
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-03
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-04
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-05
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-06
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-07
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-08
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-09
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-10
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-11
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-12
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-13
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-14
FORMULA_NAME BridgeAndVehicles-PT-V20P20N10-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527613896084

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph3088030223870035343.txt, -o, /tmp/graph3088030223870035343.bin, -w, /tmp/graph3088030223870035343.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph3088030223870035343.bin, -l, -1, -v, -w, /tmp/graph3088030223870035343.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F((F("(((i0.u1.CAPACITE>=20)&&(i1.u3.VIDANGE_1>=1))||((i0.u1.CAPACITE>=20)&&(i2.u4.VIDANGE_2>=1)))"))U(X("(((((((((((((((((((((((i1.u3.NB_ATTENTE_A_1>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1))||((((i1.u3.NB_ATTENTE_A_2>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_3>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_4>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_5>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_6>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_7>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_8>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_9>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_10>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_11>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_12>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_13>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_14>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_15>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_16>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_17>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_18>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_19>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_20>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))"))))))
Formula 0 simplified : !F(F"(((i0.u1.CAPACITE>=20)&&(i1.u3.VIDANGE_1>=1))||((i0.u1.CAPACITE>=20)&&(i2.u4.VIDANGE_2>=1)))" U X"(((((((((((((((((((((((i1.u3.NB_ATTENTE_A_1>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1))||((((i1.u3.NB_ATTENTE_A_2>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_3>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_4>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_5>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_6>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_7>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_8>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_9>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_10>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_11>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_12>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_13>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_14>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_15>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_16>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_17>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_18>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_19>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))||((((i1.u3.NB_ATTENTE_A_20>=1)&&(i0.u0.ATTENTE_A>=1))&&(i0.u1.CAPACITE>=1))&&(i2.u4.CONTROLEUR_1>=1)))")
built 6 ordering constraints for composite.
built 85 ordering constraints for composite.
built 526 ordering constraints for composite.
built 295 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 130
// Phase 1: matrix 130 rows 68 cols
invariant :i0:u0:ROUTE_A + i0:u0:ATTENTE_A + i0:u1:SUR_PONT_A + i0:u1:SORTI_A = 20
invariant :i1:u3:NB_ATTENTE_A_1 + i1:u3:NB_ATTENTE_A_2 + i1:u3:NB_ATTENTE_A_3 + i1:u3:NB_ATTENTE_A_4 + i1:u3:NB_ATTENTE_A_5 + i1:u3:NB_ATTENTE_A_6 + i1:u3:NB_ATTENTE_A_7 + i1:u3:NB_ATTENTE_A_8 + i1:u3:NB_ATTENTE_A_9 + i1:u3:NB_ATTENTE_A_10 + i1:u3:NB_ATTENTE_A_11 + i1:u3:NB_ATTENTE_A_12 + i1:u3:NB_ATTENTE_A_13 + i1:u3:NB_ATTENTE_A_14 + i1:u3:NB_ATTENTE_A_15 + i1:u3:NB_ATTENTE_A_16 + i1:u3:NB_ATTENTE_A_17 + i1:u3:NB_ATTENTE_A_18 + i1:u3:NB_ATTENTE_A_19 + i1:u3:NB_ATTENTE_A_20 + i2:u4:NB_ATTENTE_A_0 = 1
invariant :i1:u3:NB_ATTENTE_B_0 + i2:u4:NB_ATTENTE_B_1 + i2:u4:NB_ATTENTE_B_2 + i2:u4:NB_ATTENTE_B_3 + i2:u4:NB_ATTENTE_B_4 + i2:u4:NB_ATTENTE_B_5 + i2:u4:NB_ATTENTE_B_6 + i2:u4:NB_ATTENTE_B_7 + i2:u4:NB_ATTENTE_B_8 + i2:u4:NB_ATTENTE_B_9 + i2:u4:NB_ATTENTE_B_10 + i2:u4:NB_ATTENTE_B_11 + i2:u4:NB_ATTENTE_B_12 + i2:u4:NB_ATTENTE_B_13 + i2:u4:NB_ATTENTE_B_14 + i2:u4:NB_ATTENTE_B_15 + i2:u4:NB_ATTENTE_B_16 + i2:u4:NB_ATTENTE_B_17 + i2:u4:NB_ATTENTE_B_18 + i2:u4:NB_ATTENTE_B_19 + i2:u4:NB_ATTENTE_B_20 = 1
invariant :i1:u5:COMPTEUR_0 + i1:u5:COMPTEUR_1 + i1:u5:COMPTEUR_2 + i1:u5:COMPTEUR_3 + i1:u5:COMPTEUR_4 + i1:u5:COMPTEUR_5 + i1:u5:COMPTEUR_6 + i1:u5:COMPTEUR_7 + i1:u5:COMPTEUR_8 + i1:u5:COMPTEUR_9 + i1:u5:COMPTEUR_10 = 1
invariant :i0:u1:SUR_PONT_A + i0:u1:CAPACITE + -1'i0:u1:SORTI_B + -1'i2:u2:ATTENTE_B + -1'i2:u2:ROUTE_B = 0
invariant :i0:u1:CHOIX_1 + i0:u1:CHOIX_2 + i1:u3:CONTROLEUR_2 + i1:u3:VIDANGE_1 + i2:u4:CONTROLEUR_1 + i2:u4:VIDANGE_2 = 1
invariant :i0:u1:SUR_PONT_B + i0:u1:SORTI_B + i2:u2:ATTENTE_B + i2:u2:ROUTE_B = 20
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 12639 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 121 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>((<>((LTLAP0==true)))U(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8566 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 425 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP3==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 45 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](((LTLAP4==true))U(<>((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 95059 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((<>((LTLAP0==true)))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8190 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](([](<>((LTLAP4==true))))U(((LTLAP5==true))U((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 436 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(X(<>((LTLAP7==true)))))U((X((LTLAP4==true)))U((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 12436 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 430 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 69 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (((LTLAP9==true))U(<>((LTLAP10==true))))U(<>(X([]((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 69 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X(X((LTLAP12==true))))U((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 84 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP14==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 71 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP15==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 75 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X(<>((LTLAP16==true))))U([]((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP18==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 64 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP19==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 85 ms.
FORMULA BridgeAndVehicles-PT-V20P20N10-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527614171322

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 5:11:39 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 29, 2018 5:11:39 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 5:11:40 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 237 ms
May 29, 2018 5:11:40 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 68 places.
May 29, 2018 5:11:40 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 548 transitions.
May 29, 2018 5:11:40 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 72 ms
May 29, 2018 5:11:40 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 29, 2018 5:11:41 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 367 ms
May 29, 2018 5:11:41 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 213 ms
Begin: Tue May 29 17:11:41 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Tue May 29 17:11:41 2018
network size: 68 nodes, 950 links, 1096 weight
quality increased from -0.0770205 to 0.214736
end computation: Tue May 29 17:11:41 2018
level 1:
start computation: Tue May 29 17:11:41 2018
network size: 6 nodes, 30 links, 1096 weight
quality increased from 0.214736 to 0.240308
end computation: Tue May 29 17:11:41 2018
level 2:
start computation: Tue May 29 17:11:41 2018
network size: 3 nodes, 9 links, 1096 weight
quality increased from 0.240308 to 0.240308
end computation: Tue May 29 17:11:41 2018
End: Tue May 29 17:11:41 2018
Total duration: 0 sec
0.240308
May 29, 2018 5:11:41 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 29, 2018 5:11:42 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 199 ms
May 29, 2018 5:11:42 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 29, 2018 5:11:43 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1031 redundant transitions.
May 29, 2018 5:11:43 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 27 ms
May 29, 2018 5:11:43 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 20 ms
May 29, 2018 5:11:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 548 transitions.
May 29, 2018 5:11:44 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 7 place invariants in 65 ms
May 29, 2018 5:11:45 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 68 variables to be positive in 547 ms
May 29, 2018 5:11:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 548 transitions.
May 29, 2018 5:11:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/548 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 5:11:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 124 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 5:11:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 548 transitions.
May 29, 2018 5:11:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 42 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 5:12:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 548 transitions.
May 29, 2018 5:12:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/548) took 614 ms. Total solver calls (SAT/UNSAT): 481(221/260)
May 29, 2018 5:12:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/548) took 3890 ms. Total solver calls (SAT/UNSAT): 5706(364/5342)
May 29, 2018 5:12:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/548) took 6953 ms. Total solver calls (SAT/UNSAT): 10942(487/10455)
May 29, 2018 5:12:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/548) took 10209 ms. Total solver calls (SAT/UNSAT): 16137(517/15620)
May 29, 2018 5:12:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/548) took 13275 ms. Total solver calls (SAT/UNSAT): 21230(585/20645)
May 29, 2018 5:12:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/548) took 16478 ms. Total solver calls (SAT/UNSAT): 24107(992/23115)
May 29, 2018 5:12:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/548) took 19705 ms. Total solver calls (SAT/UNSAT): 26948(1190/25758)
May 29, 2018 5:12:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/548) took 22994 ms. Total solver calls (SAT/UNSAT): 30680(1454/29226)
May 29, 2018 5:12:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/548) took 26135 ms. Total solver calls (SAT/UNSAT): 35435(1487/33948)
May 29, 2018 5:12:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/548) took 29377 ms. Total solver calls (SAT/UNSAT): 38718(1487/37231)
May 29, 2018 5:12:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/548) took 32559 ms. Total solver calls (SAT/UNSAT): 42867(1487/41380)
May 29, 2018 5:12:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/548) took 35630 ms. Total solver calls (SAT/UNSAT): 48273(1487/46786)
May 29, 2018 5:12:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(113/548) took 38712 ms. Total solver calls (SAT/UNSAT): 53967(1487/52480)
May 29, 2018 5:12:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/548) took 41859 ms. Total solver calls (SAT/UNSAT): 59910(1487/58423)
May 29, 2018 5:12:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/548) took 44872 ms. Total solver calls (SAT/UNSAT): 65657(1487/64170)
May 29, 2018 5:12:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/548) took 47919 ms. Total solver calls (SAT/UNSAT): 71597(1487/70110)
May 29, 2018 5:12:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/548) took 51030 ms. Total solver calls (SAT/UNSAT): 77685(1487/76198)
May 29, 2018 5:12:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(187/548) took 54032 ms. Total solver calls (SAT/UNSAT): 83160(1487/81673)
May 29, 2018 5:13:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(203/548) took 57130 ms. Total solver calls (SAT/UNSAT): 88752(1487/87265)
May 29, 2018 5:13:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(219/548) took 60238 ms. Total solver calls (SAT/UNSAT): 94088(1487/92601)
May 29, 2018 5:13:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(237/548) took 63402 ms. Total solver calls (SAT/UNSAT): 99785(1487/98298)
May 29, 2018 5:13:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(255/548) took 66429 ms. Total solver calls (SAT/UNSAT): 105158(1487/103671)
May 29, 2018 5:13:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(274/548) took 69463 ms. Total solver calls (SAT/UNSAT): 110478(1487/108991)
May 29, 2018 5:13:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(292/548) took 72474 ms. Total solver calls (SAT/UNSAT): 115185(1487/113698)
May 29, 2018 5:13:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(310/548) took 75554 ms. Total solver calls (SAT/UNSAT): 119568(1487/118081)
May 29, 2018 5:13:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(324/548) took 78677 ms. Total solver calls (SAT/UNSAT): 122753(1487/121266)
May 29, 2018 5:13:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(343/548) took 81821 ms. Total solver calls (SAT/UNSAT): 126762(1487/125275)
May 29, 2018 5:13:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(359/548) took 84967 ms. Total solver calls (SAT/UNSAT): 129858(1487/128371)
May 29, 2018 5:13:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(379/548) took 88000 ms. Total solver calls (SAT/UNSAT): 133368(1487/131881)
May 29, 2018 5:13:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(396/548) took 91021 ms. Total solver calls (SAT/UNSAT): 136037(1487/134550)
May 29, 2018 5:13:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(424/548) took 94053 ms. Total solver calls (SAT/UNSAT): 139803(1487/138316)
May 29, 2018 5:13:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(458/548) took 97129 ms. Total solver calls (SAT/UNSAT): 143322(1487/141835)
May 29, 2018 5:13:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(484/548) took 100335 ms. Total solver calls (SAT/UNSAT): 145233(1487/143746)
May 29, 2018 5:13:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(508/548) took 103343 ms. Total solver calls (SAT/UNSAT): 146397(1487/144910)
May 29, 2018 5:13:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 105721 ms. Total solver calls (SAT/UNSAT): 147083(1507/145576)
May 29, 2018 5:13:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 548 transitions.
May 29, 2018 5:13:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1682 ms. Total solver calls (SAT/UNSAT): 85(0/85)
May 29, 2018 5:13:51 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 127779ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V20P20N10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V20P20N10.tgz
mv BridgeAndVehicles-PT-V20P20N10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BridgeAndVehicles-PT-V20P20N10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-ebro-152732379600084"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;