Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.5K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 2.0M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is SimpleLoadBal-PT-20, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264600588
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-00
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-01
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-02
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-03
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-04
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-05
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-06
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-07
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-08
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-09
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-10
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-11
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-12
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-13
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-14
FORMULA_NAME SimpleLoadBal-PT-20-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527866457450

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph5220627572682088888.txt, -o, /tmp/graph5220627572682088888.bin, -w, /tmp/graph5220627572682088888.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph5220627572682088888.bin, -l, -1, -v, -w, /tmp/graph5220627572682088888.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Checking formula 0 : !((G(G("((((i3.u31.P_server_request_14_2>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(u48.P_lb_load_1_2>=1))&&(i23.u45.P_lb_load_2_4>=1))"))))
Formula 0 simplified : !G"((((i3.u31.P_server_request_14_2>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(u48.P_lb_load_1_2>=1))&&(i23.u45.P_lb_load_2_4>=1))"
built 157 ordering constraints for composite.
built 62 ordering constraints for composite.
built 62 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 535 ordering constraints for composite.
built 2121 ordering constraints for composite.
built 101 ordering constraints for composite.
built 681 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
built 101 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions T_server_process_1, T_server_process_2, T_server_process_3, T_server_process_4, T_server_process_5, T_server_process_6, T_server_process_7, T_server_process_8, T_server_process_9, T_server_process_10, T_server_process_11, T_server_process_12, T_server_process_13, T_server_process_14, T_server_process_15, T_server_process_16, T_server_process_17, T_server_process_18, T_server_process_19, T_server_process_20, T_server_process_21, T_server_process_22, T_server_process_23, T_server_process_24, T_server_process_25, T_server_process_26, T_server_process_27, T_server_process_28, T_server_process_29, T_server_process_30, T_server_process_31, T_server_process_32, T_server_process_33, T_server_process_34, T_server_process_35, T_server_process_36, T_server_process_37, T_server_process_38, T_server_process_39, T_server_process_40, T_lb_idle_receive_notification_2, T_lb_idle_receive_notification_3, T_lb_idle_receive_notification_4, T_lb_idle_receive_notification_5, T_lb_idle_receive_notification_6, T_lb_idle_receive_notification_7, T_lb_idle_receive_notification_8, T_lb_idle_receive_notification_9, T_lb_idle_receive_notification_10, T_lb_idle_receive_notification_11, T_lb_idle_receive_notification_12, T_lb_idle_receive_notification_23, T_lb_idle_receive_notification_24, T_lb_idle_receive_notification_25, T_lb_idle_receive_notification_26, T_lb_idle_receive_notification_27, T_lb_idle_receive_notification_28, T_lb_idle_receive_notification_29, T_lb_idle_receive_notification_30, T_lb_idle_receive_notification_31, T_lb_idle_receive_notification_32, T_lb_idle_receive_notification_33, T_lb_no_balance_242, T_lb_balance_to_1_4001, T_lb_balance_to_1_4002, T_lb_balance_to_1_4003, T_lb_balance_to_1_4004, T_lb_balance_to_1_4005, T_lb_balance_to_1_4006, T_lb_balance_to_1_4007, T_lb_balance_to_1_4008, T_lb_balance_to_1_4009, T_lb_balance_to_1_4010, T_lb_balance_to_1_4011, T_lb_balance_to_1_4012, T_lb_balance_to_1_4013, T_lb_balance_to_1_4014, T_lb_balance_to_1_4015, T_lb_balance_to_1_4016, T_lb_balance_to_1_4017, T_lb_balance_to_1_4018, T_lb_balance_to_1_4019, T_lb_balance_to_1_4020, T_lb_balancing_receive_notification_12, T_lb_balancing_receive_notification_32, T_lb_balancing_receive_notification_33, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :964/1155/86/2205
Compilation finished in 26831 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 61 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP0==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
2676 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,29.4557,433420,1,0,779594,1994,14404,758126,489,5905,3800693
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F(G((X("(((i18.u32.P_lb_routing_1_18>=1)&&(i23.u46.P_lb_load_1_7>=1))&&(i23.u45.P_lb_load_2_6>=1))"))U(G("((((i5.u43.P_server_request_17_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i25.u50.P_lb_load_1_11>=1))&&(i25.u49.P_lb_load_2_9>=1))"))))))
Formula 1 simplified : !FG(X"(((i18.u32.P_lb_routing_1_18>=1)&&(i23.u46.P_lb_load_1_7>=1))&&(i23.u45.P_lb_load_2_6>=1))" U G"((((i5.u43.P_server_request_17_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i25.u50.P_lb_load_1_11>=1))&&(i25.u49.P_lb_load_2_9>=1))")
3 unique states visited
2 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
35 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,29.8093,441280,1,0,791428,1995,14431,772223,489,5913,3834467
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F(G((X("(((i15.u26.P_lb_routing_1_4>=1)&&(i25.u50.P_lb_load_1_11>=1))&&(i25.u50.P_lb_load_2_12>=1))"))U("(((i2.u28.P_lb_routing_1_8>=1)&&(i23.u45.P_lb_load_1_5>=1))&&(i23.u45.P_lb_load_2_6>=1))")))))
Formula 2 simplified : !FG(X"(((i15.u26.P_lb_routing_1_4>=1)&&(i25.u50.P_lb_load_1_11>=1))&&(i25.u50.P_lb_load_2_12>=1))" U "(((i2.u28.P_lb_routing_1_8>=1)&&(i23.u45.P_lb_load_1_5>=1))&&(i23.u45.P_lb_load_2_6>=1))")
2 unique states visited
1 strongly connected components in search stack
3 transitions explored
2 items max in DFS search stack
53 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,30.3411,452048,1,0,809835,1995,14811,796594,493,5913,3888609
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !(((X("(((i9.u40.P_lb_routing_1_13>=1)&&(i23.u45.P_lb_load_1_4>=1))&&(i23.u45.P_lb_load_2_5>=1))"))U((G("(((i16.u29.P_lb_routing_1_9>=1)&&(i25.u50.P_lb_load_1_11>=1))&&(i25.u50.P_lb_load_2_12>=1))"))U("((((i19.u35.P_server_request_2_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i25.u49.P_lb_load_1_9>=1))&&(i23.u46.P_lb_load_2_7>=1))"))))
Formula 3 simplified : !(X"(((i9.u40.P_lb_routing_1_13>=1)&&(i23.u45.P_lb_load_1_4>=1))&&(i23.u45.P_lb_load_2_5>=1))" U (G"(((i16.u29.P_lb_routing_1_9>=1)&&(i25.u50.P_lb_load_1_11>=1))&&(i25.u50.P_lb_load_2_12>=1))" U "((((i19.u35.P_server_request_2_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i25.u49.P_lb_load_1_9>=1))&&(i23.u46.P_lb_load_2_7>=1))"))
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
333 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,33.671,496292,1,0,890863,1995,14868,897186,493,5913,4216378
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((X(X(F(F(F("(((i12.u22.P_server_notification_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i25.u51.P_lb_load_1_14>=1))")))))))
Formula 4 simplified : !XXF"(((i12.u22.P_server_notification_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i25.u51.P_lb_load_1_14>=1))"
LTSmin run took 16785 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>(<>(<>((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 682 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP9==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 154 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP10==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 149 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 150 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11559 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (((LTLAP13==true))U(X((LTLAP14==true))))U([](<>([]((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP16==true))U(<>(((LTLAP17==true))U((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16122 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP19==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 12199 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP20==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
6503 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,98.707,2075572,1,0,3.9954e+06,1995,14955,4.32824e+06,493,5916,15033012
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((X("(((i8.u38.P_lb_routing_1_10>=1)&&(i23.u46.P_lb_load_1_7>=1))&&(i23.u45.P_lb_load_2_6>=1))")))
Formula 5 simplified : !X"(((i8.u38.P_lb_routing_1_10>=1)&&(i23.u46.P_lb_load_1_7>=1))&&(i23.u45.P_lb_load_2_6>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,98.7089,2075836,1,0,3.9954e+06,1995,14962,4.32824e+06,493,5916,15033028
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((X("((((i8.u38.P_server_request_10_2>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i23.u45.P_lb_load_1_6>=1))&&(i23.u46.P_lb_load_2_8>=1))")))
Formula 6 simplified : !X"((((i8.u38.P_server_request_10_2>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i23.u45.P_lb_load_1_6>=1))&&(i23.u46.P_lb_load_2_8>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,98.7105,2075836,1,0,3.9954e+06,1995,14975,4.32824e+06,493,5916,15033045
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((X("(((i21.u37.P_lb_routing_1_6>=1)&&(u48.P_lb_load_1_2>=1))&&(u48.P_lb_load_2_1>=1))")))
Formula 7 simplified : !X"(((i21.u37.P_lb_routing_1_6>=1)&&(u48.P_lb_load_1_2>=1))&&(u48.P_lb_load_2_1>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,98.712,2075836,1,0,3.9954e+06,1995,14986,4.32824e+06,495,5916,15033053
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !(("(((i8.u38.P_lb_routing_1_10>=1)&&(i25.u50.P_lb_load_1_12>=1))&&(i25.u50.P_lb_load_2_13>=1))"))
Formula 8 simplified : !"(((i8.u38.P_lb_routing_1_10>=1)&&(i25.u50.P_lb_load_1_12>=1))&&(i25.u50.P_lb_load_2_13>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,98.7134,2075836,1,0,3.9954e+06,1995,14998,4.32824e+06,495,5916,15033066
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-20-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !(((("((((i5.u43.P_server_request_17_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i23.u46.P_lb_load_1_7>=1))&&(i23.u45.P_lb_load_2_5>=1))")U(X("((((i3.u31.P_server_request_14_2>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i24.u52.P_lb_load_1_16>=1))&&(i24.u47.P_lb_load_2_18>=1))")))U(G(F(G("((((i18.u32.P_server_request_18_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i23.u46.P_lb_load_1_8>=1))&&(i23.u45.P_lb_load_2_6>=1))"))))))
Formula 9 simplified : !(("((((i5.u43.P_server_request_17_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i23.u46.P_lb_load_1_7>=1))&&(i23.u45.P_lb_load_2_5>=1))" U X"((((i3.u31.P_server_request_14_2>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i24.u52.P_lb_load_1_16>=1))&&(i24.u47.P_lb_load_2_18>=1))") U GFG"((((i18.u32.P_server_request_18_1>=1)&&(i25.u44.P_lb_balancing_1>=1))&&(i23.u46.P_lb_load_1_8>=1))&&(i23.u45.P_lb_load_2_6>=1))")
LTSmin run took 20281 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP21==true))U(X((LTLAP22==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 685 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP23==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14696 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>((LTLAP24==true)))U((LTLAP25==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13191 ms.
FORMULA SimpleLoadBal-PT-20-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527866602630

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 3:20:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 3:20:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 3:20:59 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 273 ms
Jun 01, 2018 3:20:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 194 places.
Jun 01, 2018 3:21:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2205 transitions.
Jun 01, 2018 3:21:00 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 3:21:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 735 ms
Jun 01, 2018 3:21:01 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 414 ms
Begin: Fri Jun 1 15:21:02 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Fri Jun 1 15:21:02 2018
network size: 194 nodes, 6126 links, 4410 weight
quality increased from -0.0330525 to 0.218617
end computation: Fri Jun 1 15:21:02 2018
level 1:
start computation: Fri Jun 1 15:21:02 2018
network size: 53 nodes, 683 links, 4410 weight
quality increased from 0.218617 to 0.246784
end computation: Fri Jun 1 15:21:02 2018
level 2:
start computation: Fri Jun 1 15:21:02 2018
network size: 26 nodes, 290 links, 4410 weight
quality increased from 0.246784 to 0.246784
end computation: Fri Jun 1 15:21:02 2018
End: Fri Jun 1 15:21:02 2018
Total duration: 0 sec
0.246784
Jun 01, 2018 3:21:02 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 3:21:02 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 346 ms
Jun 01, 2018 3:21:02 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 3:21:06 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 7007 redundant transitions.
Jun 01, 2018 3:21:06 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 51 ms
Jun 01, 2018 3:21:06 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 01, 2018 3:21:07 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2205 transitions.
Jun 01, 2018 3:21:07 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2205) to apply POR reductions. Disabling POR matrices.
Jun 01, 2018 3:21:07 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1010ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-20"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-20.tgz
mv SimpleLoadBal-PT-20 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is SimpleLoadBal-PT-20, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264600588"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;