fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r213-smll-152732264300342
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for JoinFreeModules-PT-0200

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.670 348072.00 700381.00 1316.00 FTFFFFFTFFFFTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.7K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.7K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 1.2M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is JoinFreeModules-PT-0200, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264300342
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-00
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-01
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-02
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-03
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-04
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-05
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-06
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-07
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-08
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-09
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-10
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-11
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-12
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-13
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-14
FORMULA_NAME JoinFreeModules-PT-0200-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527954463250

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph734525605052811677.txt, -o, /tmp/graph734525605052811677.bin, -w, /tmp/graph734525605052811677.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph734525605052811677.bin, -l, -1, -v, -w, /tmp/graph734525605052811677.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("(u125.p629>=4)")))
Formula 0 simplified : !G"(u125.p629>=4)"
built 1 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions u0.t1, u0.t2, u0.t3, u0.t4, u0.t8, u1.t9, u1.t10, u1.t11, u1.t12, u1.t16, u2.t17, u2.t18, u2.t19, u2.t20, u2.t24, u3.t25, u3.t26, u3.t27, u3.t28, u3.t32, u4.t33, u4.t34, u4.t35, u4.t36, u4.t40, u5.t41, u5.t42, u5.t43, u5.t44, u5.t48, u6.t49, u6.t50, u6.t51, u6.t52, u6.t56, u7.t57, u7.t58, u7.t59, u7.t60, u7.t64, u8.t65, u8.t66, u8.t67, u8.t68, u8.t72, u9.t73, u9.t74, u9.t75, u9.t76, u9.t80, u10.t81, u10.t82, u10.t83, u10.t84, u10.t88, u11.t89, u11.t90, u11.t91, u11.t92, u11.t96, u12.t97, u12.t98, u12.t99, u12.t100, u12.t104, u13.t105, u13.t106, u13.t107, u13.t108, u13.t112, u14.t113, u14.t114, u14.t115, u14.t116, u14.t120, u15.t121, u15.t122, u15.t123, u15.t124, u15.t128, u16.t129, u16.t130, u16.t131, u16.t132, u16.t136, u17.t137, u17.t138, u17.t139, u17.t140, u17.t144, u18.t145, u18.t146, u18.t147, u18.t148, u18.t152, u19.t153, u19.t154, u19.t155, u19.t156, u19.t160, u20.t161, u20.t162, u20.t163, u20.t164, u20.t168, u21.t169, u21.t170, u21.t171, u21.t172, u21.t176, u22.t177, u22.t178, u22.t179, u22.t180, u22.t184, u23.t185, u23.t186, u23.t187, u23.t188, u23.t192, u24.t193, u24.t194, u24.t195, u24.t196, u24.t200, u25.t201, u25.t202, u25.t203, u25.t204, u25.t208, u26.t209, u26.t210, u26.t211, u26.t212, u26.t216, u27.t217, u27.t218, u27.t219, u27.t220, u27.t224, u28.t225, u28.t226, u28.t227, u28.t228, u28.t232, u29.t233, u29.t234, u29.t235, u29.t236, u29.t240, u30.t241, u30.t242, u30.t243, u30.t244, u30.t248, u31.t249, u31.t250, u31.t251, u31.t252, u31.t256, u32.t257, u32.t258, u32.t259, u32.t260, u32.t264, u33.t265, u33.t266, u33.t267, u33.t268, u33.t272, u34.t273, u34.t274, u34.t275, u34.t276, u34.t280, u35.t281, u35.t282, u35.t283, u35.t284, u35.t288, u36.t289, u36.t290, u36.t291, u36.t292, u36.t296, u37.t297, u37.t298, u37.t299, u37.t300, u37.t304, u38.t305, u38.t306, u38.t307, u38.t308, u38.t312, u39.t313, u39.t314, u39.t315, u39.t316, u39.t320, u40.t321, u40.t322, u40.t323, u40.t324, u40.t328, u41.t329, u41.t330, u41.t331, u41.t332, u41.t336, u42.t337, u42.t338, u42.t339, u42.t340, u42.t344, u43.t345, u43.t346, u43.t347, u43.t348, u43.t352, u44.t353, u44.t354, u44.t355, u44.t356, u44.t360, u45.t361, u45.t362, u45.t363, u45.t364, u45.t368, u46.t369, u46.t370, u46.t371, u46.t372, u46.t376, u47.t377, u47.t378, u47.t379, u47.t380, u47.t384, u48.t385, u48.t386, u48.t387, u48.t388, u48.t392, u49.t393, u49.t394, u49.t395, u49.t396, u49.t400, u50.t401, u50.t402, u50.t403, u50.t404, u50.t408, u51.t409, u51.t410, u51.t411, u51.t412, u51.t416, u52.t417, u52.t418, u52.t419, u52.t420, u52.t424, u53.t425, u53.t426, u53.t427, u53.t428, u53.t432, u54.t433, u54.t434, u54.t435, u54.t436, u54.t440, u55.t441, u55.t442, u55.t443, u55.t444, u55.t448, u56.t449, u56.t450, u56.t451, u56.t452, u56.t456, u57.t457, u57.t458, u57.t459, u57.t460, u57.t464, u58.t465, u58.t466, u58.t467, u58.t468, u58.t472, u59.t473, u59.t474, u59.t475, u59.t476, u59.t480, u60.t481, u60.t482, u60.t483, u60.t484, u60.t488, u61.t489, u61.t490, u61.t491, u61.t492, u61.t496, u62.t497, u62.t498, u62.t499, u62.t500, u62.t504, u63.t505, u63.t506, u63.t507, u63.t508, u63.t512, u64.t513, u64.t514, u64.t515, u64.t516, u64.t520, u65.t521, u65.t522, u65.t523, u65.t524, u65.t528, u66.t529, u66.t530, u66.t531, u66.t532, u66.t536, u67.t537, u67.t538, u67.t539, u67.t540, u67.t544, u68.t545, u68.t546, u68.t547, u68.t548, u68.t552, u69.t553, u69.t554, u69.t555, u69.t556, u69.t560, u70.t561, u70.t562, u70.t563, u70.t564, u70.t568, u71.t569, u71.t570, u71.t571, u71.t572, u71.t576, u72.t577, u72.t578, u72.t579, u72.t580, u72.t584, u73.t585, u73.t586, u73.t587, u73.t588, u73.t592, u74.t593, u74.t594, u74.t595, u74.t596, u74.t600, u75.t601, u75.t602, u75.t603, u75.t604, u75.t608, u76.t609, u76.t610, u76.t611, u76.t612, u76.t616, u77.t617, u77.t618, u77.t619, u77.t620, u77.t624, u78.t625, u78.t626, u78.t627, u78.t628, u78.t632, u79.t633, u79.t634, u79.t635, u79.t636, u79.t640, u80.t641, u80.t642, u80.t643, u80.t644, u80.t648, u81.t649, u81.t650, u81.t651, u81.t652, u81.t656, u82.t657, u82.t658, u82.t659, u82.t660, u82.t664, u83.t665, u83.t666, u83.t667, u83.t668, u83.t672, u84.t673, u84.t674, u84.t675, u84.t676, u84.t680, u85.t681, u85.t682, u85.t683, u85.t684, u85.t688, u86.t689, u86.t690, u86.t691, u86.t692, u86.t696, u87.t697, u87.t698, u87.t699, u87.t700, u87.t704, u88.t705, u88.t706, u88.t707, u88.t708, u88.t712, u89.t713, u89.t714, u89.t715, u89.t716, u89.t720, u90.t721, u90.t722, u90.t723, u90.t724, u90.t728, u91.t729, u91.t730, u91.t731, u91.t732, u91.t736, u92.t737, u92.t738, u92.t739, u92.t740, u92.t744, u93.t745, u93.t746, u93.t747, u93.t748, u93.t752, u94.t753, u94.t754, u94.t755, u94.t756, u94.t760, u95.t761, u95.t762, u95.t763, u95.t764, u95.t768, u96.t769, u96.t770, u96.t771, u96.t772, u96.t776, u97.t777, u97.t778, u97.t779, u97.t780, u97.t784, u98.t785, u98.t786, u98.t787, u98.t788, u98.t792, u99.t793, u99.t794, u99.t795, u99.t796, u99.t800, u100.t801, u100.t802, u100.t803, u100.t804, u100.t808, u101.t809, u101.t810, u101.t811, u101.t812, u101.t816, u102.t817, u102.t818, u102.t819, u102.t820, u102.t824, u103.t825, u103.t826, u103.t827, u103.t828, u103.t832, u104.t833, u104.t834, u104.t835, u104.t836, u104.t840, u105.t841, u105.t842, u105.t843, u105.t844, u105.t848, u106.t849, u106.t850, u106.t851, u106.t852, u106.t856, u107.t857, u107.t858, u107.t859, u107.t860, u107.t864, u108.t865, u108.t866, u108.t867, u108.t868, u108.t872, u109.t873, u109.t874, u109.t875, u109.t876, u109.t880, u110.t881, u110.t882, u110.t883, u110.t884, u110.t888, u111.t889, u111.t890, u111.t891, u111.t892, u111.t896, u112.t897, u112.t898, u112.t899, u112.t900, u112.t904, u113.t905, u113.t906, u113.t907, u113.t908, u113.t912, u114.t913, u114.t914, u114.t915, u114.t916, u114.t920, u115.t921, u115.t922, u115.t923, u115.t924, u115.t928, u116.t929, u116.t930, u116.t931, u116.t932, u116.t936, u117.t937, u117.t938, u117.t939, u117.t940, u117.t944, u118.t945, u118.t946, u118.t947, u118.t948, u118.t952, u119.t953, u119.t954, u119.t955, u119.t956, u119.t960, u120.t961, u120.t962, u120.t963, u120.t964, u120.t968, u121.t969, u121.t970, u121.t971, u121.t972, u121.t976, u122.t977, u122.t978, u122.t979, u122.t980, u122.t984, u123.t985, u123.t986, u123.t987, u123.t988, u123.t992, u124.t993, u124.t994, u124.t995, u124.t996, u124.t1000, u125.t1001, u125.t1002, u125.t1003, u125.t1004, u125.t1008, u126.t1009, u126.t1010, u126.t1011, u126.t1012, u126.t1016, u127.t1017, u127.t1018, u127.t1019, u127.t1020, u127.t1024, u128.t1025, u128.t1026, u128.t1027, u128.t1028, u128.t1032, u129.t1033, u129.t1034, u129.t1035, u129.t1036, u129.t1040, u130.t1041, u130.t1042, u130.t1043, u130.t1044, u130.t1048, u131.t1049, u131.t1050, u131.t1051, u131.t1052, u131.t1056, u132.t1057, u132.t1058, u132.t1059, u132.t1060, u132.t1064, u133.t1065, u133.t1066, u133.t1067, u133.t1068, u133.t1072, u134.t1073, u134.t1074, u134.t1075, u134.t1076, u134.t1080, u135.t1081, u135.t1082, u135.t1083, u135.t1084, u135.t1088, u136.t1089, u136.t1090, u136.t1091, u136.t1092, u136.t1096, u137.t1097, u137.t1098, u137.t1099, u137.t1100, u137.t1104, u138.t1105, u138.t1106, u138.t1107, u138.t1108, u138.t1112, u139.t1113, u139.t1114, u139.t1115, u139.t1116, u139.t1120, u140.t1121, u140.t1122, u140.t1123, u140.t1124, u140.t1128, u141.t1129, u141.t1130, u141.t1131, u141.t1132, u141.t1136, u142.t1137, u142.t1138, u142.t1139, u142.t1140, u142.t1144, u143.t1145, u143.t1146, u143.t1147, u143.t1148, u143.t1152, u144.t1153, u144.t1154, u144.t1155, u144.t1156, u144.t1160, u145.t1161, u145.t1162, u145.t1163, u145.t1164, u145.t1168, u146.t1169, u146.t1170, u146.t1171, u146.t1172, u146.t1176, u147.t1177, u147.t1178, u147.t1179, u147.t1180, u147.t1184, u148.t1185, u148.t1186, u148.t1187, u148.t1188, u148.t1192, u149.t1193, u149.t1194, u149.t1195, u149.t1196, u149.t1200, u150.t1201, u150.t1202, u150.t1203, u150.t1204, u150.t1208, u151.t1209, u151.t1210, u151.t1211, u151.t1212, u151.t1216, u152.t1217, u152.t1218, u152.t1219, u152.t1220, u152.t1224, u153.t1225, u153.t1226, u153.t1227, u153.t1228, u153.t1232, u154.t1233, u154.t1234, u154.t1235, u154.t1236, u154.t1240, u155.t1241, u155.t1242, u155.t1243, u155.t1244, u155.t1248, u156.t1249, u156.t1250, u156.t1251, u156.t1252, u156.t1256, u157.t1257, u157.t1258, u157.t1259, u157.t1260, u157.t1264, u158.t1265, u158.t1266, u158.t1267, u158.t1268, u158.t1272, u159.t1273, u159.t1274, u159.t1275, u159.t1276, u159.t1280, u160.t1281, u160.t1282, u160.t1283, u160.t1284, u160.t1288, u161.t1289, u161.t1290, u161.t1291, u161.t1292, u161.t1296, u162.t1297, u162.t1298, u162.t1299, u162.t1300, u162.t1304, u163.t1305, u163.t1306, u163.t1307, u163.t1308, u163.t1312, u164.t1313, u164.t1314, u164.t1315, u164.t1316, u164.t1320, u165.t1321, u165.t1322, u165.t1323, u165.t1324, u165.t1328, u166.t1329, u166.t1330, u166.t1331, u166.t1332, u166.t1336, u167.t1337, u167.t1338, u167.t1339, u167.t1340, u167.t1344, u168.t1345, u168.t1346, u168.t1347, u168.t1348, u168.t1352, u169.t1353, u169.t1354, u169.t1355, u169.t1356, u169.t1360, u170.t1361, u170.t1362, u170.t1363, u170.t1364, u170.t1368, u171.t1369, u171.t1370, u171.t1371, u171.t1372, u171.t1376, u172.t1377, u172.t1378, u172.t1379, u172.t1380, u172.t1384, u173.t1385, u173.t1386, u173.t1387, u173.t1388, u173.t1392, u174.t1393, u174.t1394, u174.t1395, u174.t1396, u174.t1400, u175.t1401, u175.t1402, u175.t1403, u175.t1404, u175.t1408, u176.t1409, u176.t1410, u176.t1411, u176.t1412, u176.t1416, u177.t1417, u177.t1418, u177.t1419, u177.t1420, u177.t1424, u178.t1425, u178.t1426, u178.t1427, u178.t1428, u178.t1432, u179.t1433, u179.t1434, u179.t1435, u179.t1436, u179.t1440, u180.t1441, u180.t1442, u180.t1443, u180.t1444, u180.t1448, u181.t1449, u181.t1450, u181.t1451, u181.t1452, u181.t1456, u182.t1457, u182.t1458, u182.t1459, u182.t1460, u182.t1464, u183.t1465, u183.t1466, u183.t1467, u183.t1468, u183.t1472, u184.t1473, u184.t1474, u184.t1475, u184.t1476, u184.t1480, u185.t1481, u185.t1482, u185.t1483, u185.t1484, u185.t1488, u186.t1489, u186.t1490, u186.t1491, u186.t1492, u186.t1496, u187.t1497, u187.t1498, u187.t1499, u187.t1500, u187.t1504, u188.t1505, u188.t1506, u188.t1507, u188.t1508, u188.t1512, u189.t1513, u189.t1514, u189.t1515, u189.t1516, u189.t1520, u190.t1521, u190.t1522, u190.t1523, u190.t1524, u190.t1528, u191.t1529, u191.t1530, u191.t1531, u191.t1532, u191.t1536, u192.t1537, u192.t1538, u192.t1539, u192.t1540, u192.t1544, u193.t1545, u193.t1546, u193.t1547, u193.t1548, u193.t1552, u194.t1553, u194.t1554, u194.t1555, u194.t1556, u194.t1560, u195.t1561, u195.t1562, u195.t1563, u195.t1564, u195.t1568, u196.t1569, u196.t1570, u196.t1571, u196.t1572, u196.t1576, u197.t1577, u197.t1578, u197.t1579, u197.t1580, u197.t1584, u198.t1585, u198.t1586, u198.t1587, u198.t1588, u198.t1592, u199.t1593, u199.t1594, u199.t1595, u199.t1596, u199.t1600, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/601/1000/1601
Compilation finished in 21988 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 52 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
3644 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,36.5922,296836,1,0,386532,529378,7429,164055,1616,640303,348037
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA JoinFreeModules-PT-0200-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(((F(G(X("(u71.p358>=2)"))))U("(u31.p158>=1)")))
Formula 1 simplified : !(FGX"(u71.p358>=2)" U "(u31.p158>=1)")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,36.5951,297632,1,0,386532,529378,7434,164055,1617,640303,348208
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA JoinFreeModules-PT-0200-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !(("(u45.p229>=3)"))
Formula 2 simplified : !"(u45.p229>=3)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,36.5959,297888,1,0,386532,529378,7439,164055,1618,640303,348365
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA JoinFreeModules-PT-0200-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !(((F(X(G("(u87.p439>=4)"))))U(X(("(u22.p113>=1)")U("(u111.p556>=3)")))))
Formula 3 simplified : !(FXG"(u87.p439>=4)" U X("(u22.p113>=1)" U "(u111.p556>=3)"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
7760 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,114.203,1374484,1,0,624519,4.64268e+06,7868,298842,1619,4.98612e+06,571041
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA JoinFreeModules-PT-0200-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !(("(u153.p767>=2)"))
Formula 4 simplified : !"(u153.p767>=2)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,114.204,1374484,1,0,624519,4.64268e+06,7873,298842,1620,4.98612e+06,571090
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA JoinFreeModules-PT-0200-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !(((X("(u89.p448>=1)"))U(X(G(X("(u189.p950>=5)"))))))
Formula 5 simplified : !(X"(u89.p448>=1)" U XGX"(u189.p950>=5)")
LTSmin run took 94467 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP8==true)))U(X([](X((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4678 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((<>(X((LTLAP10==true))))U(((LTLAP0==true))U((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1663 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X(X((LTLAP12==true)))))U(([]((LTLAP13==true)))U((LTLAP14==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 142 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](<>(<>([]((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 46325 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]([]([]((LTLAP16==true)))))U(X(<>([]((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 85 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([](((LTLAP18==true))U((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 87 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP20==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 78506 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP21==true))U(<>(((LTLAP22==true))U((LTLAP23==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 45877 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP24==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 794 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP25==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 774 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([](((LTLAP26==true))U((LTLAP27==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 45853 ms.
FORMULA JoinFreeModules-PT-0200-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527954811322

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 3:47:45 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 3:47:45 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 3:47:46 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 349 ms
Jun 02, 2018 3:47:46 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1001 places.
Jun 02, 2018 3:47:46 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1601 transitions.
Jun 02, 2018 3:47:46 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 1001 variables) in GAL type JoinFreeModules_PT_0200
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 1 constant array cells/variables (out of 1001 variables) in type JoinFreeModules_PT_0200
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: p,
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 1 constant variables :p=1
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 1 expressions due to constant valuations.
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 359 ms
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 160 ms
Begin: Sat Jun 2 15:47:47 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Sat Jun 2 15:47:47 2018
network size: 1000 nodes, 3200 links, 3200 weight
quality increased from -0.00102214 to 0.995
end computation: Sat Jun 2 15:47:47 2018
level 1:
start computation: Sat Jun 2 15:47:47 2018
network size: 200 nodes, 200 links, 3200 weight
quality increased from 0.995 to 0.995
end computation: Sat Jun 2 15:47:47 2018
End: Sat Jun 2 15:47:47 2018
Total duration: 0 sec
0.995
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 143 ms
Jun 02, 2018 3:47:47 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 3:47:48 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 21 ms
Jun 02, 2018 3:47:48 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 02, 2018 3:47:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1601 transitions.
Jun 02, 2018 3:47:48 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (1601) to apply POR reductions. Disabling POR matrices.
Jun 02, 2018 3:47:48 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 367ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="JoinFreeModules-PT-0200"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/JoinFreeModules-PT-0200.tgz
mv JoinFreeModules-PT-0200 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is JoinFreeModules-PT-0200, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264300342"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;