fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r213-smll-152732264200304
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for HypertorusGrid-PT-d2k3p2b04

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.970 66836.00 136655.00 448.60 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 256K
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.8K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.8K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 118 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 356 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 4.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 10 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rwxr-xr-x 1 mcc users 79K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is HypertorusGrid-PT-d2k3p2b04, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264200304
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-00
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-01
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-02
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-03
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-04
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-05
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-06
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-07
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-08
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-09
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-10
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-11
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-12
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-13
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-14
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527938201592

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph5188757728763551209.txt, -o, /tmp/graph5188757728763551209.bin, -w, /tmp/graph5188757728763551209.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph5188757728763551209.bin, -l, -1, -v, -w, /tmp/graph5188757728763551209.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G((F(F("((i6.u38.po_d1_n1_1_2>=1)&&(i6.u7.pbl_3_2>=1))")))U(("((i0.u35.pol_d2_n1_3_2>=1)&&(i6.u7.pb_d2_n1_3_2>=1))")U("((i8.u43.po_d2_n1_1_1>=1)&&(i8.u3.pbl_1_3>=1))")))))
Formula 0 simplified : !G(F"((i6.u38.po_d1_n1_1_2>=1)&&(i6.u7.pbl_3_2>=1))" U ("((i0.u35.pol_d2_n1_3_2>=1)&&(i6.u7.pb_d2_n1_3_2>=1))" U "((i8.u43.po_d2_n1_1_1>=1)&&(i8.u3.pbl_1_3>=1))"))
built 27 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 144 rows 117 cols
invariant :i6:u38:po_d1_n1_1_2 + i6:u38:pol_d1_n1_1_2 = 1
invariant :i6:u7:pb_d1_n1_3_2 + i6:u7:pb_d1_n2_3_2 + i6:u7:pb_d2_n1_3_2 + i6:u7:pb_d2_n2_3_2 + i6:u7:pbl_3_2 = 12
invariant :i2:u31:po_d2_n1_1_3 + i2:u31:pol_d2_n1_1_3 = 1
invariant :i6:u26:pi_d2_n1_3_2 + i6:u26:pil_d2_n1_3_2 = 1
invariant :i3:u11:pi_d1_n1_2_1 + i3:u11:pil_d1_n1_2_1 = 1
invariant :i0:u0:pb_d1_n1_3_1 + i0:u0:pb_d1_n2_3_1 + i0:u0:pb_d2_n1_3_1 + i0:u0:pb_d2_n2_3_1 + -1'i0:u13:pil_d1_n1_3_1 + -1'i0:u25:pil_d2_n1_3_1 + -1'i0:u35:pol_d2_n1_3_2 + -1'i0:u37:pol_d1_n1_1_1 + -1'i1:u1:pbl_1_1 + -1'i1:u9:pil_d1_n1_1_1 + -1'i1:u23:pil_d2_n1_1_1 + -1'i1:u28:pol_d1_n1_2_1 + -1'i1:u30:pol_d2_n1_1_2 + -1'i2:u2:pbl_1_2 + -1'i2:u20:pil_d1_n1_1_2 + -1'i2:u24:pil_d2_n1_1_2 + -1'i2:u29:pol_d1_n1_2_2 + -1'i2:u31:pol_d2_n1_1_3 + -1'i3:u4:pbl_2_1 + -1'i3:u11:pil_d1_n1_2_1 + -1'i3:u16:pil_d2_n1_2_1 + -1'i3:u33:pol_d2_n1_2_2 + -1'i3:u40:pol_d1_n1_3_1 + -1'i4:u5:pbl_2_2 + -1'i4:u17:pil_d2_n1_2_2 + -1'i4:u21:pil_d1_n1_2_2 + -1'i4:u34:pol_d2_n1_2_3 + -1'i4:u41:pol_d1_n1_3_2 + -1'i5:u6:pbl_2_3 + -1'i5:u12:pil_d1_n1_2_3 + -1'i5:u18:pil_d2_n1_2_3 + -1'i5:u32:pol_d2_n1_2_1 + -1'i5:u42:pol_d1_n1_3_3 + -1'i6:u7:pbl_3_2 + -1'i6:u14:pil_d1_n1_3_2 + -1'i6:u26:pil_d2_n1_3_2 + -1'i6:u36:pol_d2_n1_3_3 + -1'i6:u38:pol_d1_n1_1_2 + -1'i7:u8:pbl_3_3 + -1'i7:u19:pil_d2_n1_3_3 + -1'i7:u22:pil_d1_n1_3_3 + -1'i7:u27:pol_d1_n1_1_3 + -1'i7:u44:pol_d2_n1_3_1 + -1'i8:u3:pbl_1_3 + -1'i8:u10:pil_d1_n1_1_3 + -1'i8:u15:pil_d2_n1_1_3 + -1'i8:u39:pol_d1_n1_2_3 + -1'i8:u43:pol_d2_n1_1_1 = -60
invariant :i1:u30:po_d2_n1_1_2 + i1:u30:pol_d2_n1_1_2 = 1
invariant :i2:u20:pi_d1_n1_1_2 + i2:u20:pil_d1_n1_1_2 = 1
invariant :i4:u5:pb_d1_n1_2_2 + i4:u5:pb_d1_n2_2_2 + i4:u5:pb_d2_n1_2_2 + i4:u5:pb_d2_n2_2_2 + i4:u5:pbl_2_2 = 12
invariant :i4:u34:po_d2_n1_2_3 + i4:u34:pol_d2_n1_2_3 = 1
invariant :i0:u25:pi_d2_n1_3_1 + i0:u25:pil_d2_n1_3_1 = 1
invariant :i4:u21:pi_d1_n1_2_2 + i4:u21:pil_d1_n1_2_2 = 1
invariant :i7:u8:pb_d1_n1_3_3 + i7:u8:pb_d1_n2_3_3 + i7:u8:pb_d2_n1_3_3 + i7:u8:pb_d2_n2_3_3 + i7:u8:pbl_3_3 = 12
invariant :i8:u39:po_d1_n1_2_3 + i8:u39:pol_d1_n1_2_3 = 1
invariant :i8:u43:po_d2_n1_1_1 + i8:u43:pol_d2_n1_1_1 = 1
invariant :i3:u33:po_d2_n1_2_2 + i3:u33:pol_d2_n1_2_2 = 1
invariant :i5:u42:po_d1_n1_3_3 + i5:u42:pol_d1_n1_3_3 = 1
invariant :i6:u36:po_d2_n1_3_3 + i6:u36:pol_d2_n1_3_3 = 1
invariant :i7:u22:pi_d1_n1_3_3 + i7:u22:pil_d1_n1_3_3 = 1
invariant :i2:u24:pi_d2_n1_1_2 + i2:u24:pil_d2_n1_1_2 = 1
invariant :i7:u27:po_d1_n1_1_3 + i7:u27:pol_d1_n1_1_3 = 1
invariant :i7:u19:pi_d2_n1_3_3 + i7:u19:pil_d2_n1_3_3 = 1
invariant :i1:u23:pi_d2_n1_1_1 + i1:u23:pil_d2_n1_1_1 = 1
invariant :i7:u44:po_d2_n1_3_1 + i7:u44:pol_d2_n1_3_1 = 1
invariant :i6:u14:pi_d1_n1_3_2 + i6:u14:pil_d1_n1_3_2 = 1
invariant :i0:u37:po_d1_n1_1_1 + i0:u37:pol_d1_n1_1_1 = 1
invariant :i0:u13:pi_d1_n1_3_1 + i0:u13:pil_d1_n1_3_1 = 1
invariant :i2:u2:pb_d1_n1_1_2 + i2:u2:pb_d1_n2_1_2 + i2:u2:pb_d2_n1_1_2 + i2:u2:pb_d2_n2_1_2 + i2:u2:pbl_1_2 = 12
invariant :i5:u32:po_d2_n1_2_1 + i5:u32:pol_d2_n1_2_1 = 1
invariant :i5:u6:pb_d1_n1_2_3 + i5:u6:pb_d1_n2_2_3 + i5:u6:pb_d2_n1_2_3 + i5:u6:pb_d2_n2_2_3 + i5:u6:pbl_2_3 = 12
invariant :i0:u35:po_d2_n1_3_2 + i0:u35:pol_d2_n1_3_2 = 1
invariant :i4:u41:po_d1_n1_3_2 + i4:u41:pol_d1_n1_3_2 = 1
invariant :i5:u18:pi_d2_n1_2_3 + i5:u18:pil_d2_n1_2_3 = 1
invariant :i3:u16:pi_d2_n1_2_1 + i3:u16:pil_d2_n1_2_1 = 1
invariant :i8:u3:pb_d1_n1_1_3 + i8:u3:pb_d1_n2_1_3 + i8:u3:pb_d2_n1_1_3 + i8:u3:pb_d2_n2_1_3 + i8:u3:pbl_1_3 = 12
invariant :i8:u10:pi_d1_n1_1_3 + i8:u10:pil_d1_n1_1_3 = 1
invariant :i1:u28:po_d1_n1_2_1 + i1:u28:pol_d1_n1_2_1 = 1
invariant :i3:u4:pb_d1_n1_2_1 + i3:u4:pb_d1_n2_2_1 + i3:u4:pb_d2_n1_2_1 + i3:u4:pb_d2_n2_2_1 + i3:u4:pbl_2_1 = 12
invariant :i1:u1:pb_d1_n1_1_1 + i1:u1:pb_d1_n2_1_1 + i1:u1:pb_d2_n1_1_1 + i1:u1:pb_d2_n2_1_1 + i1:u1:pbl_1_1 = 12
invariant :i0:u0:pbl_3_1 + i0:u13:pil_d1_n1_3_1 + i0:u25:pil_d2_n1_3_1 + i0:u35:pol_d2_n1_3_2 + i0:u37:pol_d1_n1_1_1 + i1:u1:pbl_1_1 + i1:u9:pil_d1_n1_1_1 + i1:u23:pil_d2_n1_1_1 + i1:u28:pol_d1_n1_2_1 + i1:u30:pol_d2_n1_1_2 + i2:u2:pbl_1_2 + i2:u20:pil_d1_n1_1_2 + i2:u24:pil_d2_n1_1_2 + i2:u29:pol_d1_n1_2_2 + i2:u31:pol_d2_n1_1_3 + i3:u4:pbl_2_1 + i3:u11:pil_d1_n1_2_1 + i3:u16:pil_d2_n1_2_1 + i3:u33:pol_d2_n1_2_2 + i3:u40:pol_d1_n1_3_1 + i4:u5:pbl_2_2 + i4:u17:pil_d2_n1_2_2 + i4:u21:pil_d1_n1_2_2 + i4:u34:pol_d2_n1_2_3 + i4:u41:pol_d1_n1_3_2 + i5:u6:pbl_2_3 + i5:u12:pil_d1_n1_2_3 + i5:u18:pil_d2_n1_2_3 + i5:u32:pol_d2_n1_2_1 + i5:u42:pol_d1_n1_3_3 + i6:u7:pbl_3_2 + i6:u14:pil_d1_n1_3_2 + i6:u26:pil_d2_n1_3_2 + i6:u36:pol_d2_n1_3_3 + i6:u38:pol_d1_n1_1_2 + i7:u8:pbl_3_3 + i7:u19:pil_d2_n1_3_3 + i7:u22:pil_d1_n1_3_3 + i7:u27:pol_d1_n1_1_3 + i7:u44:pol_d2_n1_3_1 + i8:u3:pbl_1_3 + i8:u10:pil_d1_n1_1_3 + i8:u15:pil_d2_n1_1_3 + i8:u39:pol_d1_n1_2_3 + i8:u43:pol_d2_n1_1_1 = 72
invariant :i8:u15:pi_d2_n1_1_3 + i8:u15:pil_d2_n1_1_3 = 1
invariant :i4:u17:pi_d2_n1_2_2 + i4:u17:pil_d2_n1_2_2 = 1
invariant :i3:u40:po_d1_n1_3_1 + i3:u40:pol_d1_n1_3_1 = 1
invariant :i5:u12:pi_d1_n1_2_3 + i5:u12:pil_d1_n1_2_3 = 1
invariant :i2:u29:po_d1_n1_2_2 + i2:u29:pol_d1_n1_2_2 = 1
invariant :i1:u9:pi_d1_n1_1_1 + i1:u9:pil_d1_n1_1_1 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2896 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 42 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>(<>((LTLAP0==true))))U(((LTLAP1==true))U((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 143 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 103 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([](X(<>((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 385 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](<>([]((LTLAP5==true)))))U(([]((LTLAP6==true)))U(X((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 69 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((<>((LTLAP7==true)))U(X((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 321 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 327 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP9==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 136 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP10==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2331 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((<>([]((LTLAP2==true))))U(X(X((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 74 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 134 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([]((X((LTLAP11==true)))U(X((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8112 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP6==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 166 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP12==true))U((LTLAP13==true)))U(X(X((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 72 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP15==true))U((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4248 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 150 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (([]((LTLAP17==true)))U((LTLAP18==true)))U([](<>([]((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 109 ms.
FORMULA HypertorusGrid-PT-d2k3p2b04-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527938268428

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 11:16:43 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 11:16:43 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 11:16:43 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 78 ms
Jun 02, 2018 11:16:43 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 117 places.
Jun 02, 2018 11:16:43 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 144 transitions.
Jun 02, 2018 11:16:43 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 17 ms
Jun 02, 2018 11:16:44 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 11:16:44 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 100 ms
Jun 02, 2018 11:16:44 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 51 ms
Begin: Sat Jun 2 11:16:44 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Sat Jun 2 11:16:44 2018
network size: 117 nodes, 576 links, 288 weight
quality increased from -0.0121528 to 0.465278
end computation: Sat Jun 2 11:16:44 2018
level 1:
start computation: Sat Jun 2 11:16:44 2018
network size: 45 nodes, 189 links, 288 weight
quality increased from 0.465278 to 0.763889
end computation: Sat Jun 2 11:16:44 2018
level 2:
start computation: Sat Jun 2 11:16:44 2018
network size: 9 nodes, 45 links, 288 weight
quality increased from 0.763889 to 0.763889
end computation: Sat Jun 2 11:16:44 2018
End: Sat Jun 2 11:16:44 2018
Total duration: 0 sec
0.763889
Jun 02, 2018 11:16:44 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 11:16:44 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 67 ms
Jun 02, 2018 11:16:44 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 11:16:44 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 144 redundant transitions.
Jun 02, 2018 11:16:44 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 10 ms
Jun 02, 2018 11:16:44 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 02, 2018 11:16:44 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 144 transitions.
Jun 02, 2018 11:16:45 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 46 place invariants in 42 ms
Jun 02, 2018 11:16:45 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 117 variables to be positive in 365 ms
Jun 02, 2018 11:16:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 144 transitions.
Jun 02, 2018 11:16:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/144 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:16:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 12 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:16:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 144 transitions.
Jun 02, 2018 11:16:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 11 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:16:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 144 transitions.
Jun 02, 2018 11:16:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/144) took 1694 ms. Total solver calls (SAT/UNSAT): 566(562/4)
Jun 02, 2018 11:16:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/144) took 5052 ms. Total solver calls (SAT/UNSAT): 1650(1638/12)
Jun 02, 2018 11:16:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/144) took 8131 ms. Total solver calls (SAT/UNSAT): 2670(2650/20)
Jun 02, 2018 11:16:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/144) took 11251 ms. Total solver calls (SAT/UNSAT): 3741(3712/29)
Jun 02, 2018 11:17:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/144) took 14423 ms. Total solver calls (SAT/UNSAT): 4836(4797/39)
Jun 02, 2018 11:17:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/144) took 17549 ms. Total solver calls (SAT/UNSAT): 5925(5875/50)
Jun 02, 2018 11:17:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/144) took 20624 ms. Total solver calls (SAT/UNSAT): 6975(6913/62)
Jun 02, 2018 11:17:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/144) took 23665 ms. Total solver calls (SAT/UNSAT): 8018(7942/76)
Jun 02, 2018 11:17:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/144) took 26805 ms. Total solver calls (SAT/UNSAT): 9071(8977/94)
Jun 02, 2018 11:17:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/144) took 29846 ms. Total solver calls (SAT/UNSAT): 10020(9912/108)
Jun 02, 2018 11:17:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 30995 ms. Total solver calls (SAT/UNSAT): 10296(10188/108)
Jun 02, 2018 11:17:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 144 transitions.
Jun 02, 2018 11:17:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 9375 ms. Total solver calls (SAT/UNSAT): 486(0/486)
Jun 02, 2018 11:17:27 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 42474ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HypertorusGrid-PT-d2k3p2b04"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/HypertorusGrid-PT-d2k3p2b04.tgz
mv HypertorusGrid-PT-d2k3p2b04 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is HypertorusGrid-PT-d2k3p2b04, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264200304"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;