fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r212-smll-152732263500616
Last Updated
June 26, 2018

About the Execution of ITS-Tools for SmallOperatingSystem-PT-MT2048DC0512

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15755.250 3600000.00 4841120.00 13854.60 FTFTFFF?TFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 192K
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.9K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 127 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 365 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 13 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 8.1K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SmallOperatingSystem-PT-MT2048DC0512, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263500616
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-00
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-01
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-02
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-03
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-04
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-05
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-06
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-07
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-08
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-09
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-10
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-11
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-12
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-13
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-14
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527879056894

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(((TaskSuspended>=1)&&(DiskControllerUnit>=1))&&(TaskOnDisk>=1))"))
Formula 0 simplified : !"(((TaskSuspended>=1)&&(DiskControllerUnit>=1))&&(TaskOnDisk>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 8 rows 9 cols
invariant :TaskOnDisk + TransferToDisk + LoadingMem = 2048
invariant :FreeMemSegment + TransferToDisk + TaskReady + TaskSuspended + ExecutingTask + LoadingMem = 2048
invariant :DiskControllerUnit + TransferToDisk + LoadingMem = 512
invariant :CPUUnit + ExecutingTask = 1024
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 657 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 70 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((<>([]((LTLAP1==true))))U(<>((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20829 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(X(<>(<>((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X((LTLAP4==true))))U([](X([]((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(X(<>((LTLAP3==true)))))U(X(X([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 26 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X(<>((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X(<>((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((((LTLAP5==true))U((LTLAP5==true)))U(<>(<>((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 31 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](((LTLAP4==true))U((LTLAP2==true))))U(X(((LTLAP5==true))U((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4054 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14 ms.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X(<>((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X(<>((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 6:50:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 6:50:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 6:50:59 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 29 ms
Jun 01, 2018 6:50:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 9 places.
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 8 transitions.
Jun 01, 2018 6:51:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 18 ms
Jun 01, 2018 6:51:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
Jun 01, 2018 6:51:00 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 8 transitions.
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 4 place invariants in 7 ms
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 9 variables to be positive in 59 ms
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 8 transitions.
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/8 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 8 transitions.
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 6:51:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 8 transitions.
Jun 01, 2018 6:51:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 156 ms. Total solver calls (SAT/UNSAT): 28(28/0)
Jun 01, 2018 6:51:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 8 transitions.
Jun 01, 2018 6:51:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 63 ms. Total solver calls (SAT/UNSAT): 13(0/13)
Jun 01, 2018 6:51:01 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 738ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.000: completed loading model GAL
pins2lts-mc, 0.000: LTL layer: formula: <>([](X(X(<>((LTLAP2==true))))))
pins2lts-mc, 0.000: "<>([](X(X(<>((LTLAP2==true))))))" is not a file, parsing as formula...
pins2lts-mc, 0.000: Using Spin LTL semantics
pins2lts-mc, 0.008: buchi has 2 states
pins2lts-mc, 0.008: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.009: DFS-FIFO for weak LTL, using special progress label 16
pins2lts-mc, 0.009: There are 17 state labels and 1 edge labels
pins2lts-mc, 0.009: State length is 10, there are 11 groups
pins2lts-mc, 0.009: Running dfsfifo using 1 core (sequential)
pins2lts-mc, 0.009: Using a tree table with 2^27 elements
pins2lts-mc, 0.009: Successor permutation: rr
pins2lts-mc, 0.009: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc, 0.019: 1 levels 1000 states 4970 transitions
pins2lts-mc, 0.028: 1 levels 2000 states 10566 transitions
pins2lts-mc, 0.046: 1 levels 4000 states 22263 transitions
pins2lts-mc, 0.080: 1 levels 8000 states 46593 transitions
pins2lts-mc, 0.149: 1 levels 16000 states 97128 transitions
pins2lts-mc, 0.284: 1 levels 32000 states 201368 transitions
pins2lts-mc, 0.546: 1 levels 64000 states 415303 transitions
pins2lts-mc, 1.036: 1 levels 128000 states 853587 transitions
pins2lts-mc, 1.933: 1 levels 256000 states 1746644 transitions
pins2lts-mc, 3.532: 1 levels 512000 states 3565755 transitions
pins2lts-mc, 6.469: 1 levels 1024000 states 7259943 transitions
pins2lts-mc, 12.263: 1 levels 2048000 states 14746851 transitions
pins2lts-mc, 24.045: 1 levels 4096000 states 29895754 transitions
pins2lts-mc, 48.158: 1 levels 8192000 states 60506490 transitions
pins2lts-mc, 97.414: 1 levels 16384000 states 122256243 transitions
pins2lts-mc, 197.940: 1 levels 32768000 states 246724752 transitions
pins2lts-mc, 406.121: 1 levels 65536000 states 497312957 transitions
pins2lts-mc, 911.362: 1 levels 131072000 states 1001504625 transitions
pins2lts-mc, 979.053: Error: tree roots table full! Change -s/--ratio.
pins2lts-mc, 979.053:
pins2lts-mc, 979.053:
pins2lts-mc, 979.053: Explored 131878560 states 1007786791 transitions, fanout: 7.642
pins2lts-mc, 979.053: Total exploration time 979.050 sec (979.050 sec minimum, 979.050 sec on average)
pins2lts-mc, 979.053: States per second: 134701, Transitions per second: 1029352
pins2lts-mc, 979.053:
pins2lts-mc, 979.053: Progress states detected: 134217168
pins2lts-mc, 979.053: Redundant explorations: -1.7424
pins2lts-mc, 979.053:
pins2lts-mc, 979.053: Queue width: 8B, total height: 4677835, memory: 35.69MB
pins2lts-mc, 979.053: Tree memory: 1131.3MB, 8.8 B/state, compr.: 21.0%
pins2lts-mc, 979.053: Tree fill ratio (roots/leafs): 99.0%/41.0%
pins2lts-mc, 979.053: Stored 8 string chucks using 0MB
pins2lts-mc, 979.053: Total memory used for chunk indexing: 0MB
pins2lts-mc, 979.053: Est. total memory use: 1167.0MB (~1059.7MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X(<>((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT2048DC0512"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT2048DC0512.tgz
mv SmallOperatingSystem-PT-MT2048DC0512 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SmallOperatingSystem-PT-MT2048DC0512, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263500616"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;