fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r212-smll-152732263500582
Last Updated
June 26, 2018

About the Execution of ITS-Tools for SimpleLoadBal-PT-05

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15754.290 19328.00 39422.00 610.20 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......................
/home/mcc/execution
total 324K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.8K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.0K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 153K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SimpleLoadBal-PT-05, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263500582
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-00
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-01
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-02
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-03
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-04
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-05
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-06
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-07
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-08
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-09
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-10
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-11
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-12
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-13
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-14
FORMULA_NAME SimpleLoadBal-PT-05-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527865563208

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("((P_client_request_3>=1)&&(P_lb_idle_1>=1))")))
Formula 0 simplified : !G"((P_client_request_3>=1)&&(P_lb_idle_1>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 140
// Phase 1: matrix 140 rows 59 cols
invariant :P_server_idle_2 + P_server_waiting_2 + P_server_processed_2 = 1
invariant :P_client_idle_3 + P_client_waiting_3 = 1
invariant :-1'P_client_waiting_3 + P_client_request_3 + P_client_ack_3 + P_server_request_3_1 + P_server_request_3_2 + P_lb_routing_1_3 = 0
invariant :P_client_idle_2 + P_client_waiting_2 = 1
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_4 + P_client_request_1 + P_client_request_4 + P_client_ack_1 + P_client_ack_4 + -1'P_server_waiting_2 + -1'P_server_processed_2 + P_server_notification_ack_2 + P_server_request_1_1 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + P_server_request_4_1 + -1'P_server_request_5_2 + P_lb_routing_1_1 + P_lb_routing_1_4 + -2'P_lb_load_2_0 + -1'P_lb_load_2_1 + P_lb_load_2_3 + 2'P_lb_load_2_4 + 3'P_lb_load_2_5 = -2
invariant :P_client_waiting_1 + P_client_waiting_2 + P_client_waiting_3 + P_client_waiting_4 + P_client_waiting_5 + -1'P_client_request_1 + -1'P_client_request_2 + -1'P_client_request_3 + -1'P_client_request_4 + -1'P_client_request_5 + -1'P_client_ack_1 + -1'P_client_ack_2 + -1'P_client_ack_3 + -1'P_client_ack_4 + -1'P_client_ack_5 + P_server_waiting_1 + P_server_waiting_2 + P_server_processed_1 + P_server_processed_2 + -1'P_server_notification_ack_1 + -1'P_server_notification_ack_2 + -1'P_lb_routing_1_1 + -1'P_lb_routing_1_2 + -1'P_lb_routing_1_3 + -1'P_lb_routing_1_4 + -1'P_lb_routing_1_5 + 3'P_lb_load_1_0 + 2'P_lb_load_1_1 + P_lb_load_1_2 + -1'P_lb_load_1_4 + -2'P_lb_load_1_5 + 2'P_lb_load_2_0 + P_lb_load_2_1 + -1'P_lb_load_2_3 + -2'P_lb_load_2_4 + -3'P_lb_load_2_5 = 5
invariant :-1'P_server_waiting_2 + P_server_notification_2 + P_server_notification_ack_2 = 0
invariant :P_server_idle_1 + P_server_waiting_1 + P_server_processed_1 = 1
invariant :P_client_idle_1 + P_client_waiting_1 = 1
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_2 + -1'P_client_waiting_3 + -1'P_client_waiting_4 + -1'P_client_waiting_5 + P_client_request_1 + P_client_request_2 + P_client_request_3 + P_client_request_4 + P_client_request_5 + P_client_ack_1 + P_client_ack_2 + P_client_ack_3 + P_client_ack_4 + P_client_ack_5 + -1'P_server_waiting_1 + -1'P_server_waiting_2 + -1'P_server_processed_1 + -1'P_server_processed_2 + P_server_notification_ack_1 + P_server_notification_ack_2 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + -2'P_lb_load_1_0 + -1'P_lb_load_1_1 + P_lb_load_1_3 + 2'P_lb_load_1_4 + 3'P_lb_load_1_5 + -2'P_lb_load_2_0 + -1'P_lb_load_2_1 + P_lb_load_2_3 + 2'P_lb_load_2_4 + 3'P_lb_load_2_5 = -4
invariant :-1'P_client_waiting_5 + P_client_request_5 + P_client_ack_5 + P_server_request_5_1 + P_server_request_5_2 + P_lb_routing_1_5 = 0
invariant :P_client_waiting_4 + -1'P_client_request_4 + -1'P_client_ack_4 + P_server_waiting_2 + P_server_processed_2 + -1'P_server_notification_ack_2 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + -1'P_server_request_4_1 + P_server_request_5_2 + -1'P_lb_routing_1_4 + 2'P_lb_load_2_0 + P_lb_load_2_1 + -1'P_lb_load_2_3 + -2'P_lb_load_2_4 + -3'P_lb_load_2_5 = 2
invariant :-1'P_client_waiting_2 + P_client_request_2 + P_client_ack_2 + P_server_request_2_1 + P_server_request_2_2 + P_lb_routing_1_2 = 0
invariant :P_lb_idle_1 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_balancing_1 = 1
invariant :P_lb_load_2_0 + P_lb_load_2_1 + P_lb_load_2_2 + P_lb_load_2_3 + P_lb_load_2_4 + P_lb_load_2_5 = 1
invariant :P_client_idle_4 + P_client_waiting_4 = 1
invariant :-1'P_server_waiting_1 + P_server_notification_1 + P_server_notification_ack_1 = 0
invariant :-1'P_client_waiting_4 + P_client_request_4 + P_client_ack_4 + P_server_request_4_1 + P_server_request_4_2 + P_lb_routing_1_4 = 0
invariant :P_client_idle_5 + P_client_waiting_5 = 1
Reverse transition relation is NOT exact ! Due to transitions T_server_process_1, T_server_process_2, T_server_process_3, T_server_process_4, T_server_process_5, T_server_process_6, T_server_process_7, T_server_process_8, T_server_process_9, T_server_process_10, T_lb_idle_receive_notification_2, T_lb_idle_receive_notification_3, T_lb_idle_receive_notification_4, T_lb_idle_receive_notification_5, T_lb_idle_receive_notification_8, T_lb_idle_receive_notification_9, T_lb_idle_receive_notification_10, T_lb_no_balance_22, T_lb_balance_to_2_131, T_lb_balance_to_2_132, T_lb_balance_to_2_133, T_lb_balance_to_2_134, T_lb_balance_to_2_135, T_lb_balancing_receive_notification_4, T_lb_balancing_receive_notification_5, T_lb_balancing_receive_notification_10, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :52/102/26/180
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
162 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.67732,53024,1,0,268,153529,337,131,4826,128820,332
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((("(((P_server_notification_2>=1)&&(P_lb_idle_1>=1))&&(P_lb_load_2_3>=1))")U(F(("((((P_server_request_2_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_3>=1))&&(P_lb_load_2_1>=1))")U("(((P_server_notification_1>=1)&&(P_lb_idle_1>=1))&&(P_lb_load_1_2>=1))")))))
Formula 1 simplified : !("(((P_server_notification_2>=1)&&(P_lb_idle_1>=1))&&(P_lb_load_2_3>=1))" U F("((((P_server_request_2_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_3>=1))&&(P_lb_load_2_1>=1))" U "(((P_server_notification_1>=1)&&(P_lb_idle_1>=1))&&(P_lb_load_1_2>=1))"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
399 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.65642,154824,1,0,350,541083,346,174,4830,585621,554
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((F(F("(((P_server_notification_1>=1)&&(P_lb_idle_1>=1))&&(P_lb_load_1_3>=1))"))))
Formula 2 simplified : !F"(((P_server_notification_1>=1)&&(P_lb_idle_1>=1))&&(P_lb_load_1_3>=1))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
306 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,8.71813,212376,1,0,417,765766,355,210,4833,863454,766
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((X((X(F("((((P_server_request_4_2>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_2>=1))&&(P_lb_load_2_4>=1))")))U(F(G("((((P_server_request_5_2>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_2>=1))&&(P_lb_load_2_4>=1))"))))))
Formula 3 simplified : !X(XF"((((P_server_request_4_2>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_2>=1))&&(P_lb_load_2_4>=1))" U FG"((((P_server_request_5_2>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_2>=1))&&(P_lb_load_2_4>=1))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
125 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,9.97033,241044,1,0,447,865192,368,241,4842,996323,1047
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !(((G(F(F("(((P_lb_routing_1_2>=1)&&(P_lb_load_1_4>=1))&&(P_lb_load_2_4>=1))"))))U(G("((((P_server_request_5_2>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_3>=1))&&(P_lb_load_2_5>=1))"))))
Formula 4 simplified : !(GF"(((P_lb_routing_1_2>=1)&&(P_lb_load_1_4>=1))&&(P_lb_load_2_4>=1))" U G"((((P_server_request_5_2>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_3>=1))&&(P_lb_load_2_5>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,9.97997,241636,1,0,447,866041,379,241,4855,997252,1060
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !(("(((P_lb_routing_1_4>=1)&&(P_lb_load_1_4>=1))&&(P_lb_load_2_4>=1))"))
Formula 5 simplified : !"(((P_lb_routing_1_4>=1)&&(P_lb_load_1_4>=1))&&(P_lb_load_2_4>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,9.98071,241900,1,0,447,866041,382,241,4858,997253,1062
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !(((X(X("(((P_lb_routing_1_5>=1)&&(P_lb_load_1_3>=1))&&(P_lb_load_2_2>=1))")))U(X(F(F("(((P_server_notification_2>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_2_4>=1))"))))))
Formula 6 simplified : !(XX"(((P_lb_routing_1_5>=1)&&(P_lb_load_1_3>=1))&&(P_lb_load_2_2>=1))" U XF"(((P_server_notification_2>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_2_4>=1))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
9 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.0875,244008,1,0,447,875192,391,241,4861,1.01451e+06,1153
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !((G(F("((((P_server_request_4_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_5>=1))&&(P_lb_load_2_3>=1))"))))
Formula 7 simplified : !GF"((((P_server_request_4_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_5>=1))&&(P_lb_load_2_3>=1))"
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
9 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.1846,246380,1,0,447,878753,400,241,4868,1.01972e+06,1161
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !((F((G("(((P_lb_routing_1_5>=1)&&(P_lb_load_1_1>=1))&&(P_lb_load_2_1>=1))"))U(("(((P_lb_routing_1_5>=1)&&(P_lb_load_1_3>=1))&&(P_lb_load_2_4>=1))")U("((((P_server_request_5_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_3>=1))&&(P_lb_load_2_1>=1))")))))
Formula 8 simplified : !F(G"(((P_lb_routing_1_5>=1)&&(P_lb_load_1_1>=1))&&(P_lb_load_2_1>=1))" U ("(((P_lb_routing_1_5>=1)&&(P_lb_load_1_3>=1))&&(P_lb_load_2_4>=1))" U "((((P_server_request_5_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_3>=1))&&(P_lb_load_2_1>=1))"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
83 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.0105,263276,1,0,506,941391,409,270,4873,1.10762e+06,1352
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 9 : !((F(G((F("((P_client_waiting_2>=1)&&(P_client_ack_2>=1))"))U(G("((P_client_request_3>=1)&&(P_lb_idle_1>=1))"))))))
Formula 9 simplified : !FG(F"((P_client_waiting_2>=1)&&(P_client_ack_2>=1))" U G"((P_client_request_3>=1)&&(P_lb_idle_1>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
9 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.1077,266604,1,0,511,948690,414,271,4878,1.11908e+06,1372
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 10 : !((F(F(X("(P_server_processed_1>=1)")))))
Formula 10 simplified : !FX"(P_server_processed_1>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
100 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,12.1121,294852,1,0,615,1.06734e+06,423,303,4879,1.30318e+06,1571
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 11 : !(("(((P_server_notification_2>=1)&&(P_lb_idle_1>=1))&&(P_lb_load_2_4>=1))"))
Formula 11 simplified : !"(((P_server_notification_2>=1)&&(P_lb_idle_1>=1))&&(P_lb_load_2_4>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,12.1132,294852,1,0,615,1.06734e+06,426,303,4881,1.30318e+06,1573
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 12 : !((F("((((P_server_request_4_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_3>=1))&&(P_lb_load_2_1>=1))")))
Formula 12 simplified : !F"((((P_server_request_4_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_3>=1))&&(P_lb_load_2_1>=1))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
47 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,12.5825,308316,1,0,674,1.11259e+06,435,332,4883,1.36106e+06,1764
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 13 : !(((X(F(X("(((P_server_notification_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_4>=1))"))))U(G(X(F("((((P_server_request_1_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_4>=1))&&(P_lb_load_2_2>=1))"))))))
Formula 13 simplified : !(XFX"(((P_server_notification_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_4>=1))" U GXF"((((P_server_request_1_1>=1)&&(P_lb_balancing_1>=1))&&(P_lb_load_1_4>=1))&&(P_lb_load_2_2>=1))")
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
12 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,12.7033,312596,1,0,697,1.1262e+06,444,333,4888,1.37446e+06,1830
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 14 : !((X("(((P_lb_routing_1_2>=1)&&(P_lb_load_1_2>=1))&&(P_lb_load_2_3>=1))")))
Formula 14 simplified : !X"(((P_lb_routing_1_2>=1)&&(P_lb_load_1_2>=1))&&(P_lb_load_2_3>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
6 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,12.7599,314180,1,0,697,1.12882e+06,447,333,4890,1.37808e+06,1834
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 15 : !((X("((P_client_request_1>=1)&&(P_lb_idle_1>=1))")))
Formula 15 simplified : !X"((P_client_request_1>=1)&&(P_lb_idle_1>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,12.7683,314444,1,0,699,1.1293e+06,450,333,4892,1.37864e+06,1841
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA SimpleLoadBal-PT-05-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527865582536

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 3:06:05 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 3:06:05 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 3:06:06 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 85 ms
Jun 01, 2018 3:06:06 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 59 places.
Jun 01, 2018 3:06:06 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 180 transitions.
Jun 01, 2018 3:06:06 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 24 ms
Jun 01, 2018 3:06:06 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 118 ms
Jun 01, 2018 3:06:06 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Jun 01, 2018 3:06:06 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 01, 2018 3:06:06 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 180 transitions.
Jun 01, 2018 3:06:07 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 34 ms
Jun 01, 2018 3:06:07 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 59 variables to be positive in 316 ms
Jun 01, 2018 3:06:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 180 transitions.
Jun 01, 2018 3:06:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/180 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:06:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 50 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:06:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 180 transitions.
Jun 01, 2018 3:06:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:06:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 180 transitions.
Jun 01, 2018 3:06:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/180) took 10 ms. Total solver calls (SAT/UNSAT): 1(0/1)
Jun 01, 2018 3:06:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/180) took 3109 ms. Total solver calls (SAT/UNSAT): 2513(2221/292)
Jun 01, 2018 3:06:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/180) took 6124 ms. Total solver calls (SAT/UNSAT): 7308(2267/5041)
Jun 01, 2018 3:06:21 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (assert (and (and (>= (select s0 43) 1) (>= (select s0 49) 1)) (>= (select s0 54) 1))) with error
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 3:06:21 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 14439ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-05"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-05.tgz
mv SimpleLoadBal-PT-05 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SimpleLoadBal-PT-05, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263500582"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;