fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r212-smll-152732263400570
Last Updated
June 26, 2018

About the Execution of ITS-Tools for SharedMemory-PT-000010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.490 18612.00 37095.00 449.20 TTTFFFTFFFFFTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 608K
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 51K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 67K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.6K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 37K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 34K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 24K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 77K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 7 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 167K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SharedMemory-PT-000010, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263400570
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-00
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-01
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-02
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-03
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-04
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-05
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-06
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-07
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-08
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-09
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-10
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-11
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-12
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-13
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-14
FORMULA_NAME SharedMemory-PT-000010-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527861117361

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(F((G("(((((((((((OwnMemAcc_3>=1)&&(Memory_3>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((Memory_1>=1)&&(OwnMemAcc_1>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))||((OwnMemAcc_9>=1)&&(Memory_9>=1)))||((Memory_10>=1)&&(OwnMemAcc_10>=1)))||((OwnMemAcc_7>=1)&&(Memory_7>=1)))||((OwnMemAcc_8>=1)&&(Memory_8>=1)))||((OwnMemAcc_5>=1)&&(Memory_5>=1)))||((OwnMemAcc_6>=1)&&(Memory_6>=1)))"))U("((((((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_6>=1))||(Active_5>=1))||(Active_9>=1))||(Active_10>=1))||(Active_7>=1))||(Active_8>=1))")))))
Formula 0 simplified : !GF(G"(((((((((((OwnMemAcc_3>=1)&&(Memory_3>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((Memory_1>=1)&&(OwnMemAcc_1>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))||((OwnMemAcc_9>=1)&&(Memory_9>=1)))||((Memory_10>=1)&&(OwnMemAcc_10>=1)))||((OwnMemAcc_7>=1)&&(Memory_7>=1)))||((OwnMemAcc_8>=1)&&(Memory_8>=1)))||((OwnMemAcc_5>=1)&&(Memory_5>=1)))||((OwnMemAcc_6>=1)&&(Memory_6>=1)))" U "((((((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_6>=1))||(Active_5>=1))||(Active_9>=1))||(Active_10>=1))||(Active_7>=1))||(Active_8>=1))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 210 rows 131 cols
invariant :Ext_Mem_Acc_3_8 + Ext_Mem_Acc_4_8 + Ext_Mem_Acc_5_8 + Ext_Mem_Acc_6_8 + Ext_Mem_Acc_1_8 + Ext_Mem_Acc_2_8 + Ext_Mem_Acc_7_8 + Ext_Mem_Acc_9_8 + Ext_Mem_Acc_10_8 + Memory_8 = 1
invariant :Ext_Mem_Acc_2_4 + Ext_Mem_Acc_1_4 + Ext_Mem_Acc_6_4 + Ext_Mem_Acc_7_4 + Ext_Mem_Acc_3_4 + Ext_Mem_Acc_5_4 + Ext_Mem_Acc_10_4 + Ext_Mem_Acc_8_4 + Ext_Mem_Acc_9_4 + Memory_4 = 1
invariant :Ext_Mem_Acc_2_1 + Ext_Mem_Acc_3_1 + Ext_Mem_Acc_4_1 + Ext_Mem_Acc_5_1 + Ext_Mem_Acc_6_1 + Ext_Mem_Acc_7_1 + Ext_Mem_Acc_8_1 + Ext_Mem_Acc_9_1 + Ext_Mem_Acc_10_1 + Memory_1 = 1
invariant :Ext_Mem_Acc_3_1 + Ext_Mem_Acc_3_2 + Ext_Mem_Acc_3_4 + Ext_Mem_Acc_3_5 + Ext_Mem_Acc_3_6 + -1'Ext_Mem_Acc_2_7 + -1'Ext_Mem_Acc_1_7 + -1'Ext_Mem_Acc_8_7 + -1'Ext_Mem_Acc_6_7 + -1'Ext_Mem_Acc_5_7 + -1'Ext_Mem_Acc_4_7 + -1'Ext_Mem_Acc_4_8 + -1'Ext_Mem_Acc_5_8 + -1'Ext_Mem_Acc_6_8 + -1'Ext_Mem_Acc_9_7 + -1'Ext_Mem_Acc_10_7 + -1'Ext_Mem_Acc_1_8 + -1'Ext_Mem_Acc_2_8 + Ext_Mem_Acc_3_9 + -1'Ext_Mem_Acc_7_8 + -1'Ext_Mem_Acc_9_8 + -1'Ext_Mem_Acc_10_8 + Ext_Mem_Acc_3_10 + -1'Memory_7 + -1'Memory_8 + Active_3 + Queue_3 + OwnMemAcc_3 = -1
invariant :Ext_Mem_Acc_10_1 + Ext_Mem_Acc_10_2 + Ext_Mem_Acc_10_3 + Ext_Mem_Acc_10_4 + Ext_Mem_Acc_10_5 + Ext_Mem_Acc_10_6 + Ext_Mem_Acc_10_7 + Ext_Mem_Acc_10_8 + Ext_Mem_Acc_10_9 + Active_10 + Queue_10 + OwnMemAcc_10 = 1
invariant :Ext_Mem_Acc_5_1 + Ext_Mem_Acc_5_2 + Ext_Mem_Acc_5_3 + Ext_Mem_Acc_5_4 + Ext_Mem_Acc_5_6 + Ext_Mem_Acc_5_7 + Ext_Mem_Acc_5_8 + Ext_Mem_Acc_5_9 + Ext_Mem_Acc_5_10 + Active_5 + Queue_5 + OwnMemAcc_5 = 1
invariant :Ext_Mem_Acc_4_6 + Ext_Mem_Acc_3_6 + Ext_Mem_Acc_2_6 + Ext_Mem_Acc_1_6 + Ext_Mem_Acc_9_6 + Ext_Mem_Acc_8_6 + Ext_Mem_Acc_7_6 + Ext_Mem_Acc_5_6 + Ext_Mem_Acc_10_6 + Memory_6 = 1
invariant :Ext_Mem_Acc_2_9 + Ext_Mem_Acc_3_9 + Ext_Mem_Acc_4_9 + Ext_Mem_Acc_5_9 + Ext_Mem_Acc_1_9 + Ext_Mem_Acc_7_9 + Ext_Mem_Acc_6_9 + Ext_Mem_Acc_10_9 + Ext_Mem_Acc_8_9 + Memory_9 = 1
invariant :-1'Ext_Mem_Acc_3_1 + -1'Ext_Mem_Acc_4_1 + -1'Ext_Mem_Acc_5_1 + -1'Ext_Mem_Acc_6_1 + -1'Ext_Mem_Acc_7_1 + -1'Ext_Mem_Acc_8_1 + -1'Ext_Mem_Acc_9_1 + -1'Ext_Mem_Acc_10_1 + Ext_Mem_Acc_2_3 + -1'Ext_Mem_Acc_1_4 + -1'Ext_Mem_Acc_6_4 + -1'Ext_Mem_Acc_7_4 + -1'Ext_Mem_Acc_3_4 + -1'Ext_Mem_Acc_5_4 + -1'Ext_Mem_Acc_10_4 + -1'Ext_Mem_Acc_8_4 + -1'Ext_Mem_Acc_9_4 + Ext_Mem_Acc_2_5 + Ext_Mem_Acc_2_6 + Ext_Mem_Acc_2_7 + Ext_Mem_Acc_2_8 + -1'Ext_Mem_Acc_3_9 + -1'Ext_Mem_Acc_4_9 + -1'Ext_Mem_Acc_5_9 + -1'Ext_Mem_Acc_1_9 + -1'Ext_Mem_Acc_1_10 + -1'Ext_Mem_Acc_4_10 + -1'Ext_Mem_Acc_3_10 + -1'Ext_Mem_Acc_7_9 + -1'Ext_Mem_Acc_6_9 + -1'Ext_Mem_Acc_10_9 + -1'Ext_Mem_Acc_8_9 + -1'Ext_Mem_Acc_9_10 + -1'Memory_1 + -1'Ext_Mem_Acc_6_10 + -1'Ext_Mem_Acc_5_10 + -1'Ext_Mem_Acc_8_10 + -1'Ext_Mem_Acc_7_10 + -1'Memory_9 + -1'Memory_10 + -1'Memory_4 + Active_2 + Queue_2 + OwnMemAcc_2 = -3
invariant :Ext_Mem_Acc_1_3 + Ext_Mem_Acc_4_3 + Ext_Mem_Acc_2_3 + Ext_Mem_Acc_6_3 + Ext_Mem_Acc_5_3 + Ext_Mem_Acc_8_3 + Ext_Mem_Acc_7_3 + Ext_Mem_Acc_10_3 + Ext_Mem_Acc_9_3 + Memory_3 = 1
invariant :Ext_Bus + -1'Memory_2 + -1'Memory_1 + -1'Memory_9 + -1'Memory_10 + -1'Memory_7 + -1'Memory_8 + -1'Memory_5 + -1'Memory_6 + -1'Memory_3 + -1'Memory_4 = -9
invariant :-1'Ext_Mem_Acc_3_2 + -1'Ext_Mem_Acc_4_2 + -1'Ext_Mem_Acc_5_2 + -1'Ext_Mem_Acc_7_2 + -1'Ext_Mem_Acc_6_2 + -1'Ext_Mem_Acc_9_2 + -1'Ext_Mem_Acc_8_2 + -1'Ext_Mem_Acc_10_2 + -1'Ext_Mem_Acc_4_3 + -1'Ext_Mem_Acc_2_3 + -1'Ext_Mem_Acc_6_3 + -1'Ext_Mem_Acc_5_3 + -1'Ext_Mem_Acc_8_3 + -1'Ext_Mem_Acc_7_3 + -1'Ext_Mem_Acc_10_3 + -1'Ext_Mem_Acc_9_3 + Ext_Mem_Acc_1_4 + -1'Ext_Mem_Acc_4_5 + -1'Ext_Mem_Acc_6_5 + -1'Ext_Mem_Acc_2_5 + -1'Ext_Mem_Acc_3_5 + -1'Ext_Mem_Acc_9_5 + -1'Ext_Mem_Acc_10_5 + -1'Ext_Mem_Acc_7_5 + -1'Ext_Mem_Acc_8_5 + Ext_Mem_Acc_1_6 + Ext_Mem_Acc_1_7 + Ext_Mem_Acc_1_8 + Ext_Mem_Acc_1_9 + Ext_Mem_Acc_1_10 + -1'Memory_2 + -1'Memory_5 + -1'Memory_3 + Active_1 + Queue_1 + OwnMemAcc_1 = -2
invariant :Ext_Mem_Acc_9_1 + Ext_Mem_Acc_9_2 + Ext_Mem_Acc_9_3 + Ext_Mem_Acc_9_4 + Ext_Mem_Acc_9_5 + Ext_Mem_Acc_9_6 + Ext_Mem_Acc_9_7 + Ext_Mem_Acc_9_8 + Ext_Mem_Acc_9_10 + Active_9 + Queue_9 + OwnMemAcc_9 = 1
invariant :Ext_Mem_Acc_6_1 + Ext_Mem_Acc_6_2 + Ext_Mem_Acc_6_3 + Ext_Mem_Acc_6_4 + Ext_Mem_Acc_6_5 + Ext_Mem_Acc_6_7 + Ext_Mem_Acc_6_8 + Ext_Mem_Acc_6_9 + Ext_Mem_Acc_6_10 + Active_6 + Queue_6 + OwnMemAcc_6 = 1
invariant :Ext_Mem_Acc_2_10 + Ext_Mem_Acc_1_10 + Ext_Mem_Acc_4_10 + Ext_Mem_Acc_3_10 + Ext_Mem_Acc_9_10 + Ext_Mem_Acc_6_10 + Ext_Mem_Acc_5_10 + Ext_Mem_Acc_8_10 + Ext_Mem_Acc_7_10 + Memory_10 = 1
invariant :Ext_Mem_Acc_8_1 + Ext_Mem_Acc_8_2 + Ext_Mem_Acc_8_3 + Ext_Mem_Acc_8_4 + Ext_Mem_Acc_8_5 + Ext_Mem_Acc_8_6 + Ext_Mem_Acc_8_7 + Ext_Mem_Acc_8_9 + Ext_Mem_Acc_8_10 + Active_8 + Queue_8 + OwnMemAcc_8 = 1
invariant :Ext_Mem_Acc_7_1 + Ext_Mem_Acc_7_2 + Ext_Mem_Acc_7_3 + Ext_Mem_Acc_7_4 + Ext_Mem_Acc_7_5 + Ext_Mem_Acc_7_6 + Ext_Mem_Acc_7_8 + Ext_Mem_Acc_7_9 + Ext_Mem_Acc_7_10 + Active_7 + Queue_7 + OwnMemAcc_7 = 1
invariant :Ext_Mem_Acc_4_1 + Ext_Mem_Acc_4_2 + Ext_Mem_Acc_4_3 + Ext_Mem_Acc_4_5 + -1'Ext_Mem_Acc_3_6 + -1'Ext_Mem_Acc_2_6 + -1'Ext_Mem_Acc_1_6 + -1'Ext_Mem_Acc_9_6 + -1'Ext_Mem_Acc_8_6 + -1'Ext_Mem_Acc_7_6 + -1'Ext_Mem_Acc_5_6 + -1'Ext_Mem_Acc_10_6 + Ext_Mem_Acc_4_7 + Ext_Mem_Acc_4_8 + Ext_Mem_Acc_4_9 + Ext_Mem_Acc_4_10 + -1'Memory_6 + Active_4 + Queue_4 + OwnMemAcc_4 = 0
invariant :Ext_Mem_Acc_1_5 + Ext_Mem_Acc_4_5 + Ext_Mem_Acc_6_5 + Ext_Mem_Acc_2_5 + Ext_Mem_Acc_3_5 + Ext_Mem_Acc_9_5 + Ext_Mem_Acc_10_5 + Ext_Mem_Acc_7_5 + Ext_Mem_Acc_8_5 + Memory_5 = 1
invariant :Ext_Mem_Acc_3_7 + Ext_Mem_Acc_2_7 + Ext_Mem_Acc_1_7 + Ext_Mem_Acc_8_7 + Ext_Mem_Acc_6_7 + Ext_Mem_Acc_5_7 + Ext_Mem_Acc_4_7 + Ext_Mem_Acc_9_7 + Ext_Mem_Acc_10_7 + Memory_7 = 1
invariant :Ext_Mem_Acc_1_2 + Ext_Mem_Acc_3_2 + Ext_Mem_Acc_4_2 + Ext_Mem_Acc_5_2 + Ext_Mem_Acc_7_2 + Ext_Mem_Acc_6_2 + Ext_Mem_Acc_9_2 + Ext_Mem_Acc_8_2 + Ext_Mem_Acc_10_2 + Memory_2 = 1
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
2 unique states visited
0 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
364 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.6708,118832,1,0,9,469730,24,1,4114,100797,24
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !(("((((((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_6>=1))||(Active_5>=1))||(Active_9>=1))||(Active_10>=1))||(Active_7>=1))||(Active_8>=1))"))
Formula 1 simplified : !"((((((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_6>=1))||(Active_5>=1))||(Active_9>=1))||(Active_10>=1))||(Active_7>=1))||(Active_8>=1))"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.6723,118832,1,0,9,469730,24,1,4114,100797,26
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((X(F(F(X("((((((((((Active_10>=1)||(Active_9>=1))||(Active_8>=1))||(Active_7>=1))||(Active_6>=1))||(Active_5>=1))||(Active_4>=1))||(Active_3>=1))||(Active_1>=1))||(Active_2>=1))"))))))
Formula 2 simplified : !XFX"((((((((((Active_10>=1)||(Active_9>=1))||(Active_8>=1))||(Active_7>=1))||(Active_6>=1))||(Active_5>=1))||(Active_4>=1))||(Active_3>=1))||(Active_1>=1))||(Active_2>=1))"
3 unique states visited
0 strongly connected components in search stack
2 transitions explored
3 items max in DFS search stack
3 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.70362,119992,1,0,11,474701,24,1,4114,101973,36
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !(((X(("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_5_1>=1)||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))")U("((((((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_6>=1))||(Active_5>=1))||(Active_9>=1))||(Active_10>=1))||(Active_7>=1))||(Active_8>=1))")))U(F(F(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_5_1>=1)||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))"))))))
Formula 3 simplified : !(X("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_5_1>=1)||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))" U "((((((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_6>=1))||(Active_5>=1))||(Active_9>=1))||(Active_10>=1))||(Active_7>=1))||(Active_8>=1))") U F"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_5_1>=1)||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
65 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.34913,133548,1,0,30,559580,33,12,4294,225528,95
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((G(X(G("((((((((((Active_10>=1)||(Active_9>=1))||(Active_8>=1))||(Active_7>=1))||(Active_6>=1))||(Active_5>=1))||(Active_4>=1))||(Active_3>=1))||(Active_1>=1))||(Active_2>=1))")))))
Formula 4 simplified : !GXG"((((((((((Active_10>=1)||(Active_9>=1))||(Active_8>=1))||(Active_7>=1))||(Active_6>=1))||(Active_5>=1))||(Active_4>=1))||(Active_3>=1))||(Active_1>=1))||(Active_2>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
203 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,6.37819,185012,1,0,31,608075,38,13,4302,312352,150
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_5_1>=1)||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))")U(F(G(G("((((((((((Active_10>=1)||(Active_9>=1))||(Active_8>=1))||(Active_7>=1))||(Active_6>=1))||(Active_5>=1))||(Active_4>=1))||(Active_3>=1))||(Active_1>=1))||(Active_2>=1))"))))))
Formula 5 simplified : !("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_5_1>=1)||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))" U FG"((((((((((Active_10>=1)||(Active_9>=1))||(Active_8>=1))||(Active_7>=1))||(Active_6>=1))||(Active_5>=1))||(Active_4>=1))||(Active_3>=1))||(Active_1>=1))||(Active_2>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
363 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.0131,289480,1,0,48,847404,45,31,4302,730392,222
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_5_1>=1)||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))")U(F("((((((((((Active_10>=1)||(Active_9>=1))||(Active_8>=1))||(Active_7>=1))||(Active_6>=1))||(Active_5>=1))||(Active_4>=1))||(Active_3>=1))||(Active_1>=1))||(Active_2>=1))"))))
Formula 6 simplified : !("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_5_1>=1)||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))" U F"((((((((((Active_10>=1)||(Active_9>=1))||(Active_8>=1))||(Active_7>=1))||(Active_6>=1))||(Active_5>=1))||(Active_4>=1))||(Active_3>=1))||(Active_1>=1))||(Active_2>=1))")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.0146,289480,1,0,48,847404,45,31,4302,730392,224
no accepting run found
Formula 6 is TRUE no accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !(("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Memory_2>=1)&&(Ext_Bus>=1))&&(Queue_8>=1))||(((Memory_2>=1)&&(Ext_Bus>=1))&&(Queue_7>=1)))||(((Queue_6>=1)&&(Ext_Bus>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_2>=1)))||(((Queue_4>=1)&&(Ext_Bus>=1))&&(Memory_2>=1)))||(((Queue_3>=1)&&(Ext_Bus>=1))&&(Memory_2>=1)))||(((Queue_1>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Queue_10>=1)&&(Memory_1>=1))&&(Ext_Bus>=1)))||(((Queue_9>=1)&&(Memory_1>=1))&&(Ext_Bus>=1)))||(((Queue_8>=1)&&(Memory_1>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_7>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_6>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_5>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Ext_Bus>=1))&&(Queue_3>=1)))||(((Memory_1>=1)&&(Ext_Bus>=1))&&(Queue_2>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_4>=1)))||(((Queue_6>=1)&&(Ext_Bus>=1))&&(Memory_4>=1)))||(((Memory_4>=1)&&(Ext_Bus>=1))&&(Queue_2>=1)))||(((Memory_4>=1)&&(Ext_Bus>=1))&&(Queue_3>=1)))||(((Memory_3>=1)&&(Ext_Bus>=1))&&(Queue_10>=1)))||(((Memory_4>=1)&&(Ext_Bus>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_8>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_9>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_6>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_7>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_5>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Memory_2>=1)&&(Ext_Bus>=1))&&(Queue_9>=1)))||(((Memory_2>=1)&&(Ext_Bus>=1))&&(Queue_10>=1)))||(((Queue_8>=1)&&(Memory_6>=1))&&(Ext_Bus>=1)))||(((Queue_7>=1)&&(Memory_6>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_6>=1)))||(((Queue_4>=1)&&(Ext_Bus>=1))&&(Memory_6>=1)))||(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_2>=1)))||(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_1>=1)))||(((Queue_10>=1)&&(Memory_6>=1))&&(Ext_Bus>=1)))||(((Queue_9>=1)&&(Memory_6>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_7>=1))&&(Queue_6>=1)))||(((Ext_Bus>=1)&&(Memory_7>=1))&&(Queue_5>=1)))||(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_4>=1)))||(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_3>=1)))||(((Queue_1>=1)&&(Memory_8>=1))&&(Ext_Bus>=1)))||(((Queue_10>=1)&&(Memory_7>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_7>=1))&&(Queue_9>=1)))||(((Ext_Bus>=1)&&(Memory_7>=1))&&(Queue_8>=1)))||(((Queue_9>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_10>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_7>=1)&&(Ext_Bus>=1))&&(Memory_4>=1)))||(((Queue_8>=1)&&(Ext_Bus>=1))&&(Memory_4>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_4>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Queue_2>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Ext_Bus>=1))&&(Queue_8>=1)))||(((Memory_5>=1)&&(Ext_Bus>=1))&&(Queue_9>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_6>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_7>=1)))||(((Queue_2>=1)&&(Ext_Bus>=1))&&(Memory_6>=1)))||(((Queue_3>=1)&&(Ext_Bus>=1))&&(Memory_6>=1)))||(((Memory_5>=1)&&(Ext_Bus>=1))&&(Queue_10>=1)))||(((Memory_6>=1)&&(Ext_Bus>=1))&&(Queue_1>=1)))||(((Queue_1>=1)&&(Memory_10>=1))&&(Ext_Bus>=1)))||(((Queue_10>=1)&&(Memory_9>=1))&&(Ext_Bus>=1)))||(((Queue_3>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_2>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_4>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_7>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_6>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_9>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_8>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_2>=1)&&(Memory_8>=1))&&(Ext_Bus>=1)))||(((Queue_3>=1)&&(Memory_8>=1))&&(Ext_Bus>=1)))||(((Queue_4>=1)&&(Ext_Bus>=1))&&(Memory_8>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_8>=1)))||(((Queue_6>=1)&&(Ext_Bus>=1))&&(Memory_8>=1)))||(((Queue_7>=1)&&(Ext_Bus>=1))&&(Memory_8>=1)))||(((Memory_8>=1)&&(Ext_Bus>=1))&&(Queue_9>=1)))||(((Memory_8>=1)&&(Ext_Bus>=1))&&(Queue_10>=1)))||(((Memory_9>=1)&&(Ext_Bus>=1))&&(Queue_1>=1)))||(((Memory_9>=1)&&(Ext_Bus>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_4>=1)))||(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_5>=1)))||(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_6>=1)))||(((Queue_7>=1)&&(Memory_9>=1))&&(Ext_Bus>=1)))||(((Queue_8>=1)&&(Memory_9>=1))&&(Ext_Bus>=1)))"))
Formula 7 simplified : !"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Memory_2>=1)&&(Ext_Bus>=1))&&(Queue_8>=1))||(((Memory_2>=1)&&(Ext_Bus>=1))&&(Queue_7>=1)))||(((Queue_6>=1)&&(Ext_Bus>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_2>=1)))||(((Queue_4>=1)&&(Ext_Bus>=1))&&(Memory_2>=1)))||(((Queue_3>=1)&&(Ext_Bus>=1))&&(Memory_2>=1)))||(((Queue_1>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Queue_10>=1)&&(Memory_1>=1))&&(Ext_Bus>=1)))||(((Queue_9>=1)&&(Memory_1>=1))&&(Ext_Bus>=1)))||(((Queue_8>=1)&&(Memory_1>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_7>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_6>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_5>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Ext_Bus>=1))&&(Queue_3>=1)))||(((Memory_1>=1)&&(Ext_Bus>=1))&&(Queue_2>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_4>=1)))||(((Queue_6>=1)&&(Ext_Bus>=1))&&(Memory_4>=1)))||(((Memory_4>=1)&&(Ext_Bus>=1))&&(Queue_2>=1)))||(((Memory_4>=1)&&(Ext_Bus>=1))&&(Queue_3>=1)))||(((Memory_3>=1)&&(Ext_Bus>=1))&&(Queue_10>=1)))||(((Memory_4>=1)&&(Ext_Bus>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_8>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_9>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_6>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_7>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_5>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Memory_2>=1)&&(Ext_Bus>=1))&&(Queue_9>=1)))||(((Memory_2>=1)&&(Ext_Bus>=1))&&(Queue_10>=1)))||(((Queue_8>=1)&&(Memory_6>=1))&&(Ext_Bus>=1)))||(((Queue_7>=1)&&(Memory_6>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_6>=1)))||(((Queue_4>=1)&&(Ext_Bus>=1))&&(Memory_6>=1)))||(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_2>=1)))||(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_1>=1)))||(((Queue_10>=1)&&(Memory_6>=1))&&(Ext_Bus>=1)))||(((Queue_9>=1)&&(Memory_6>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_7>=1))&&(Queue_6>=1)))||(((Ext_Bus>=1)&&(Memory_7>=1))&&(Queue_5>=1)))||(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_4>=1)))||(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_3>=1)))||(((Queue_1>=1)&&(Memory_8>=1))&&(Ext_Bus>=1)))||(((Queue_10>=1)&&(Memory_7>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_7>=1))&&(Queue_9>=1)))||(((Ext_Bus>=1)&&(Memory_7>=1))&&(Queue_8>=1)))||(((Queue_9>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_10>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_7>=1)&&(Ext_Bus>=1))&&(Memory_4>=1)))||(((Queue_8>=1)&&(Ext_Bus>=1))&&(Memory_4>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_4>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Queue_2>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Ext_Bus>=1))&&(Queue_8>=1)))||(((Memory_5>=1)&&(Ext_Bus>=1))&&(Queue_9>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_6>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_7>=1)))||(((Queue_2>=1)&&(Ext_Bus>=1))&&(Memory_6>=1)))||(((Queue_3>=1)&&(Ext_Bus>=1))&&(Memory_6>=1)))||(((Memory_5>=1)&&(Ext_Bus>=1))&&(Queue_10>=1)))||(((Memory_6>=1)&&(Ext_Bus>=1))&&(Queue_1>=1)))||(((Queue_1>=1)&&(Memory_10>=1))&&(Ext_Bus>=1)))||(((Queue_10>=1)&&(Memory_9>=1))&&(Ext_Bus>=1)))||(((Queue_3>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_2>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_4>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_7>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_6>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_9>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_8>=1)&&(Ext_Bus>=1))&&(Memory_10>=1)))||(((Queue_2>=1)&&(Memory_8>=1))&&(Ext_Bus>=1)))||(((Queue_3>=1)&&(Memory_8>=1))&&(Ext_Bus>=1)))||(((Queue_4>=1)&&(Ext_Bus>=1))&&(Memory_8>=1)))||(((Queue_5>=1)&&(Ext_Bus>=1))&&(Memory_8>=1)))||(((Queue_6>=1)&&(Ext_Bus>=1))&&(Memory_8>=1)))||(((Queue_7>=1)&&(Ext_Bus>=1))&&(Memory_8>=1)))||(((Memory_8>=1)&&(Ext_Bus>=1))&&(Queue_9>=1)))||(((Memory_8>=1)&&(Ext_Bus>=1))&&(Queue_10>=1)))||(((Memory_9>=1)&&(Ext_Bus>=1))&&(Queue_1>=1)))||(((Memory_9>=1)&&(Ext_Bus>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_4>=1)))||(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_5>=1)))||(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_6>=1)))||(((Queue_7>=1)&&(Memory_9>=1))&&(Ext_Bus>=1)))||(((Queue_8>=1)&&(Memory_9>=1))&&(Ext_Bus>=1)))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.0505,290144,1,0,48,847422,48,31,4552,730420,228
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !((F(F(("(((Queue_3>=1)&&(Memory_8>=1))&&(Ext_Bus>=1))")U("(Ext_Mem_Acc_5_4>=1)")))))
Formula 8 simplified : !F("(((Queue_3>=1)&&(Memory_8>=1))&&(Ext_Bus>=1))" U "(Ext_Mem_Acc_5_4>=1)")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
19 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.2377,295644,1,0,58,851945,57,31,4552,736057,287
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 9 : !((G("(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_4>=1))")))
Formula 9 simplified : !G"(((Ext_Bus>=1)&&(Memory_9>=1))&&(Queue_4>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.2389,296160,1,0,58,851945,63,31,4553,736057,292
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 10 : !((G((F("(Ext_Mem_Acc_2_1>=1)"))U(X("((OwnMemAcc_8>=1)&&(Memory_8>=1))")))))
Formula 10 simplified : !G(F"(Ext_Mem_Acc_2_1>=1)" U X"((OwnMemAcc_8>=1)&&(Memory_8>=1))")
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
10 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.3411,299400,1,0,61,856782,77,32,4558,743059,309
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 11 : !(((X("(Ext_Mem_Acc_1_2>=1)"))U("(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_4>=1))")))
Formula 11 simplified : !(X"(Ext_Mem_Acc_1_2>=1)" U "(((Memory_7>=1)&&(Ext_Bus>=1))&&(Queue_4>=1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.3621,299916,1,0,61,857677,86,32,4560,743892,317
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 12 : !(("(Active_7>=1)"))
Formula 12 simplified : !"(Active_7>=1)"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.3627,300180,1,0,61,857677,89,32,4560,743892,319
no accepting run found
Formula 12 is TRUE no accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 13 : !((X("(Active_8>=1)")))
Formula 13 simplified : !X"(Active_8>=1)"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.3669,300180,1,0,63,857865,92,32,4560,743950,326
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 14 : !((X(F("(Active_1>=1)"))))
Formula 14 simplified : !XF"(Active_1>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
268 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,13.0327,337932,1,0,86,994153,101,43,4560,921187,388
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 15 : !(("(Ext_Mem_Acc_7_3>=1)"))
Formula 15 simplified : !"(Ext_Mem_Acc_7_3>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,13.0334,337932,1,0,86,994153,104,43,4560,921187,390
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA SharedMemory-PT-000010-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527861135973

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 1:51:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 1:51:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 1:51:59 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 98 ms
Jun 01, 2018 1:51:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 131 places.
Jun 01, 2018 1:51:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 210 transitions.
Jun 01, 2018 1:52:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 25 ms
Jun 01, 2018 1:52:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 77 ms
Jun 01, 2018 1:52:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Jun 01, 2018 1:52:00 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 6 ms
Jun 01, 2018 1:52:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 210 transitions.
Jun 01, 2018 1:52:01 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 21 place invariants in 59 ms
Jun 01, 2018 1:52:01 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 131 variables to be positive in 526 ms
Jun 01, 2018 1:52:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 210 transitions.
Jun 01, 2018 1:52:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/210 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 1:52:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 1:52:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 210 transitions.
Jun 01, 2018 1:52:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 1:52:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 210 transitions.
Jun 01, 2018 1:52:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/210) took 104 ms. Total solver calls (SAT/UNSAT): 98(61/37)
Jun 01, 2018 1:52:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/210) took 3199 ms. Total solver calls (SAT/UNSAT): 1945(1326/619)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 1:52:14 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 14325ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000010"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000010.tgz
mv SharedMemory-PT-000010 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SharedMemory-PT-000010, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263400570"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;