fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r212-smll-152732263200400
Last Updated
June 26, 2018

About the Execution of ITS-Tools for PolyORBLF-PT-S02J06T10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15750.920 522964.00 1050974.00 1759.00 FFFFFTFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 2.1M
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 52K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 69K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 7.6K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 37K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 56K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 10 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 1.7M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PolyORBLF-PT-S02J06T10, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263200400
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-00
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-01
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-02
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-03
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-04
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-05
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-06
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-07
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-08
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-09
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-10
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-11
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-12
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-13
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-14
FORMULA_NAME PolyORBLF-PT-S02J06T10-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527781615374

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X(G(X(F(X("(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((ProcessingEvt_6>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ModifiedSrc_2>=1))||((((ModifiedSrc_2>=2)&&(ProcessingEvt_7>=1))&&(cSources>=7))&&(ModifiedSrc_1>=1)))||((((ModifiedSrc_1>=2)&&(ModifiedSrc_2>=1))&&(ProcessingEvt_6>=1))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=2)))||((((cSources>=7)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_4>=1)))||((((ModifiedSrc_1>=1)&&(ModifiedSrc_2>=2))&&(ProcessingEvt_4>=1))&&(cSources>=7)))||(((ModifiedSrc_1>=3)&&(ProcessingEvt_9>=1))&&(cSources>=7)))||((((ModifiedSrc_1>=2)&&(ProcessingEvt_7>=1))&&(cSources>=7))&&(ModifiedSrc_2>=1)))||((((ModifiedSrc_2>=2)&&(ProcessingEvt_5>=1))&&(cSources>=7))&&(ModifiedSrc_1>=1)))||(((ProcessingEvt_5>=1)&&(ModifiedSrc_1>=3))&&(cSources>=7)))||(((cSources>=7)&&(ModifiedSrc_2>=3))&&(ProcessingEvt_5>=1)))||(((cSources>=7)&&(ProcessingEvt_10>=1))&&(ModifiedSrc_1>=3)))||((((ModifiedSrc_1>=2)&&(cSources>=7))&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=1)))||((((ModifiedSrc_2>=1)&&(cSources>=7))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_4>=1)))||((((ModifiedSrc_2>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ProcessingEvt_9>=1)))||(((ModifiedSrc_2>=3)&&(cSources>=7))&&(ProcessingEvt_4>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ProcessingEvt_2>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_1>=1)&&(cSources>=7))&&(ProcessingEvt_10>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_8>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_2>=2)&&(ModifiedSrc_1>=1))&&(ProcessingEvt_9>=1))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_8>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1))&&(ProcessingEvt_6>=1)))||((((ModifiedSrc_1>=1)&&(ModifiedSrc_2>=2))&&(cSources>=7))&&(ProcessingEvt_3>=1)))||((((ProcessingEvt_5>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ModifiedSrc_2>=1)))||((((cSources>=7)&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1))&&(ProcessingEvt_2>=1)))||((((ProcessingEvt_1>=1)&&(cSources>=7))&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1)))||((((cSources>=7)&&(ProcessingEvt_9>=1))&&(ModifiedSrc_1>=1))&&(ModifiedSrc_2>=2)))||(((cSources>=7)&&(ModifiedSrc_1>=3))&&(ProcessingEvt_4>=1)))||((((ModifiedSrc_1>=1)&&(ModifiedSrc_2>=2))&&(ProcessingEvt_3>=1))&&(cSources>=7)))||(((cSources>=7)&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=3)))||((((ModifiedSrc_1>=1)&&(ModifiedSrc_2>=2))&&(cSources>=7))&&(ProcessingEvt_1>=1)))||((((ProcessingEvt_3>=1)&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1))&&(cSources>=7)))||((((ModifiedSrc_1>=1)&&(cSources>=7))&&(ModifiedSrc_2>=2))&&(ProcessingEvt_6>=1)))||(((ProcessingEvt_10>=1)&&(ModifiedSrc_2>=3))&&(cSources>=7)))||((((ModifiedSrc_1>=2)&&(ModifiedSrc_2>=1))&&(ProcessingEvt_10>=1))&&(cSources>=7)))||(((ModifiedSrc_1>=3)&&(ProcessingEvt_3>=1))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_2>=1)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_8>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_10>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||((((ProcessingEvt_9>=1)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(cSources>=7)))||(((ProcessingEvt_8>=1)&&(cSources>=7))&&(ModifiedSrc_2>=3)))||(((cSources>=7)&&(ModifiedSrc_2>=3))&&(ProcessingEvt_1>=1)))||(((ProcessingEvt_2>=1)&&(ModifiedSrc_1>=3))&&(cSources>=7)))||((((ProcessingEvt_1>=1)&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1))&&(cSources>=7)))||((((cSources>=7)&&(ProcessingEvt_3>=1))&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2)))||((((ProcessingEvt_2>=1)&&(cSources>=7))&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1)))||((((ModifiedSrc_2>=1)&&(ProcessingEvt_10>=1))&&(cSources>=7))&&(ModifiedSrc_1>=2)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_1>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_2>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ProcessingEvt_3>=1)))||((((ProcessingEvt_1>=1)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1))&&(ProcessingEvt_8>=1)))||((((cSources>=7)&&(ProcessingEvt_4>=1))&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1)))||((((ProcessingEvt_10>=1)&&(cSources>=7))&&(ModifiedSrc_1>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_2>=1)&&(ProcessingEvt_9>=1))&&(ModifiedSrc_1>=2))&&(cSources>=7)))||((((ModifiedSrc_1>=1)&&(cSources>=7))&&(ProcessingEvt_6>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_2>=2)&&(ModifiedSrc_1>=1))&&(cSources>=7))&&(ProcessingEvt_5>=1)))||((((ProcessingEvt_3>=1)&&(cSources>=7))&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2)))||(((cSources>=7)&&(ProcessingEvt_6>=1))&&(ModifiedSrc_1>=3)))||((((cSources>=7)&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1))&&(ProcessingEvt_10>=1)))||(((ProcessingEvt_1>=1)&&(ModifiedSrc_1>=3))&&(cSources>=7)))||(((ModifiedSrc_2>=3)&&(cSources>=7))&&(ProcessingEvt_9>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1))&&(ProcessingEvt_8>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ModifiedSrc_2>=2))&&(ProcessingEvt_2>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ModifiedSrc_2>=2))&&(ProcessingEvt_5>=1)))||((((ModifiedSrc_2>=1)&&(cSources>=7))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_8>=1)))||((((ModifiedSrc_1>=2)&&(ModifiedSrc_2>=1))&&(ProcessingEvt_2>=1))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_5>=1)))||(((cSources>=7)&&(ModifiedSrc_2>=3))&&(ProcessingEvt_3>=1)))||((((ProcessingEvt_4>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ModifiedSrc_2>=1)))||((((ModifiedSrc_2>=1)&&(ModifiedSrc_1>=2))&&(ProcessingEvt_1>=1))&&(cSources>=7)))||(((ModifiedSrc_1>=3)&&(cSources>=7))&&(ProcessingEvt_7>=1)))||(((cSources>=7)&&(ModifiedSrc_2>=3))&&(ProcessingEvt_6>=1)))||((((ProcessingEvt_9>=1)&&(ModifiedSrc_1>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||(((cSources>=7)&&(ProcessingEvt_2>=1))&&(ModifiedSrc_2>=3)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ProcessingEvt_6>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_4>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||(((ModifiedSrc_1>=3)&&(cSources>=7))&&(ProcessingEvt_8>=1)))||((((cSources>=7)&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1)))||((((cSources>=7)&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2)))||((((ModifiedSrc_1>=2)&&(ProcessingEvt_5>=1))&&(cSources>=7))&&(ModifiedSrc_2>=1)))")))))))
Formula 0 simplified : !XGXFX"(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((ProcessingEvt_6>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ModifiedSrc_2>=1))||((((ModifiedSrc_2>=2)&&(ProcessingEvt_7>=1))&&(cSources>=7))&&(ModifiedSrc_1>=1)))||((((ModifiedSrc_1>=2)&&(ModifiedSrc_2>=1))&&(ProcessingEvt_6>=1))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=2)))||((((cSources>=7)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_4>=1)))||((((ModifiedSrc_1>=1)&&(ModifiedSrc_2>=2))&&(ProcessingEvt_4>=1))&&(cSources>=7)))||(((ModifiedSrc_1>=3)&&(ProcessingEvt_9>=1))&&(cSources>=7)))||((((ModifiedSrc_1>=2)&&(ProcessingEvt_7>=1))&&(cSources>=7))&&(ModifiedSrc_2>=1)))||((((ModifiedSrc_2>=2)&&(ProcessingEvt_5>=1))&&(cSources>=7))&&(ModifiedSrc_1>=1)))||(((ProcessingEvt_5>=1)&&(ModifiedSrc_1>=3))&&(cSources>=7)))||(((cSources>=7)&&(ModifiedSrc_2>=3))&&(ProcessingEvt_5>=1)))||(((cSources>=7)&&(ProcessingEvt_10>=1))&&(ModifiedSrc_1>=3)))||((((ModifiedSrc_1>=2)&&(cSources>=7))&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=1)))||((((ModifiedSrc_2>=1)&&(cSources>=7))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_4>=1)))||((((ModifiedSrc_2>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ProcessingEvt_9>=1)))||(((ModifiedSrc_2>=3)&&(cSources>=7))&&(ProcessingEvt_4>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ProcessingEvt_2>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_1>=1)&&(cSources>=7))&&(ProcessingEvt_10>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_8>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_2>=2)&&(ModifiedSrc_1>=1))&&(ProcessingEvt_9>=1))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_8>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1))&&(ProcessingEvt_6>=1)))||((((ModifiedSrc_1>=1)&&(ModifiedSrc_2>=2))&&(cSources>=7))&&(ProcessingEvt_3>=1)))||((((ProcessingEvt_5>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ModifiedSrc_2>=1)))||((((cSources>=7)&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1))&&(ProcessingEvt_2>=1)))||((((ProcessingEvt_1>=1)&&(cSources>=7))&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1)))||((((cSources>=7)&&(ProcessingEvt_9>=1))&&(ModifiedSrc_1>=1))&&(ModifiedSrc_2>=2)))||(((cSources>=7)&&(ModifiedSrc_1>=3))&&(ProcessingEvt_4>=1)))||((((ModifiedSrc_1>=1)&&(ModifiedSrc_2>=2))&&(ProcessingEvt_3>=1))&&(cSources>=7)))||(((cSources>=7)&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=3)))||((((ModifiedSrc_1>=1)&&(ModifiedSrc_2>=2))&&(cSources>=7))&&(ProcessingEvt_1>=1)))||((((ProcessingEvt_3>=1)&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1))&&(cSources>=7)))||((((ModifiedSrc_1>=1)&&(cSources>=7))&&(ModifiedSrc_2>=2))&&(ProcessingEvt_6>=1)))||(((ProcessingEvt_10>=1)&&(ModifiedSrc_2>=3))&&(cSources>=7)))||((((ModifiedSrc_1>=2)&&(ModifiedSrc_2>=1))&&(ProcessingEvt_10>=1))&&(cSources>=7)))||(((ModifiedSrc_1>=3)&&(ProcessingEvt_3>=1))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_2>=1)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_8>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_10>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||((((ProcessingEvt_9>=1)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(cSources>=7)))||(((ProcessingEvt_8>=1)&&(cSources>=7))&&(ModifiedSrc_2>=3)))||(((cSources>=7)&&(ModifiedSrc_2>=3))&&(ProcessingEvt_1>=1)))||(((ProcessingEvt_2>=1)&&(ModifiedSrc_1>=3))&&(cSources>=7)))||((((ProcessingEvt_1>=1)&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1))&&(cSources>=7)))||((((cSources>=7)&&(ProcessingEvt_3>=1))&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2)))||((((ProcessingEvt_2>=1)&&(cSources>=7))&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1)))||((((ModifiedSrc_2>=1)&&(ProcessingEvt_10>=1))&&(cSources>=7))&&(ModifiedSrc_1>=2)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_1>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_2>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ProcessingEvt_3>=1)))||((((ProcessingEvt_1>=1)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1))&&(ProcessingEvt_8>=1)))||((((cSources>=7)&&(ProcessingEvt_4>=1))&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1)))||((((ProcessingEvt_10>=1)&&(cSources>=7))&&(ModifiedSrc_1>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_2>=1)&&(ProcessingEvt_9>=1))&&(ModifiedSrc_1>=2))&&(cSources>=7)))||((((ModifiedSrc_1>=1)&&(cSources>=7))&&(ProcessingEvt_6>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_2>=2)&&(ModifiedSrc_1>=1))&&(cSources>=7))&&(ProcessingEvt_5>=1)))||((((ProcessingEvt_3>=1)&&(cSources>=7))&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2)))||(((cSources>=7)&&(ProcessingEvt_6>=1))&&(ModifiedSrc_1>=3)))||((((cSources>=7)&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1))&&(ProcessingEvt_10>=1)))||(((ProcessingEvt_1>=1)&&(ModifiedSrc_1>=3))&&(cSources>=7)))||(((ModifiedSrc_2>=3)&&(cSources>=7))&&(ProcessingEvt_9>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=2))&&(ModifiedSrc_2>=1))&&(ProcessingEvt_8>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ModifiedSrc_2>=2))&&(ProcessingEvt_2>=1)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ModifiedSrc_2>=2))&&(ProcessingEvt_5>=1)))||((((ModifiedSrc_2>=1)&&(cSources>=7))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_8>=1)))||((((ModifiedSrc_1>=2)&&(ModifiedSrc_2>=1))&&(ProcessingEvt_2>=1))&&(cSources>=7)))||((((cSources>=7)&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2))&&(ProcessingEvt_5>=1)))||(((cSources>=7)&&(ModifiedSrc_2>=3))&&(ProcessingEvt_3>=1)))||((((ProcessingEvt_4>=1)&&(ModifiedSrc_1>=2))&&(cSources>=7))&&(ModifiedSrc_2>=1)))||((((ModifiedSrc_2>=1)&&(ModifiedSrc_1>=2))&&(ProcessingEvt_1>=1))&&(cSources>=7)))||(((ModifiedSrc_1>=3)&&(cSources>=7))&&(ProcessingEvt_7>=1)))||(((cSources>=7)&&(ModifiedSrc_2>=3))&&(ProcessingEvt_6>=1)))||((((ProcessingEvt_9>=1)&&(ModifiedSrc_1>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||(((cSources>=7)&&(ProcessingEvt_2>=1))&&(ModifiedSrc_2>=3)))||((((cSources>=7)&&(ModifiedSrc_1>=1))&&(ProcessingEvt_6>=1))&&(ModifiedSrc_2>=2)))||((((ModifiedSrc_1>=1)&&(ProcessingEvt_4>=1))&&(cSources>=7))&&(ModifiedSrc_2>=2)))||(((ModifiedSrc_1>=3)&&(cSources>=7))&&(ProcessingEvt_8>=1)))||((((cSources>=7)&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=2))&&(ModifiedSrc_1>=1)))||((((cSources>=7)&&(ProcessingEvt_7>=1))&&(ModifiedSrc_2>=1))&&(ModifiedSrc_1>=2)))||((((ModifiedSrc_1>=2)&&(ProcessingEvt_5>=1))&&(cSources>=7))&&(ModifiedSrc_2>=1)))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 27848 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 64 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](X(<>(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 841 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 48516 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50628 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP3==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47537 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP3==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 326 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(X(<>(<>((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 96475 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47297 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(<>(<>(X((LTLAP6==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 419 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP7==true))U((LTLAP8==true)))U(X(<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 921 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(((LTLAP10==true))U((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 343 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([]([](<>((LTLAP12==true)))))U((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50132 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47880 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP15==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47757 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47549 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](<>(((LTLAP17==true))U((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 319 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((X((LTLAP19==true)))U(X((LTLAP20==true))))U(<>(<>((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 462 ms.
FORMULA PolyORBLF-PT-S02J06T10-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527782138338

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 3:46:58 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 31, 2018 3:46:58 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 3:46:58 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 304 ms
May 31, 2018 3:46:58 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 844 places.
May 31, 2018 3:46:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1812 transitions.
May 31, 2018 3:46:59 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 621 ms
May 31, 2018 3:47:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 68 ms
May 31, 2018 3:47:00 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
May 31, 2018 3:47:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1812 transitions.
May 31, 2018 3:47:00 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (1812) to apply POR reductions. Disabling POR matrices.
May 31, 2018 3:47:01 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 970ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-PT-S02J06T10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-PT-S02J06T10.tgz
mv PolyORBLF-PT-S02J06T10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PolyORBLF-PT-S02J06T10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263200400"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;