Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 244K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.1K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 73K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is CircularTrains-PT-096, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732262600008
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircularTrains-PT-096-LTLFireability-00
FORMULA_NAME CircularTrains-PT-096-LTLFireability-01
FORMULA_NAME CircularTrains-PT-096-LTLFireability-02
FORMULA_NAME CircularTrains-PT-096-LTLFireability-03
FORMULA_NAME CircularTrains-PT-096-LTLFireability-04
FORMULA_NAME CircularTrains-PT-096-LTLFireability-05
FORMULA_NAME CircularTrains-PT-096-LTLFireability-06
FORMULA_NAME CircularTrains-PT-096-LTLFireability-07
FORMULA_NAME CircularTrains-PT-096-LTLFireability-08
FORMULA_NAME CircularTrains-PT-096-LTLFireability-09
FORMULA_NAME CircularTrains-PT-096-LTLFireability-10
FORMULA_NAME CircularTrains-PT-096-LTLFireability-11
FORMULA_NAME CircularTrains-PT-096-LTLFireability-12
FORMULA_NAME CircularTrains-PT-096-LTLFireability-13
FORMULA_NAME CircularTrains-PT-096-LTLFireability-14
FORMULA_NAME CircularTrains-PT-096-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527759153972

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(X(F(X(X("((Section_27>=1)&&(F28>=1))")))))))
Formula 0 simplified : !FXFXX"((Section_27>=1)&&(F28>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 96 rows 192 cols
invariant :Section_51 + -1'Section_49 + -1'F49 + F50 = 1
invariant :Section_18 + Section_17 + F17 = 2
invariant :F2 + -1'F1 + Section_3 + -1'Section_1 = 1
invariant :Section_54 + Section_53 + F53 = 2
invariant :Section_67 + F66 + -1'F65 + -1'Section_65 = -1
invariant :F59 + Section_60 + Section_59 = 2
invariant :Section_85 + F84 + Section_84 = 1
invariant :Section_81 + F80 + Section_80 = 2
invariant :F58 + Section_58 + Section_59 = 1
invariant :Section_28 + -1'Section_26 + F27 + -1'F26 = -1
invariant :Section_94 + F93 + -1'Section_92 + -1'F92 = -1
invariant :Section_89 + F88 + Section_88 = 1
invariant :F74 + -1'Section_76 + -1'F75 + Section_74 = 1
invariant :F46 + Section_47 + Section_46 = 1
invariant :F42 + -1'F43 + F40 + Section_40 + -1'Section_44 + -1'F41 = -1
invariant :F16 + -1'Section_15 + Section_17 + -1'F15 = 0
invariant :F37 + F39 + Section_40 + -1'F36 + Section_35 + -1'F38 + F35 = 1
invariant :Section_73 + Section_72 + F72 = 1
invariant :Section_82 + F81 + -1'F80 + -1'Section_80 = -1
invariant :F62 + Section_63 + Section_62 = 2
invariant :Section_14 + F13 + Section_13 = 1
invariant :Section_21 + Section_20 + F20 = 2
invariant :F33 + -1'F34 + Section_33 + -1'Section_35 = 0
invariant :Section_71 + Section_72 + F71 = 2
invariant :F23 + Section_24 + -1'F22 + -1'Section_22 = 1
invariant :F44 + Section_45 + Section_44 = 2
invariant :F89 + Section_90 + -1'F88 + -1'Section_88 = 1
invariant :F85 + -1'F84 + -1'Section_84 + Section_86 = 0
invariant :Section_37 + F36 + -1'Section_35 + -1'F35 = -1
invariant :F82 + -1'F81 + F80 + Section_83 + Section_80 = 2
invariant :Section_25 + Section_24 + F24 = 1
invariant :F14 + Section_15 + -1'F13 + -1'Section_13 = 1
invariant :F87 + Section_87 + Section_88 = 1
invariant :Section_69 + F68 + Section_68 = 2
invariant :F60 + Section_60 + Section_61 = 1
invariant :Section_4 + Section_5 + F4 = 1
invariant :F83 + Section_84 + Section_83 = 2
invariant :Section_95 + Section_60 + -1'F96 + -1'F43 + -1'F34 + Section_33 + Section_87 + -1'F91 + Section_90 + Section_79 + -1'F29 + -1'F1 + Section_45 + -1'F15 + -1'F68 + -1'F77 + -1'F54 + Section_3 + Section_26 + Section_10 + -1'F84 + -1'F47 + -1'F63 + -1'F8 + -1'F31 + -1'F75 + Section_49 + -1'F24 + -1'Section_72 + -1'F72 + -1'F27 + -1'F88 + -1'Section_5 + Section_70 + -1'F13 + Section_19 + -1'F66 + Section_40 + -1'F36 + Section_61 + -1'F93 + Section_74 + Section_58 + -1'F22 + -1'F81 + Section_7 + Section_83 + Section_53 + -1'F5 + Section_59 + -1'F11 + -1'F71 + -1'F4 + -1'Section_1 + -1'F41 + -1'F56 + Section_86 + Section_52 + Section_62 + -1'F20 + -1'F17 + Section_65 + -1'F38 + -1'F50 + Section_46 + Section_80 = -18
invariant :F32 + Section_33 + -1'F31 + -1'Section_31 = 1
invariant :F90 + -1'F91 + Section_90 + -1'Section_92 = 0
invariant :Section_91 + F91 + Section_92 = 1
invariant :F51 + Section_49 + F49 + Section_52 + -1'F50 = 0
invariant :F6 + -1'Section_5 + Section_7 + -1'F5 = -1
invariant :F28 + Section_26 + -1'F27 + F26 + Section_29 = 2
invariant :F94 + -1'Section_60 + F96 + F43 + F34 + -1'Section_33 + -1'Section_87 + F91 + -1'Section_90 + -1'Section_79 + F29 + F1 + -1'Section_45 + F15 + F68 + F77 + F54 + -1'Section_3 + -1'Section_26 + -1'Section_10 + F84 + F47 + F63 + F8 + F31 + F75 + -1'Section_49 + F24 + Section_72 + F72 + F27 + F88 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F66 + -1'Section_40 + F36 + -1'Section_61 + -1'Section_74 + -1'Section_58 + F22 + F81 + -1'Section_7 + -1'Section_83 + -1'Section_53 + F5 + -1'Section_59 + F11 + F71 + F4 + Section_92 + Section_1 + F41 + F56 + -1'Section_86 + -1'Section_52 + -1'Section_62 + F20 + F17 + -1'Section_65 + F92 + F38 + F50 + -1'Section_46 + -1'Section_80 = 20
invariant :Section_75 + Section_76 + F75 = 1
invariant :F19 + Section_19 + Section_20 = 1
invariant :F45 + Section_45 + Section_46 = 1
invariant :F25 + -1'Section_24 + Section_26 + -1'F24 = 0
invariant :Section_41 + F40 + Section_40 = 1
invariant :F73 + -1'Section_72 + -1'F72 + Section_74 = 0
invariant :F21 + -1'Section_20 + Section_22 + -1'F20 = -1
invariant :Section_55 + F54 + -1'Section_53 + -1'F53 = -1
invariant :F48 + -1'F47 + Section_49 + -1'Section_47 = -1
invariant :Section_36 + Section_35 + F35 = 2
invariant :Section_66 + F65 + Section_65 = 2
invariant :Section_2 + F1 + Section_1 = 1
invariant :Section_96 + F96 + Section_1 = 1
invariant :F18 + -1'Section_17 + Section_19 + -1'F17 = -1
invariant :F79 + Section_79 + Section_80 = 1
invariant :F76 + Section_76 + Section_77 = 1
invariant :Section_16 + Section_15 + F15 = 1
invariant :F30 + -1'F29 + Section_31 + -1'Section_29 = -1
invariant :Section_27 + Section_26 + F26 = 2
invariant :F70 + -1'Section_72 + Section_70 + -1'F71 = -1
invariant :F78 + Section_79 + -1'F77 + -1'Section_77 = -1
invariant :F7 + Section_8 + Section_7 = 1
invariant :F9 + Section_10 + -1'F8 + -1'Section_8 = -1
invariant :F57 + -1'Section_56 + Section_58 + -1'F56 = -1
invariant :Section_43 + F43 + Section_44 = 1
invariant :F67 + -1'F66 + F65 + Section_68 + Section_65 = 2
invariant :F86 + Section_87 + Section_86 = 2
invariant :Section_12 + -1'Section_10 + -1'F10 + F11 = 1
invariant :F95 + -1'Section_60 + F43 + F34 + -1'Section_33 + -1'Section_87 + F91 + -1'Section_90 + -1'Section_79 + F29 + F1 + -1'Section_45 + F15 + F68 + F77 + F54 + -1'Section_3 + -1'Section_26 + -1'Section_10 + F84 + F47 + F63 + F8 + F31 + F75 + -1'Section_49 + F24 + Section_72 + F72 + F27 + F88 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F66 + -1'Section_40 + F36 + -1'Section_61 + F93 + -1'Section_74 + -1'Section_58 + F22 + F81 + -1'Section_7 + -1'Section_83 + -1'Section_53 + F5 + -1'Section_59 + F11 + F71 + F4 + F41 + F56 + -1'Section_86 + -1'Section_52 + -1'Section_62 + F20 + F17 + -1'Section_65 + F38 + F50 + -1'Section_46 + -1'Section_80 = 19
invariant :Section_34 + F34 + Section_35 = 1
invariant :Section_93 + Section_92 + F92 = 2
invariant :F52 + Section_53 + Section_52 = 1
invariant :Section_48 + F47 + Section_47 = 2
invariant :Section_32 + F31 + Section_31 = 1
invariant :Section_6 + Section_5 + F5 = 2
invariant :Section_57 + Section_56 + F56 = 2
invariant :Section_78 + F77 + Section_77 = 2
invariant :Section_38 + -1'F39 + -1'Section_40 + F38 = 1
invariant :F64 + -1'Section_63 + -1'F63 + Section_65 = 0
invariant :Section_42 + -1'F40 + -1'Section_40 + F41 = 1
invariant :F3 + Section_3 + -1'Section_5 + -1'F4 = 0
invariant :F12 + Section_10 + F10 + -1'F11 + Section_13 = 0
invariant :Section_11 + Section_10 + F10 = 1
invariant :Section_9 + F8 + Section_8 = 2
invariant :Section_64 + Section_63 + F63 = 1
invariant :Section_50 + Section_49 + F49 = 1
invariant :Section_23 + F22 + Section_22 = 1
invariant :Section_30 + F29 + Section_29 = 2
invariant :Section_39 + F39 + Section_40 = 1
invariant :F55 + Section_56 + -1'F54 + Section_53 + F53 = 2
invariant :F61 + Section_61 + Section_62 = 1
invariant :F69 + -1'F68 + Section_70 + -1'Section_68 = -1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Compilation finished in 2669 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 42 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>(X(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>(X(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>((<>((LTLAP1==true)))U(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 30 ms.
FORMULA CircularTrains-PT-096-LTLFireability-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>(<>((LTLAP3==true))))U(((LTLAP4==true))U((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>(<>((LTLAP3==true))))U(((LTLAP4==true))U((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
4 unique states visited
0 strongly connected components in search stack
3 transitions explored
4 items max in DFS search stack
138733 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1387.38,4452160,1,0,1273,2.66884e+07,14,304,2628,3.27044e+07,3158
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA CircularTrains-PT-096-LTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((F(F((F("((F47>=1)&&(Section_46>=1))"))U(F("((Section_66>=1)&&(F67>=1))"))))))
Formula 1 simplified : !F(F"((F47>=1)&&(Section_46>=1))" U F"((Section_66>=1)&&(F67>=1))")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
49 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1387.87,4452160,1,0,1273,2.66884e+07,24,304,3142,3.27044e+07,3163
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA CircularTrains-PT-096-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((G((F(F("((F8>=1)&&(Section_7>=1))")))U(("((F6>=1)&&(Section_5>=1))")U("((F20>=1)&&(Section_19>=1))")))))
Formula 2 simplified : !G(F"((F8>=1)&&(Section_7>=1))" U ("((F6>=1)&&(Section_5>=1))" U "((F20>=1)&&(Section_19>=1))"))

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 9:32:36 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 31, 2018 9:32:36 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 9:32:36 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 72 ms
May 31, 2018 9:32:36 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 192 places.
May 31, 2018 9:32:36 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 96 transitions.
May 31, 2018 9:32:36 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 20 ms
May 31, 2018 9:32:36 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 99 ms
May 31, 2018 9:32:36 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
May 31, 2018 9:32:36 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 31, 2018 9:32:37 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 96 transitions.
May 31, 2018 9:32:37 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 97 place invariants in 58 ms
May 31, 2018 9:32:37 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 192 variables to be positive in 466 ms
May 31, 2018 9:32:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 96 transitions.
May 31, 2018 9:32:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/96 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 9:32:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 6 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 9:32:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 96 transitions.
May 31, 2018 9:32:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 21 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 9:32:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 96 transitions.
May 31, 2018 9:32:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/96) took 2316 ms. Total solver calls (SAT/UNSAT): 898(813/85)
May 31, 2018 9:32:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 3826 ms. Total solver calls (SAT/UNSAT): 1388(1285/103)
May 31, 2018 9:32:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 96 transitions.
May 31, 2018 9:32:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1471 ms. Total solver calls (SAT/UNSAT): 89(0/89)
May 31, 2018 9:32:43 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6821ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.000: completed loading model GAL
pins2lts-mc, 0.000: LTL layer: formula: X((LTLAP6==true))
pins2lts-mc, 0.000: "X((LTLAP6==true))" is not a file, parsing as formula...
pins2lts-mc, 0.000: Using Spin LTL semantics
pins2lts-mc, 0.009: buchi has 3 states
pins2lts-mc, 0.009: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.011: DFS-FIFO for weak LTL, using special progress label 119
pins2lts-mc, 0.011: There are 120 state labels and 1 edge labels
pins2lts-mc, 0.011: State length is 193, there are 99 groups
pins2lts-mc, 0.011: Running dfsfifo using 1 core (sequential)
pins2lts-mc, 0.011: Using a tree table with 2^27 elements
pins2lts-mc, 0.011: Successor permutation: rr
pins2lts-mc, 0.011: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc, 0.249: 986 levels 1000 states 18964 transitions
pins2lts-mc, 0.375: 1986 levels 2000 states 37032 transitions
pins2lts-mc, 0.589: 3986 levels 4000 states 74914 transitions
pins2lts-mc, 0.950: 7986 levels 8000 states 145096 transitions
pins2lts-mc, 1.612: 15986 levels 16000 states 288753 transitions
pins2lts-mc, 2.792: 31986 levels 32000 states 587005 transitions
pins2lts-mc, 4.861: 63986 levels 64000 states 1172934 transitions
pins2lts-mc, 8.813: 127986 levels 128000 states 2327855 transitions
pins2lts-mc, 17.165: 255986 levels 256000 states 4655446 transitions
pins2lts-mc, 37.427: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 37.966:
pins2lts-mc, 37.966:
pins2lts-mc, 37.966: Explored 380853 states 6947785 transitions, fanout: 18.243
pins2lts-mc, 37.966: Total exploration time 37.950 sec (37.950 sec minimum, 37.950 sec on average)
pins2lts-mc, 37.966: States per second: 10036, Transitions per second: 183077
pins2lts-mc, 37.966:
pins2lts-mc, 37.966: Progress states detected: 32
pins2lts-mc, 37.966: Redundant explorations: -94.5184
pins2lts-mc, 37.966:
pins2lts-mc, 37.966: Queue width: 8B, total height: 380904, memory: 2.91MB
pins2lts-mc, 37.966: Tree memory: 309.0MB, 46.6 B/state, compr.: 6.0%
pins2lts-mc, 37.966: Tree fill ratio (roots/leafs): 5.0%/99.0%
pins2lts-mc, 37.966: Stored 96 string chucks using 0MB
pins2lts-mc, 37.966: Total memory used for chunk indexing: 0MB
pins2lts-mc, 37.966: Est. total memory use: 311.9MB (~1026.9MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircularTrains-PT-096"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/CircularTrains-PT-096.tgz
mv CircularTrains-PT-096 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is CircularTrains-PT-096, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732262600008"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;