Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.........................
/home/mcc/execution
total 188K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.5K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.0K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 26K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is AutoFlight-PT-01b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r201-qhx1-152732198000018
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-00
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-01
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-02
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-03
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-04
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-05
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-06
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-07
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-08
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-09
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-10
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-11
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-12
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-13
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-14
FORMULA_NAME AutoFlight-PT-01b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527414380429

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(i0.i0.u8.p58>=1)"))
Formula 0 simplified : !"(i0.i0.u8.p58>=1)"
built 4 ordering constraints for composite.
built 15 ordering constraints for composite.
built 13 ordering constraints for composite.
built 11 ordering constraints for composite.
built 6 ordering constraints for composite.
built 20 ordering constraints for composite.
built 19 ordering constraints for composite.
built 12 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 112 rows 114 cols
invariant :u20:p0 + u20:p1 + u20:p2 + i1:u16:p110 + i1:u16:p111 + i1:u18:p63 + i1:i0:u15:p95 + i1:i0:u15:p96 + i1:i0:u15:p97 + i1:i0:u15:p98 + i1:i0:u15:p99 + i1:i0:u15:p100 + i1:i0:u15:p101 + i1:i0:i0:u13:p68 + i1:i0:i0:u13:p69 + i1:i0:i0:u13:p70 + i1:i0:i0:u13:p71 + i1:i0:i0:u13:p72 + i1:i0:i0:u13:p73 + i1:i0:i0:u13:p74 + i1:i0:i0:u13:p75 + i1:i0:i0:u14:p84 + i1:i0:i0:u14:p85 + i1:i0:i0:u14:p86 + i1:i0:i0:u14:p87 + i1:i0:i0:u14:p88 + i1:i0:i0:u14:p89 + i1:i0:i0:u14:p90 = 1
invariant :u20:p0 + u20:p1 + u20:p2 + i0:u21:p3 + i0:i0:u8:p46 + i0:i0:u8:p47 + i0:i0:u8:p48 + i0:i0:u8:p49 + i0:i0:u8:p50 + i0:i0:u8:p51 + i0:i0:u8:p52 + i0:i0:u8:p53 + i0:i0:u8:p54 + i0:i0:u8:p55 + i0:i0:u8:p56 + i0:i0:u8:p57 + i0:i0:u8:p58 + i0:i0:u22:p4 = 1
invariant :u20:p0 + u20:p1 + u20:p2 + i0:u21:p3 + i0:i0:u22:p4 + i0:i0:i0:u23:p5 + i0:i0:i0:i0:u6:p18 + i0:i0:i0:i0:u6:p19 + i0:i0:i0:i0:u6:p20 + i0:i0:i0:i0:u6:p21 + i0:i0:i0:i0:u6:p22 + i0:i0:i0:i0:u6:p23 + i0:i0:i0:i0:u6:p24 + i0:i0:i0:i0:u6:p25 + i0:i0:i0:i0:u6:p26 + i0:i0:i0:i0:u6:p27 + i0:i0:i0:i0:u6:p28 + i0:i0:i0:i0:u24:p6 = 1
invariant :u20:p0 + u20:p1 + u20:p2 + i1:u18:p63 + i1:i0:u17:p64 + i1:i0:i0:u14:p82 + i1:i0:i0:u14:p83 + i1:i0:i0:u14:p84 + i1:i0:i0:u14:p85 + i1:i0:i0:u14:p86 + i1:i0:i0:u14:p87 + i1:i0:i0:u14:p88 + i1:i0:i0:u14:p89 + i1:i0:i0:u14:p90 + i1:i0:i0:u14:p91 + i1:i0:i0:u14:p92 + i1:i0:i0:u19:p65 = 1
invariant :i1:u16:p112 + i1:u16:p113 + -1'i1:i0:u15:p95 + -1'i1:i0:u15:p96 + -1'i1:i0:u15:p97 + -1'i1:i0:u15:p98 + -1'i1:i0:u15:p99 + -1'i1:i0:u15:p100 + -1'i1:i0:u15:p101 + -1'i1:i0:i0:u13:p68 + -1'i1:i0:i0:u13:p69 + -1'i1:i0:i0:u13:p70 + -1'i1:i0:i0:u13:p71 + -1'i1:i0:i0:u13:p72 + -1'i1:i0:i0:u13:p73 + -1'i1:i0:i0:u13:p74 + -1'i1:i0:i0:u13:p75 + -1'i1:i0:i0:u14:p84 + -1'i1:i0:i0:u14:p85 + -1'i1:i0:i0:u14:p86 + -1'i1:i0:i0:u14:p87 + -1'i1:i0:i0:u14:p88 + -1'i1:i0:i0:u14:p89 + -1'i1:i0:i0:u14:p90 = 0
invariant :u20:p0 + u20:p1 + u20:p2 + i1:u18:p63 + i1:i0:u17:p64 + i1:i0:i0:u13:p66 + i1:i0:i0:u13:p67 + i1:i0:i0:u13:p68 + i1:i0:i0:u13:p69 + i1:i0:i0:u13:p70 + i1:i0:i0:u13:p71 + i1:i0:i0:u13:p72 + i1:i0:i0:u13:p73 + i1:i0:i0:u13:p74 + i1:i0:i0:u13:p75 + i1:i0:i0:u13:p76 + i1:i0:i0:u13:p77 + i1:i0:i0:u13:p78 + i1:i0:i0:u13:p79 + i1:i0:i0:u13:p80 + i1:i0:i0:u13:p81 + i1:i0:i0:u19:p65 = 1
invariant :u20:p0 + u20:p1 + u20:p2 + i0:u21:p3 + i0:i0:u22:p4 + i0:i0:i0:u23:p5 + i0:i0:i0:i0:u5:p7 + i0:i0:i0:i0:u5:p8 + i0:i0:i0:i0:u5:p9 + i0:i0:i0:i0:u5:p10 + i0:i0:i0:i0:u5:p11 + i0:i0:i0:i0:u5:p12 + i0:i0:i0:i0:u5:p13 + i0:i0:i0:i0:u5:p14 + i0:i0:i0:i0:u5:p15 + i0:i0:i0:i0:u5:p16 + i0:i0:i0:i0:u5:p17 + i0:i0:i0:i0:u24:p6 = 1
invariant :u20:p0 + u20:p1 + u20:p2 + i1:u18:p63 + i1:i0:u15:p93 + i1:i0:u15:p94 + i1:i0:u15:p95 + i1:i0:u15:p96 + i1:i0:u15:p97 + i1:i0:u15:p98 + i1:i0:u15:p99 + i1:i0:u15:p100 + i1:i0:u15:p101 + i1:i0:u15:p102 + i1:i0:u15:p103 + i1:i0:u15:p104 + i1:i0:u15:p105 + i1:i0:u15:p106 + i1:i0:u15:p107 + i1:i0:u15:p108 + i1:i0:u15:p109 + i1:i0:u17:p64 = 1
invariant :u20:p0 + u20:p1 + u20:p2 + i0:u21:p3 + i0:i0:u22:p4 + i0:i0:i0:u7:p29 + i0:i0:i0:u7:p30 + i0:i0:i0:u7:p31 + i0:i0:i0:u7:p32 + i0:i0:i0:u7:p33 + i0:i0:i0:u7:p34 + i0:i0:i0:u7:p35 + i0:i0:i0:u7:p36 + i0:i0:i0:u7:p37 + i0:i0:i0:u7:p38 + i0:i0:i0:u7:p39 + i0:i0:i0:u7:p40 + i0:i0:i0:u7:p41 + i0:i0:i0:u7:p42 + i0:i0:i0:u7:p43 + i0:i0:i0:u7:p44 + i0:i0:i0:u7:p45 + i0:i0:i0:u23:p5 = 1
invariant :u20:p0 + u20:p1 + u20:p2 + i0:u9:p59 + i0:u9:p60 + i0:u9:p61 + i0:u9:p62 + i0:u21:p3 = 1
Reverse transition relation is NOT exact ! Due to transitions t45, t106, t107, t108, i0.u9.t47, i0.i0.u8.t50, i0.i0.u8.t60, i0.i0.i0.u7.t6, i0.i0.i0.u7.t7, i0.i0.i0.u7.t8, i0.i0.i0.u7.t9, i0.i0.i0.u7.t65, i0.i0.i0.u7.t73, i0.i0.i0.i0.u5.t0, i0.i0.i0.i0.u5.t1, i0.i0.i0.i0.u5.t2, i0.i0.i0.i0.u5.t85, i0.i0.i0.i0.u5.t92, i0.i0.i0.i0.u6.t3, i0.i0.i0.i0.u6.t4, i0.i0.i0.i0.u6.t5, i0.i0.i0.i0.u6.t76, i0.i0.i0.i0.u6.t83, i1.u16.t17, i1.i0.u15.t26, i1.i0.u15.t29, i1.i0.i0.u13.t41, i1.i0.i0.u13.t44, i1.i0.i0.u14.t32, i1.i0.i0.u14.t35, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/82/30/112
Computing Next relation with stutter on 10 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3144 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 74 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 103 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 75 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 88 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((<>((LTLAP3==true)))U([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 94 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP5==true))U([](X((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 76 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 79 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 81 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP9==true))U((LTLAP4==true)))U([](((LTLAP10==true))U((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 92 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 97 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>((LTLAP13==true))))U(X(X(<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 74 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 76 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP16==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 122 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 117 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(X([]((LTLAP18==true)))))U(X(X((LTLAP19==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 84 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>(<>(X((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 95 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>((X((LTLAP20==true)))U([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 92 ms.
FORMULA AutoFlight-PT-01b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527414408758

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 9:46:33 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 27, 2018 9:46:33 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 9:46:33 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 64 ms
May 27, 2018 9:46:33 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 114 places.
May 27, 2018 9:46:34 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 112 transitions.
May 27, 2018 9:46:34 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 9:46:34 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 14 ms
May 27, 2018 9:46:34 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 9:46:34 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 73 ms
May 27, 2018 9:46:34 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
May 27, 2018 9:46:34 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 9:46:34 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 24 ms
May 27, 2018 9:46:34 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 9:46:34 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 4 redundant transitions.
May 27, 2018 9:46:34 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
May 27, 2018 9:46:34 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 27, 2018 9:46:34 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 112 transitions.
May 27, 2018 9:46:35 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 10 place invariants in 35 ms
May 27, 2018 9:46:35 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 114 variables to be positive in 295 ms
May 27, 2018 9:46:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 112 transitions.
May 27, 2018 9:46:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/112 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 9:46:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 9:46:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 112 transitions.
May 27, 2018 9:46:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 4 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 9:46:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 112 transitions.
May 27, 2018 9:46:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/112) took 1485 ms. Total solver calls (SAT/UNSAT): 724(10/714)
May 27, 2018 9:46:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/112) took 4496 ms. Total solver calls (SAT/UNSAT): 1559(36/1523)
May 27, 2018 9:46:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 5359 ms. Total solver calls (SAT/UNSAT): 1683(36/1647)
May 27, 2018 9:46:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 112 transitions.
May 27, 2018 9:46:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 20 ms. Total solver calls (SAT/UNSAT): 3(0/3)
May 27, 2018 9:46:42 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 7780ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-01b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-01b.tgz
mv AutoFlight-PT-01b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is AutoFlight-PT-01b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r201-qhx1-152732198000018"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;