fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r200-qhx1-152732197100038
Last Updated
June 26, 2018

About the Execution of ITS-Tools for AutoFlight-PT-06b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15728.410 1576662.00 3182360.00 3095.60 ?FFFFF?FFFFFF?FF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................................................................
/home/mcc/execution
total 308K
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 134K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is AutoFlight-PT-06b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r200-qhx1-152732197100038
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-00
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-01
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-02
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-03
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-04
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-05
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-06
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-07
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-08
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-09
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-10
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-11
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-12
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-13
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-14
FORMULA_NAME AutoFlight-PT-06b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527406549689

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(("(u35.p97>=1)")U(X(X("(u56.p344>=1)"))))))
Formula 0 simplified : !F("(u35.p97>=1)" U XX"(u56.p344>=1)")
built 94 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 572 rows 574 cols
invariant :u35:p93 + u35:p94 + u35:p95 + u35:p96 + u35:p97 + u35:p98 + u35:p99 + u35:p100 + u35:p101 + u35:p102 + u35:p103 + u35:p104 + u35:p105 + u35:p106 + u35:p107 + u35:p108 + u35:p109 + u111:p27 + u107:p26 + u108:p25 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u49:p279 + u49:p280 + u49:p281 + u49:p282 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u50:p283 + u50:p284 + u50:p285 + u50:p286 + u50:p287 + u50:p288 + u50:p289 + u50:p290 + u50:p291 + u50:p292 + u50:p293 + u50:p294 + u50:p295 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u70:p468 + u70:p469 + u70:p470 + u70:p471 + u70:p472 + u70:p473 + u70:p474 + u70:p475 + u70:p476 + u70:p477 + u70:p478 + u70:p479 + u70:p480 + u70:p481 + u70:p482 + u70:p483 + u70:p484 + u104:p374 + u106:p373 + u101:p372 + u102:p371 + u98:p370 + u99:p369 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u71:p485 + u71:p486 + u71:p487 + u71:p488 + u71:p489 + u71:p490 + u71:p491 + u71:p492 + u71:p493 + u71:p494 + u71:p495 + u71:p496 + u71:p497 + u71:p498 + u71:p499 + u71:p500 + u71:p501 + u106:p373 + u101:p372 + u102:p371 + u98:p370 + u99:p369 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u68:p376 + u68:p377 + u68:p378 + u68:p379 + u68:p380 + u68:p381 + u68:p382 + u68:p383 + u68:p384 + u68:p385 + u68:p386 + u68:p387 + u68:p388 + u68:p389 + u68:p390 + u68:p391 + u68:p392 + u68:p393 + u68:p394 + u68:p395 + u68:p396 + u68:p397 + u68:p398 + u68:p399 + u68:p400 + u68:p401 + u68:p402 + u68:p403 + u68:p404 + u68:p405 + u68:p406 + u68:p407 + u68:p408 + u68:p409 + u68:p410 + u68:p411 + u68:p412 + u68:p413 + u68:p414 + u68:p415 + u68:p416 + u68:p417 + u68:p418 + u68:p419 + u68:p420 + u68:p421 + u68:p422 + u68:p423 + u68:p424 + u68:p425 + u68:p426 + u68:p427 + u68:p428 + u68:p429 + u68:p430 + u68:p431 + u109:p375 + u104:p374 + u106:p373 + u101:p372 + u102:p371 + u98:p370 + u99:p369 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u44:p210 + u44:p211 + u44:p212 + u44:p213 + u44:p214 + u44:p215 + u44:p216 + u44:p217 + u44:p218 + u44:p219 + u44:p220 + u44:p221 + u44:p222 + u44:p223 + u44:p224 + u44:p225 + u44:p226 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u48:p266 + u48:p267 + u48:p268 + u48:p269 + u48:p270 + u48:p271 + u48:p272 + u48:p273 + u48:p274 + u48:p275 + u48:p276 + u48:p277 + u48:p278 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u54:p317 + u54:p318 + u54:p319 + u54:p320 + u54:p321 + u54:p322 + u54:p323 + u54:p324 + u54:p325 + u54:p326 + u54:p327 + u54:p328 + u54:p329 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u53:p313 + u53:p314 + u53:p315 + u53:p316 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u46:p238 + u46:p239 + u46:p240 + u46:p241 + u46:p242 + u46:p243 + u46:p244 + u46:p245 + u46:p246 + u46:p247 + u46:p248 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u73:p519 + u73:p520 + u73:p521 + u73:p522 + u73:p523 + u73:p524 + u73:p525 + u73:p526 + u73:p527 + u73:p528 + u73:p529 + u73:p530 + u73:p531 + u73:p532 + u73:p533 + u73:p534 + u73:p535 + u102:p371 + u98:p370 + u99:p369 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u37:p121 + u37:p122 + u37:p123 + u37:p124 + u37:p125 + u37:p126 + u37:p127 + u37:p128 + u37:p129 + u37:p130 + u37:p131 + u108:p25 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u45:p227 + u45:p228 + u45:p229 + u45:p230 + u45:p231 + u45:p232 + u45:p233 + u45:p234 + u45:p235 + u45:p236 + u45:p237 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u31:p43 + u31:p44 + u31:p45 + u31:p46 + u31:p47 + u31:p48 + u31:p49 + u31:p50 + u31:p51 + u31:p52 + u31:p53 + u114:p31 + u112:p30 + u113:p29 + u110:p28 + u111:p27 + u107:p26 + u108:p25 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u47:p249 + u47:p250 + u47:p251 + u47:p252 + u47:p253 + u47:p254 + u47:p255 + u47:p256 + u47:p257 + u47:p258 + u47:p259 + u47:p260 + u47:p261 + u47:p262 + u47:p263 + u47:p264 + u47:p265 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u42:p188 + u42:p189 + u42:p190 + u42:p191 + u42:p192 + u42:p193 + u42:p194 + u42:p195 + u42:p196 + u42:p197 + u42:p198 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u56:p334 + u56:p335 + u56:p336 + u56:p337 + u56:p338 + u56:p339 + u56:p340 + u56:p341 + u56:p342 + u56:p343 + u56:p344 + u56:p345 + u56:p346 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u68:p378 + u68:p379 + u68:p380 + u68:p381 + u68:p382 + u68:p383 + u68:p384 + u68:p385 + u68:p386 + u68:p387 + u68:p388 + u68:p389 + u68:p390 + u68:p391 + u68:p392 + u68:p393 + u68:p394 + u68:p395 + u68:p396 + u68:p397 + u68:p398 + u68:p399 + u68:p400 + u68:p401 + u68:p402 + u68:p403 + u68:p404 + u68:p405 + u68:p406 + u68:p407 + u68:p408 + u68:p409 + u68:p410 + u69:p434 + u69:p435 + u69:p436 + u69:p437 + u69:p438 + u69:p439 + u69:p440 + u69:p441 + u69:p442 + u69:p443 + u69:p444 + u69:p445 + u69:p446 + u69:p447 + u69:p448 + u69:p449 + u69:p450 + u69:p451 + u69:p452 + u69:p453 + u69:p454 + u69:p455 + u69:p456 + u69:p457 + u69:p458 + u69:p459 + u69:p460 + u70:p470 + u70:p471 + u70:p472 + u70:p473 + u70:p474 + u70:p475 + u70:p476 + u71:p487 + u71:p488 + u71:p489 + u71:p490 + u71:p491 + u71:p492 + u71:p493 + u72:p504 + u72:p505 + u72:p506 + u72:p507 + u72:p508 + u72:p509 + u72:p510 + u73:p521 + u73:p522 + u73:p523 + u73:p524 + u73:p525 + u73:p526 + u73:p527 + u74:p538 + u74:p539 + u74:p540 + u74:p541 + u74:p542 + u74:p543 + u74:p544 + u75:p555 + u75:p556 + u75:p557 + u75:p558 + u75:p559 + u75:p560 + u75:p561 + u76:p570 + u76:p571 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u41:p171 + u41:p172 + u41:p173 + u41:p174 + u41:p175 + u41:p176 + u41:p177 + u41:p178 + u41:p179 + u41:p180 + u41:p181 + u41:p182 + u41:p183 + u41:p184 + u41:p185 + u41:p186 + u41:p187 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :-1'u68:p378 + -1'u68:p379 + -1'u68:p380 + -1'u68:p381 + -1'u68:p382 + -1'u68:p383 + -1'u68:p384 + -1'u68:p385 + -1'u68:p386 + -1'u68:p387 + -1'u68:p388 + -1'u68:p389 + -1'u68:p390 + -1'u68:p391 + -1'u68:p392 + -1'u68:p393 + -1'u68:p394 + -1'u68:p395 + -1'u68:p396 + -1'u68:p397 + -1'u68:p398 + -1'u68:p399 + -1'u68:p400 + -1'u68:p401 + -1'u68:p402 + -1'u68:p403 + -1'u68:p404 + -1'u68:p405 + -1'u68:p406 + -1'u68:p407 + -1'u68:p408 + -1'u68:p409 + -1'u68:p410 + -1'u69:p434 + -1'u69:p435 + -1'u69:p436 + -1'u69:p437 + -1'u69:p438 + -1'u69:p439 + -1'u69:p440 + -1'u69:p441 + -1'u69:p442 + -1'u69:p443 + -1'u69:p444 + -1'u69:p445 + -1'u69:p446 + -1'u69:p447 + -1'u69:p448 + -1'u69:p449 + -1'u69:p450 + -1'u69:p451 + -1'u69:p452 + -1'u69:p453 + -1'u69:p454 + -1'u69:p455 + -1'u69:p456 + -1'u69:p457 + -1'u69:p458 + -1'u69:p459 + -1'u69:p460 + -1'u70:p470 + -1'u70:p471 + -1'u70:p472 + -1'u70:p473 + -1'u70:p474 + -1'u70:p475 + -1'u70:p476 + -1'u71:p487 + -1'u71:p488 + -1'u71:p489 + -1'u71:p490 + -1'u71:p491 + -1'u71:p492 + -1'u71:p493 + -1'u72:p504 + -1'u72:p505 + -1'u72:p506 + -1'u72:p507 + -1'u72:p508 + -1'u72:p509 + -1'u72:p510 + -1'u73:p521 + -1'u73:p522 + -1'u73:p523 + -1'u73:p524 + -1'u73:p525 + -1'u73:p526 + -1'u73:p527 + -1'u74:p538 + -1'u74:p539 + -1'u74:p540 + -1'u74:p541 + -1'u74:p542 + -1'u74:p543 + -1'u74:p544 + -1'u75:p555 + -1'u75:p556 + -1'u75:p557 + -1'u75:p558 + -1'u75:p559 + -1'u75:p560 + -1'u75:p561 + u76:p572 + u76:p573 = 0
invariant :u30:p32 + u30:p33 + u30:p34 + u30:p35 + u30:p36 + u30:p37 + u30:p38 + u30:p39 + u30:p40 + u30:p41 + u30:p42 + u114:p31 + u112:p30 + u113:p29 + u110:p28 + u111:p27 + u107:p26 + u108:p25 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u36:p110 + u36:p111 + u36:p112 + u36:p113 + u36:p114 + u36:p115 + u36:p116 + u36:p117 + u36:p118 + u36:p119 + u36:p120 + u107:p26 + u108:p25 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u51:p296 + u51:p297 + u51:p298 + u51:p299 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u38:p132 + u38:p133 + u38:p134 + u38:p135 + u38:p136 + u38:p137 + u38:p138 + u38:p139 + u38:p140 + u38:p141 + u38:p142 + u38:p143 + u38:p144 + u38:p145 + u38:p146 + u38:p147 + u38:p148 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u43:p199 + u43:p200 + u43:p201 + u43:p202 + u43:p203 + u43:p204 + u43:p205 + u43:p206 + u43:p207 + u43:p208 + u43:p209 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u40:p160 + u40:p161 + u40:p162 + u40:p163 + u40:p164 + u40:p165 + u40:p166 + u40:p167 + u40:p168 + u40:p169 + u40:p170 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u55:p330 + u55:p331 + u55:p332 + u55:p333 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u57:p347 + u57:p348 + u57:p349 + u57:p350 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u69:p432 + u69:p433 + u69:p434 + u69:p435 + u69:p436 + u69:p437 + u69:p438 + u69:p439 + u69:p440 + u69:p441 + u69:p442 + u69:p443 + u69:p444 + u69:p445 + u69:p446 + u69:p447 + u69:p448 + u69:p449 + u69:p450 + u69:p451 + u69:p452 + u69:p453 + u69:p454 + u69:p455 + u69:p456 + u69:p457 + u69:p458 + u69:p459 + u69:p460 + u69:p461 + u69:p462 + u69:p463 + u69:p464 + u69:p465 + u69:p466 + u69:p467 + u109:p375 + u104:p374 + u106:p373 + u101:p372 + u102:p371 + u98:p370 + u99:p369 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u52:p300 + u52:p301 + u52:p302 + u52:p303 + u52:p304 + u52:p305 + u52:p306 + u52:p307 + u52:p308 + u52:p309 + u52:p310 + u52:p311 + u52:p312 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u58:p351 + u58:p352 + u58:p353 + u58:p354 + u58:p355 + u58:p356 + u58:p357 + u58:p358 + u58:p359 + u58:p360 + u58:p361 + u58:p362 + u58:p363 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u32:p54 + u32:p55 + u32:p56 + u32:p57 + u32:p58 + u32:p59 + u32:p60 + u32:p61 + u32:p62 + u32:p63 + u32:p64 + u32:p65 + u32:p66 + u32:p67 + u32:p68 + u32:p69 + u32:p70 + u112:p30 + u113:p29 + u110:p28 + u111:p27 + u107:p26 + u108:p25 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u75:p553 + u75:p554 + u75:p555 + u75:p556 + u75:p557 + u75:p558 + u75:p559 + u75:p560 + u75:p561 + u75:p562 + u75:p563 + u75:p564 + u75:p565 + u75:p566 + u75:p567 + u75:p568 + u75:p569 + u99:p369 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u59:p364 + u59:p365 + u59:p366 + u59:p367 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u74:p536 + u74:p537 + u74:p538 + u74:p539 + u74:p540 + u74:p541 + u74:p542 + u74:p543 + u74:p544 + u74:p545 + u74:p546 + u74:p547 + u74:p548 + u74:p549 + u74:p550 + u74:p551 + u74:p552 + u98:p370 + u99:p369 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u72:p502 + u72:p503 + u72:p504 + u72:p505 + u72:p506 + u72:p507 + u72:p508 + u72:p509 + u72:p510 + u72:p511 + u72:p512 + u72:p513 + u72:p514 + u72:p515 + u72:p516 + u72:p517 + u72:p518 + u101:p372 + u102:p371 + u98:p370 + u99:p369 + u97:p368 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u39:p149 + u39:p150 + u39:p151 + u39:p152 + u39:p153 + u39:p154 + u39:p155 + u39:p156 + u39:p157 + u39:p158 + u39:p159 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u34:p82 + u34:p83 + u34:p84 + u34:p85 + u34:p86 + u34:p87 + u34:p88 + u34:p89 + u34:p90 + u34:p91 + u34:p92 + u110:p28 + u111:p27 + u107:p26 + u108:p25 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
invariant :u33:p71 + u33:p72 + u33:p73 + u33:p74 + u33:p75 + u33:p76 + u33:p77 + u33:p78 + u33:p79 + u33:p80 + u33:p81 + u113:p29 + u110:p28 + u111:p27 + u107:p26 + u108:p25 + u103:p24 + u105:p23 + u100:p22 + u87:p21 + u89:p20 + u83:p19 + u85:p18 + u81:p17 + u82:p16 + u79:p15 + u80:p14 + u77:p13 + u78:p12 + u96:p11 + u95:p10 + u94:p9 + u93:p8 + u92:p7 + u91:p6 + u90:p5 + u88:p4 + u86:p3 + u84:p0 + u84:p1 + u84:p2 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 10746 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 116 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(((LTLAP0==true))U(X(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(((LTLAP0==true))U(X(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((((LTLAP2==true))U((LTLAP3==true)))U([]((LTLAP4==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1683 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP5==true))U(X(X((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 375 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([]([]([]((LTLAP7==true)))))U((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1509 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(X(<>((LTLAP9==true)))))U(X(((LTLAP5==true))U((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 361 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 369 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 589 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((<>((LTLAP14==true)))U([]((LTLAP15==true))))U([](<>([]((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1566 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([]((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 353 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]([](X((LTLAP18==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 409 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP19==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 381 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP20==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1548 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((LTLAP21==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((LTLAP21==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](X((LTLAP22==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 576 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP23==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1596 ms.
FORMULA AutoFlight-PT-06b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(((LTLAP0==true))U(X(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
#
# There is insufficient memory for the Java Runtime Environment to continue.
# Native memory allocation (mmap) failed to map 100663296 bytes for committing reserved memory.
# An error report file with more information is saved as:
# /home/mcc/execution/hs_err_pid409.log
Its-tools:
JVM terminated. Exit code=1
/bin/java
-Dosgi.locking=none
-Declipse.stateSaveDelayInterval=-1
-Dosgi.configuration.area=/tmp/.eclipse
-Xss8m
-Xms40m
-Xmx8192m
-Dfile.encoding=UTF-8
-Dosgi.requiredJavaVersion=1.6
-jar /home/mcc/BenchKit/itstools//plugins/org.eclipse.equinox.launcher_1.4.0.v20161219-1356.jar
-os linux
-ws gtk
-arch x86_64
-showsplash
-launcher /home/mcc/BenchKit/itstools/its-tools
-name Its-tools
--launcher.library /home/mcc/BenchKit/itstools//plugins/org.eclipse.equinox.launcher.gtk.linux.x86_64_1.1.551.v20171108-1834/eclipse_1630.so
-startup /home/mcc/BenchKit/itstools//plugins/org.eclipse.equinox.launcher_1.4.0.v20161219-1356.jar
--launcher.overrideVmargs
-exitdata 0
-consoleLog
-data /home/mcc/execution/workspace
-pnfolder /home/mcc/execution
-examination LTLFireability
-z3path /home/mcc/BenchKit//z3/bin/z3
-yices2path /home/mcc/BenchKit//yices/bin/yices
-its
-ltsminpath /home/mcc/BenchKit//lts_install_dir/
-smt
-vm /bin/java
-vmargs
-Dosgi.locking=none
-Declipse.stateSaveDelayInterval=-1
-Dosgi.configuration.area=/tmp/.eclipse
-Xss8m
-Xms40m
-Xmx8192m
-Dfile.encoding=UTF-8
-Dosgi.requiredJavaVersion=1.6
-jar /home/mcc/BenchKit/itstools//plugins/org.eclipse.equinox.launcher_1.4.0.v20161219-1356.jar

BK_STOP 1527408126351

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 7:35:52 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 27, 2018 7:35:52 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 7:35:52 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 162 ms
May 27, 2018 7:35:52 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 574 places.
May 27, 2018 7:35:53 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 572 transitions.
May 27, 2018 7:35:53 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 7:35:53 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 33 ms
May 27, 2018 7:35:53 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 7:35:53 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 7:35:53 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 155 ms
May 27, 2018 7:35:53 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 7:35:53 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 14 redundant transitions.
May 27, 2018 7:35:53 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 20 ms
May 27, 2018 7:35:53 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
May 27, 2018 7:35:54 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 572 transitions.
May 27, 2018 7:35:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 40 place invariants in 279 ms
May 27, 2018 7:35:56 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 574 variables to be positive in 1720 ms
May 27, 2018 7:35:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 572 transitions.
May 27, 2018 7:35:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/572 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 7:35:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 77 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 7:35:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 572 transitions.
May 27, 2018 7:35:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 18 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 7:35:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 572 transitions.
May 27, 2018 7:35:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/572) took 1242 ms. Total solver calls (SAT/UNSAT): 976(0/976)
May 27, 2018 7:36:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/572) took 4574 ms. Total solver calls (SAT/UNSAT): 4597(0/4597)
May 27, 2018 7:36:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/572) took 7714 ms. Total solver calls (SAT/UNSAT): 8416(0/8416)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 27, 2018 7:36:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 9451 ms. Total solver calls (SAT/UNSAT): 9270(1/9269)
May 27, 2018 7:36:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 572 transitions.
May 27, 2018 7:36:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 2113 ms. Total solver calls (SAT/UNSAT): 801(0/801)
May 27, 2018 7:36:10 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 16432ms conformant to PINS in folder :/home/mcc/execution
Java HotSpot(TM) 64-Bit Server VM warning: INFO: os::commit_memory(0x0000000720380000, 100663296, 0) failed; error='Cannot allocate memory' (errno=12)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-06b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-06b.tgz
mv AutoFlight-PT-06b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is AutoFlight-PT-06b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r200-qhx1-152732197100038"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;