fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r200-qhx1-152732197100026
Last Updated
June 26, 2018

About the Execution of ITS-Tools for AutoFlight-PT-03b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15751.930 3600000.00 5700347.00 17241.40 FFFFFFFFFFFFF?FF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...........................
/home/mcc/execution
total 236K
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 70K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is AutoFlight-PT-03b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r200-qhx1-152732197100026
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-00
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-01
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-02
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-03
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-04
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-05
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-06
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-07
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-08
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-09
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-10
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-11
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-12
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-13
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-14
FORMULA_NAME AutoFlight-PT-03b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527402756419

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("((u39.p279>=1)&&(u40.p296>=1))"))
Formula 0 simplified : !"((u39.p279>=1)&&(u40.p296>=1))"
built 49 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 296 rows 298 cols
invariant :u20:p78 + u20:p79 + u20:p80 + u20:p81 + u20:p82 + u20:p83 + u20:p84 + u20:p85 + u20:p86 + u20:p87 + u20:p88 + u20:p89 + u20:p90 + u20:p91 + u20:p92 + u20:p93 + u20:p94 + u45:p12 + u60:p11 + u59:p10 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u35:p190 + u35:p191 + u35:p192 + u35:p193 + u35:p194 + u35:p195 + u35:p196 + u35:p197 + u35:p198 + u35:p199 + u35:p200 + u35:p201 + u35:p202 + u35:p203 + u35:p204 + u35:p205 + u35:p206 + u35:p207 + u35:p208 + u35:p209 + u35:p210 + u35:p211 + u35:p212 + u35:p213 + u35:p214 + u35:p215 + u35:p216 + u35:p217 + u35:p218 + u35:p219 + u35:p220 + u35:p221 + u49:p189 + u44:p188 + u46:p187 + u41:p186 + u42:p185 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u36:p222 + u36:p223 + u36:p224 + u36:p225 + u36:p226 + u36:p227 + u36:p228 + u36:p229 + u36:p230 + u36:p231 + u36:p232 + u36:p233 + u36:p234 + u36:p235 + u36:p236 + u36:p237 + u36:p238 + u36:p239 + u36:p240 + u36:p241 + u36:p242 + u49:p189 + u44:p188 + u46:p187 + u41:p186 + u42:p185 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u29:p181 + u29:p182 + u29:p183 + u29:p184 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u18:p56 + u18:p57 + u18:p58 + u18:p59 + u18:p60 + u18:p61 + u18:p62 + u18:p63 + u18:p64 + u18:p65 + u18:p66 + u48:p14 + u43:p13 + u45:p12 + u60:p11 + u59:p10 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u22:p106 + u22:p107 + u22:p108 + u22:p109 + u22:p110 + u22:p111 + u22:p112 + u22:p113 + u22:p114 + u22:p115 + u22:p116 + u59:p10 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u39:p277 + u39:p278 + u39:p279 + u39:p280 + u39:p281 + u39:p282 + u39:p283 + u39:p284 + u39:p285 + u39:p286 + u39:p287 + u39:p288 + u39:p289 + u39:p290 + u39:p291 + u39:p292 + u39:p293 + u41:p186 + u42:p185 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u38:p260 + u38:p261 + u38:p262 + u38:p263 + u38:p264 + u38:p265 + u38:p266 + u38:p267 + u38:p268 + u38:p269 + u38:p270 + u38:p271 + u38:p272 + u38:p273 + u38:p274 + u38:p275 + u38:p276 + u46:p187 + u41:p186 + u42:p185 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u35:p192 + u35:p193 + u35:p194 + u35:p195 + u35:p196 + u35:p197 + u35:p198 + u35:p199 + u35:p200 + u35:p201 + u35:p202 + u35:p203 + u35:p204 + u35:p205 + u35:p206 + u35:p207 + u35:p208 + u35:p209 + u36:p224 + u36:p225 + u36:p226 + u36:p227 + u36:p228 + u36:p229 + u36:p230 + u36:p231 + u36:p232 + u36:p233 + u36:p234 + u36:p235 + u36:p236 + u36:p237 + u36:p238 + u37:p245 + u37:p246 + u37:p247 + u37:p248 + u37:p249 + u37:p250 + u37:p251 + u38:p262 + u38:p263 + u38:p264 + u38:p265 + u38:p266 + u38:p267 + u38:p268 + u39:p279 + u39:p280 + u39:p281 + u39:p282 + u39:p283 + u39:p284 + u39:p285 + u40:p294 + u40:p295 + u42:p185 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u37:p243 + u37:p244 + u37:p245 + u37:p246 + u37:p247 + u37:p248 + u37:p249 + u37:p250 + u37:p251 + u37:p252 + u37:p253 + u37:p254 + u37:p255 + u37:p256 + u37:p257 + u37:p258 + u37:p259 + u44:p188 + u46:p187 + u41:p186 + u42:p185 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u24:p134 + u24:p135 + u24:p136 + u24:p137 + u24:p138 + u24:p139 + u24:p140 + u24:p141 + u24:p142 + u24:p143 + u24:p144 + u24:p145 + u24:p146 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u25:p147 + u25:p148 + u25:p149 + u25:p150 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u23:p117 + u23:p118 + u23:p119 + u23:p120 + u23:p121 + u23:p122 + u23:p123 + u23:p124 + u23:p125 + u23:p126 + u23:p127 + u23:p128 + u23:p129 + u23:p130 + u23:p131 + u23:p132 + u23:p133 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u16:p28 + u16:p29 + u16:p30 + u16:p31 + u16:p32 + u16:p33 + u16:p34 + u16:p35 + u16:p36 + u16:p37 + u16:p38 + u50:p16 + u47:p15 + u48:p14 + u43:p13 + u45:p12 + u60:p11 + u59:p10 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u21:p95 + u21:p96 + u21:p97 + u21:p98 + u21:p99 + u21:p100 + u21:p101 + u21:p102 + u21:p103 + u21:p104 + u21:p105 + u60:p11 + u59:p10 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u27:p164 + u27:p165 + u27:p166 + u27:p167 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u26:p151 + u26:p152 + u26:p153 + u26:p154 + u26:p155 + u26:p156 + u26:p157 + u26:p158 + u26:p159 + u26:p160 + u26:p161 + u26:p162 + u26:p163 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u28:p168 + u28:p169 + u28:p170 + u28:p171 + u28:p172 + u28:p173 + u28:p174 + u28:p175 + u28:p176 + u28:p177 + u28:p178 + u28:p179 + u28:p180 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u19:p67 + u19:p68 + u19:p69 + u19:p70 + u19:p71 + u19:p72 + u19:p73 + u19:p74 + u19:p75 + u19:p76 + u19:p77 + u43:p13 + u45:p12 + u60:p11 + u59:p10 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :u15:p17 + u15:p18 + u15:p19 + u15:p20 + u15:p21 + u15:p22 + u15:p23 + u15:p24 + u15:p25 + u15:p26 + u15:p27 + u50:p16 + u47:p15 + u48:p14 + u43:p13 + u45:p12 + u60:p11 + u59:p10 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
invariant :-1'u35:p192 + -1'u35:p193 + -1'u35:p194 + -1'u35:p195 + -1'u35:p196 + -1'u35:p197 + -1'u35:p198 + -1'u35:p199 + -1'u35:p200 + -1'u35:p201 + -1'u35:p202 + -1'u35:p203 + -1'u35:p204 + -1'u35:p205 + -1'u35:p206 + -1'u35:p207 + -1'u35:p208 + -1'u35:p209 + -1'u36:p224 + -1'u36:p225 + -1'u36:p226 + -1'u36:p227 + -1'u36:p228 + -1'u36:p229 + -1'u36:p230 + -1'u36:p231 + -1'u36:p232 + -1'u36:p233 + -1'u36:p234 + -1'u36:p235 + -1'u36:p236 + -1'u36:p237 + -1'u36:p238 + -1'u37:p245 + -1'u37:p246 + -1'u37:p247 + -1'u37:p248 + -1'u37:p249 + -1'u37:p250 + -1'u37:p251 + -1'u38:p262 + -1'u38:p263 + -1'u38:p264 + -1'u38:p265 + -1'u38:p266 + -1'u38:p267 + -1'u38:p268 + -1'u39:p279 + -1'u39:p280 + -1'u39:p281 + -1'u39:p282 + -1'u39:p283 + -1'u39:p284 + -1'u39:p285 + u40:p296 + u40:p297 = 0
invariant :u17:p39 + u17:p40 + u17:p41 + u17:p42 + u17:p43 + u17:p44 + u17:p45 + u17:p46 + u17:p47 + u17:p48 + u17:p49 + u17:p50 + u17:p51 + u17:p52 + u17:p53 + u17:p54 + u17:p55 + u47:p15 + u48:p14 + u43:p13 + u45:p12 + u60:p11 + u59:p10 + u58:p9 + u57:p8 + u56:p7 + u55:p6 + u54:p5 + u53:p4 + u52:p3 + u51:p0 + u51:p1 + u51:p2 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6877 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 92 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 348 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 329 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 182 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>([](<>((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 207 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([]([](X([]((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 168 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (([]((LTLAP5==true)))U([]((LTLAP6==true))))U(<>(((LTLAP7==true))U((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 317 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 332 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4066 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](((LTLAP11==true))U((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 321 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>([]([]((LTLAP13==true)))))U((X((LTLAP14==true)))U(X((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 210 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP16==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 308 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 311 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(((LTLAP18==true))U((LTLAP19==true))))U(X(<>([]((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 170 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]([]([]((LTLAP20==true)))))U([](<>(X((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions t101, t117, t133, t286, t287, t288, t289, t290, u15.t0, u15.t1, u15.t2, u15.t239, u15.t246, u16.t3, u16.t4, u16.t5, u16.t230, u16.t237, u17.t6, u17.t7, u17.t8, u17.t9, u17.t219, u17.t227, u18.t10, u18.t11, u18.t12, u18.t207, u18.t214, u19.t13, u19.t14, u19.t15, u19.t197, u19.t204, u20.t16, u20.t17, u20.t18, u20.t19, u20.t186, u20.t194, u21.t20, u21.t21, u21.t22, u21.t174, u21.t181, u22.t23, u22.t24, u22.t25, u22.t164, u22.t171, u23.t26, u23.t27, u23.t28, u23.t29, u23.t153, u23.t161, u24.t138, u24.t148, u25.t135, u26.t122, u26.t132, u27.t119, u28.t106, u28.t116, u29.t103, u35.t97, u35.t100, u36.t82, u36.t85, u37.t74, u37.t77, u38.t62, u38.t65, u39.t50, u39.t53, u40.t41, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/220/76/296
Computing Next relation with stutter on 120 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
13539 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,135.547,1512004,1,0,2.88572e+06,22336,2185,4.8764e+06,1540,149330,6688177
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F("(u36.p230>=1)")))
Formula 1 simplified : !F"(u36.p230>=1)"
Computing Next relation with stutter on 120 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
3364 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,169.172,1880164,1,0,3.54669e+06,22420,2283,5.95197e+06,1541,150895,7992890
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X(F("(u28.p177>=1)"))))
Formula 2 simplified : !XF"(u28.p177>=1)"
Computing Next relation with stutter on 120 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
195 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,171.122,1906300,1,0,3.5983e+06,22585,2316,6.02119e+06,1542,152391,8084005
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((G(X(F(G(F("((u15.p25>=1)&&(u37.p247>=1))")))))))
Formula 3 simplified : !GXFGF"((u15.p25>=1)&&(u37.p247>=1))"
Computing Next relation with stutter on 120 deadlock states
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]([]([]((LTLAP20==true)))))U([](<>(X((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((X(X((LTLAP22==true))))U((LTLAP23==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 440 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X((X((LTLAP24==true)))U(<>((LTLAP25==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 240 ms.
FORMULA AutoFlight-PT-03b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]([]([]((LTLAP20==true)))))U([](<>(X((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
169 unique states visited
169 strongly connected components in search stack
170 transitions explored
169 items max in DFS search stack
43567 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,606.808,2452332,1,0,3.84476e+06,27486,994,9.86838e+06,746,209523,5258847
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((F(G(G(X(G("(u35.p216>=1)")))))))
Formula 4 simplified : !FGXG"(u35.p216>=1)"
Computing Next relation with stutter on 120 deadlock states
168 unique states visited
167 strongly connected components in search stack
169 transitions explored
168 items max in DFS search stack
21184 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,818.651,2701984,1,0,4.37368e+06,27486,997,9.86838e+06,747,209523,2744708
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((((G("(u48.p14>=1)"))U(G("(u20.p78>=1)")))U(F(("(u15.p18>=1)")U("((u18.p64>=1)&&(u38.p264>=1))")))))
Formula 5 simplified : !((G"(u48.p14>=1)" U G"(u20.p78>=1)") U F("(u15.p18>=1)" U "((u18.p64>=1)&&(u38.p264>=1))"))
Computing Next relation with stutter on 120 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
1745 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,836.106,2702860,1,0,4.37368e+06,27486,1245,9.86838e+06,842,209523,3752190
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((G(F("(u19.p69>=1)"))))
Formula 6 simplified : !GF"(u19.p69>=1)"
Computing Next relation with stutter on 120 deadlock states
169 unique states visited
169 strongly connected components in search stack
170 transitions explored
169 items max in DFS search stack
4906 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,885.172,2702860,1,0,4.37368e+06,27486,1320,1.0428e+07,843,209523,6511739
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((G(F(F("(u24.p142>=1)")))))
Formula 7 simplified : !GF"(u24.p142>=1)"
Computing Next relation with stutter on 120 deadlock states
169 unique states visited
169 strongly connected components in search stack
170 transitions explored
169 items max in DFS search stack
21350 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1098.68,2999300,1,0,4.37368e+06,27486,999,1.26585e+07,747,209523,5069373
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((G(("(u20.p91>=1)")U("(u19.p74>=1)"))))
Formula 8 simplified : !G("(u20.p91>=1)" U "(u19.p74>=1)")
Computing Next relation with stutter on 120 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
5739 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1156.08,2999300,1,0,4.66647e+06,27486,1233,1.26585e+07,844,209523,8415833
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !(((F(G(G("(u37.p246>=1)"))))U((X("(u38.p260>=1)"))U(X("(u60.p11>=1)")))))
Formula 9 simplified : !(FG"(u37.p246>=1)" U (X"(u38.p260>=1)" U X"(u60.p11>=1)"))
Computing Next relation with stutter on 120 deadlock states
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]([]([]((LTLAP20==true)))))U([](<>(X((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
105251 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2208.6,4129704,1,0,6.9053e+06,27486,713,1.26585e+07,601,209523,11085124
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((F("((u38.p262>=1)&&(u40.p296>=1))")))
Formula 10 simplified : !F"((u38.p262>=1)&&(u40.p296>=1))"
Computing Next relation with stutter on 120 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
13008 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2338.68,4491236,1,0,7.49523e+06,27486,967,1.38677e+07,744,209523,1409171
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !(("(u17.p52>=1)"))
Formula 11 simplified : !"(u17.p52>=1)"
Computing Next relation with stutter on 120 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
3481 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2373.49,4491236,1,0,7.49523e+06,27486,1236,1.38677e+07,842,209523,3863486
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA AutoFlight-PT-03b-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !(((X(("(u17.p53>=1)")U("(u21.p96>=1)")))U(X(F(G("(u17.p52>=1)"))))))
Formula 12 simplified : !(X("(u17.p53>=1)" U "(u21.p96>=1)") U XFG"(u17.p52>=1)")
Computing Next relation with stutter on 120 deadlock states

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 6:32:51 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 27, 2018 6:32:51 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 6:32:52 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 112 ms
May 27, 2018 6:32:52 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 298 places.
May 27, 2018 6:32:52 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 296 transitions.
May 27, 2018 6:32:52 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 6:32:52 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 23 ms
May 27, 2018 6:32:52 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 6:32:52 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 6:32:52 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 100 ms
May 27, 2018 6:32:52 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 6:32:52 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 8 redundant transitions.
May 27, 2018 6:32:52 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 14 ms
May 27, 2018 6:32:52 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 27, 2018 6:32:53 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 296 transitions.
May 27, 2018 6:32:53 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 22 place invariants in 133 ms
May 27, 2018 6:32:54 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 298 variables to be positive in 815 ms
May 27, 2018 6:32:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 296 transitions.
May 27, 2018 6:32:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/296 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:32:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 31 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:32:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 296 transitions.
May 27, 2018 6:32:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 29 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:32:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 296 transitions.
May 27, 2018 6:32:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/296) took 1106 ms. Total solver calls (SAT/UNSAT): 514(0/514)
May 27, 2018 6:33:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/296) took 4269 ms. Total solver calls (SAT/UNSAT): 3075(10/3065)
May 27, 2018 6:33:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/296) took 7435 ms. Total solver calls (SAT/UNSAT): 4173(35/4138)
May 27, 2018 6:33:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/296) took 10436 ms. Total solver calls (SAT/UNSAT): 4988(63/4925)
May 27, 2018 6:33:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/296) took 13442 ms. Total solver calls (SAT/UNSAT): 5554(73/5481)
May 27, 2018 6:33:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(197/296) took 16480 ms. Total solver calls (SAT/UNSAT): 6183(80/6103)
May 27, 2018 6:33:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(247/296) took 19491 ms. Total solver calls (SAT/UNSAT): 6723(89/6634)
May 27, 2018 6:33:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(291/296) took 22532 ms. Total solver calls (SAT/UNSAT): 7098(101/6997)
May 27, 2018 6:33:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 22769 ms. Total solver calls (SAT/UNSAT): 7101(101/7000)
May 27, 2018 6:33:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 296 transitions.
May 27, 2018 6:33:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 74 ms. Total solver calls (SAT/UNSAT): 5(0/5)
May 27, 2018 6:33:20 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 27000ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-03b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-03b.tgz
mv AutoFlight-PT-03b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is AutoFlight-PT-03b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r200-qhx1-152732197100026"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;