Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................
/home/mcc/execution
total 368K
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 202K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ResAllocation-PT-R050C002, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r189-qhx2-152732141000156
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-00
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-01
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-02
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-03
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-04
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-05
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-06
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-07
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-08
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-09
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-10
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-11
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-12
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-13
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-14
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1528326018563

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph3481128348037415495.txt, -o, /tmp/graph3481128348037415495.bin, -w, /tmp/graph3481128348037415495.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph3481128348037415495.bin, -l, -1, -v, -w, /tmp/graph3481128348037415495.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((X(F(X("((i3.u16.p_0_16>=1)&&(i3.u17.r_0_17>=1))"))))U(F(F(G("(((i10.u98.r_1_48>=1)&&(i10.u99.p_1_49>=1))&&(i10.u48.r_0_48>=1))"))))))
Formula 0 simplified : !(XFX"((i3.u16.p_0_16>=1)&&(i3.u17.r_0_17>=1))" U FG"(((i10.u98.r_1_48>=1)&&(i10.u99.p_1_49>=1))&&(i10.u48.r_0_48>=1))")
built 21 ordering constraints for composite.
built 7 ordering constraints for composite.
built 10 ordering constraints for composite.
built 14 ordering constraints for composite.
built 12 ordering constraints for composite.
built 10 ordering constraints for composite.
built 12 ordering constraints for composite.
built 14 ordering constraints for composite.
built 8 ordering constraints for composite.
built 12 ordering constraints for composite.
built 10 ordering constraints for composite.
built 11 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions t_1_0, i10.u49.t_0_50, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/100/2/102
Computing Next relation with stutter on 49 deadlock states
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 102 rows 200 cols
invariant :i2:u8:p_0_8 + i2:u8:r_0_8 + -1'i2:u58:r_1_8 = 0
invariant :i10:u49:p_0_49 + i10:u49:r_0_49 + -1'i10:u99:r_1_49 = 0
invariant :i5:u75:p_1_25 + i5:u75:r_1_25 = 1
invariant :i0:u50:p_1_0 + i0:u50:r_1_0 = 1
invariant :i3:u13:p_0_13 + i3:u13:r_0_13 + -1'i3:u63:r_1_13 = 0
invariant :i0:u0:p_0_0 + i0:u0:r_0_0 + -1'i0:u50:r_1_0 = 0
invariant :i2:u59:p_1_9 + i2:u59:r_1_9 = 1
invariant :i2:u57:p_1_7 + i2:u57:r_1_7 = 1
invariant :i8:u40:p_0_40 + i8:u40:r_0_40 + -1'i8:u90:r_1_40 = 0
invariant :i3:u67:p_1_17 + i3:u67:r_1_17 = 1
invariant :i3:u17:p_0_17 + i3:u17:r_0_17 + -1'i3:u67:r_1_17 = 0
invariant :i6:u31:p_0_31 + i6:u31:r_0_31 + -1'i6:u81:r_1_31 = 0
invariant :i6:u27:p_0_27 + i6:u27:r_0_27 + -1'i6:u77:r_1_27 = 0
invariant :i2:u9:p_0_9 + i2:u9:r_0_9 + -1'i2:u59:r_1_9 = 0
invariant :i4:u18:p_0_18 + i4:u18:r_0_18 + -1'i4:u68:r_1_18 = 0
invariant :i10:u45:p_0_45 + i10:u45:r_0_45 + -1'i10:u95:r_1_45 = 0
invariant :i7:u83:p_1_33 + i7:u83:r_1_33 = 1
invariant :i1:u4:p_0_4 + i1:u4:r_0_4 + -1'i1:u54:r_1_4 = 0
invariant :i3:u15:p_0_15 + i3:u15:r_0_15 + -1'i3:u65:r_1_15 = 0
invariant :i7:u84:p_1_34 + i7:u84:r_1_34 = 1
invariant :i10:u97:p_1_47 + i10:u97:r_1_47 = 1
invariant :i1:u53:p_1_3 + i1:u53:r_1_3 = 1
invariant :i0:u1:p_0_1 + i0:u1:r_0_1 + -1'i0:u51:r_1_1 = 0
invariant :i5:u22:p_0_22 + i5:u22:r_0_22 + -1'i5:u72:r_1_22 = 0
invariant :i10:u47:p_0_47 + i10:u47:r_0_47 + -1'i10:u97:r_1_47 = 0
invariant :i6:u30:p_0_30 + i6:u30:r_0_30 + -1'i6:u80:r_1_30 = 0
invariant :i1:u54:p_1_4 + i1:u54:r_1_4 = 1
invariant :i1:u5:p_0_5 + i1:u5:r_0_5 + -1'i1:u55:r_1_5 = 0
invariant :i5:u24:p_0_24 + i5:u24:r_0_24 + -1'i5:u74:r_1_24 = 0
invariant :i8:u88:p_1_38 + i8:u88:r_1_38 = 1
invariant :i9:u91:p_1_41 + i9:u91:r_1_41 = 1
invariant :i5:u26:p_0_26 + i5:u26:r_0_26 + -1'i5:u76:r_1_26 = 0
invariant :i8:u89:p_1_39 + i8:u89:r_1_39 = 1
invariant :i9:u94:p_1_44 + i9:u94:r_1_44 = 1
invariant :i4:u71:p_1_21 + i4:u71:r_1_21 = 1
invariant :i5:u74:p_1_24 + i5:u74:r_1_24 = 1
invariant :i4:u68:p_1_18 + i4:u68:r_1_18 = 1
invariant :i2:u60:p_1_10 + i2:u60:r_1_10 = 1
invariant :i8:u39:p_0_39 + i8:u39:r_0_39 + -1'i8:u89:r_1_39 = 0
invariant :i9:u41:p_0_41 + i9:u41:r_0_41 + -1'i9:u91:r_1_41 = 0
invariant :i9:u44:p_0_44 + i9:u44:r_0_44 + -1'i9:u94:r_1_44 = 0
invariant :i3:u64:p_1_14 + i3:u64:r_1_14 = 1
invariant :i5:u73:p_1_23 + i5:u73:r_1_23 = 1
invariant :i6:u32:p_0_32 + i6:u32:r_0_32 + -1'i6:u82:r_1_32 = 0
invariant :i1:u56:p_1_6 + i1:u56:r_1_6 = 1
invariant :i8:u90:p_1_40 + i8:u90:r_1_40 = 1
invariant :i2:u62:p_1_12 + i2:u62:r_1_12 = 1
invariant :i9:u92:p_1_42 + i9:u92:r_1_42 = 1
invariant :i1:u6:p_0_6 + i1:u6:r_0_6 + -1'i1:u56:r_1_6 = 0
invariant :i4:u20:p_0_20 + i4:u20:r_0_20 + -1'i4:u70:r_1_20 = 0
invariant :i5:u23:p_0_23 + i5:u23:r_0_23 + -1'i5:u73:r_1_23 = 0
invariant :i10:u98:p_1_48 + i10:u98:r_1_48 = 1
invariant :i8:u36:p_0_36 + i8:u36:r_0_36 + -1'i8:u86:r_1_36 = 0
invariant :i10:u99:p_1_49 + i10:u99:r_1_49 = 1
invariant :i4:u21:p_0_21 + i4:u21:r_0_21 + -1'i4:u71:r_1_21 = 0
invariant :i0:u51:p_1_1 + i0:u51:r_1_1 = 1
invariant :i10:u48:p_0_48 + i10:u48:r_0_48 + -1'i10:u98:r_1_48 = 0
invariant :i2:u10:p_0_10 + i2:u10:r_0_10 + -1'i2:u60:r_1_10 = 0
invariant :i5:u72:p_1_22 + i5:u72:r_1_22 = 1
invariant :i2:u7:p_0_7 + i2:u7:r_0_7 + -1'i2:u57:r_1_7 = 0
invariant :i7:u35:p_0_35 + i7:u35:r_0_35 + -1'i7:u85:r_1_35 = 0
invariant :i3:u66:p_1_16 + i3:u66:r_1_16 = 1
invariant :i10:u96:p_1_46 + i10:u96:r_1_46 = 1
invariant :i0:u2:p_0_2 + i0:u2:r_0_2 + -1'i0:u52:r_1_2 = 0
invariant :i5:u25:p_0_25 + i5:u25:r_0_25 + -1'i5:u75:r_1_25 = 0
invariant :i9:u42:p_0_42 + i9:u42:r_0_42 + -1'i9:u92:r_1_42 = 0
invariant :i1:u3:p_0_3 + i1:u3:r_0_3 + -1'i1:u53:r_1_3 = 0
invariant :i6:u79:p_1_29 + i6:u79:r_1_29 = 1
invariant :i9:u43:p_0_43 + i9:u43:r_0_43 + -1'i9:u93:r_1_43 = 0
invariant :i9:u93:p_1_43 + i9:u93:r_1_43 = 1
invariant :i6:u82:p_1_32 + i6:u82:r_1_32 = 1
invariant :i8:u86:p_1_36 + i8:u86:r_1_36 = 1
invariant :i10:u46:p_0_46 + i10:u46:r_0_46 + -1'i10:u96:r_1_46 = 0
invariant :i7:u33:p_0_33 + i7:u33:r_0_33 + -1'i7:u83:r_1_33 = 0
invariant :i6:u28:p_0_28 + i6:u28:r_0_28 + -1'i6:u78:r_1_28 = 0
invariant :i3:u63:p_1_13 + i3:u63:r_1_13 = 1
invariant :i8:u38:p_0_38 + i8:u38:r_0_38 + -1'i8:u88:r_1_38 = 0
invariant :i8:u87:p_1_37 + i8:u87:r_1_37 = 1
invariant :i6:u77:p_1_27 + i6:u77:r_1_27 = 1
invariant :i2:u61:p_1_11 + i2:u61:r_1_11 = 1
invariant :i4:u70:p_1_20 + i4:u70:r_1_20 = 1
invariant :i0:u52:p_1_2 + i0:u52:r_1_2 = 1
invariant :i4:u19:p_0_19 + i4:u19:r_0_19 + -1'i4:u69:r_1_19 = 0
invariant :i8:u37:p_0_37 + i8:u37:r_0_37 + -1'i8:u87:r_1_37 = 0
invariant :i1:u55:p_1_5 + i1:u55:r_1_5 = 1
invariant :i3:u14:p_0_14 + i3:u14:r_0_14 + -1'i3:u64:r_1_14 = 0
invariant :i3:u16:p_0_16 + i3:u16:r_0_16 + -1'i3:u66:r_1_16 = 0
invariant :i6:u29:p_0_29 + i6:u29:r_0_29 + -1'i6:u79:r_1_29 = 0
invariant :i3:u65:p_1_15 + i3:u65:r_1_15 = 1
invariant :i5:u76:p_1_26 + i5:u76:r_1_26 = 1
invariant :i10:u95:p_1_45 + i10:u95:r_1_45 = 1
invariant :i4:u69:p_1_19 + i4:u69:r_1_19 = 1
invariant :i6:u81:p_1_31 + i6:u81:r_1_31 = 1
invariant :i2:u58:p_1_8 + i2:u58:r_1_8 = 1
invariant :i7:u34:p_0_34 + i7:u34:r_0_34 + -1'i7:u84:r_1_34 = 0
invariant :i6:u80:p_1_30 + i6:u80:r_1_30 = 1
invariant :i6:u78:p_1_28 + i6:u78:r_1_28 = 1
invariant :i2:u11:p_0_11 + i2:u11:r_0_11 + -1'i2:u61:r_1_11 = 0
invariant :i7:u85:p_1_35 + i7:u85:r_1_35 = 1
invariant :i2:u12:p_0_12 + i2:u12:r_0_12 + -1'i2:u62:r_1_12 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4158 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 71 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>(X((LTLAP0==true)))))U(<>(<>([]((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 227 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>([](<>((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 241 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP3==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 254 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP4==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 246 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 217 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([]([](X((LTLAP6==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 224 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((<>((LTLAP7==true)))U((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 373 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([](<>(X((LTLAP9==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 537 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 229 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((<>((LTLAP10==true)))U(X((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 378 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([]((X((LTLAP12==true)))U(X((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 386 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([]([](X((LTLAP14==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 378 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((((LTLAP1==true))U((LTLAP15==true)))U((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 227 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(<>([]((LTLAP17==true)))))U(<>(((LTLAP18==true))U((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 262 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP19==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 225 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP20==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 386 ms.
FORMULA ResAllocation-PT-R050C002-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1528326053795

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 11:00:31 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 06, 2018 11:00:31 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 11:00:32 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 395 ms
Jun 06, 2018 11:00:32 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 200 places.
Jun 06, 2018 11:00:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 102 transitions.
Jun 06, 2018 11:00:33 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 45 ms
Jun 06, 2018 11:00:33 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 06, 2018 11:00:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 156 ms
Jun 06, 2018 11:00:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 53 ms
Begin: Wed Jun 6 23:00:35 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Wed Jun 6 23:00:35 2018
network size: 200 nodes, 888 links, 204 weight
quality increased from -0.00587114 to 0.365177
end computation: Wed Jun 6 23:00:35 2018
level 1:
start computation: Wed Jun 6 23:00:35 2018
network size: 100 nodes, 592 links, 204 weight
quality increased from 0.365177 to 0.75817
end computation: Wed Jun 6 23:00:35 2018
level 2:
start computation: Wed Jun 6 23:00:35 2018
network size: 19 nodes, 55 links, 204 weight
quality increased from 0.75817 to 0.801743
end computation: Wed Jun 6 23:00:35 2018
level 3:
start computation: Wed Jun 6 23:00:35 2018
network size: 11 nodes, 31 links, 204 weight
quality increased from 0.801743 to 0.801743
end computation: Wed Jun 6 23:00:35 2018
End: Wed Jun 6 23:00:35 2018
Total duration: 0 sec
0.801743
Jun 06, 2018 11:00:36 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 06, 2018 11:00:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 32 ms
Jun 06, 2018 11:00:36 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 06, 2018 11:00:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 16 ms
Jun 06, 2018 11:00:36 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 06, 2018 11:00:37 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 102 transitions.
Jun 06, 2018 11:00:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 100 place invariants in 64 ms
Jun 06, 2018 11:00:38 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 200 variables to be positive in 512 ms
Jun 06, 2018 11:00:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 102 transitions.
Jun 06, 2018 11:00:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/102 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 11:00:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 8 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 11:00:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 102 transitions.
Jun 06, 2018 11:00:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 6 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 11:00:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 102 transitions.
Jun 06, 2018 11:00:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/102) took 1187 ms. Total solver calls (SAT/UNSAT): 100(100/0)
Jun 06, 2018 11:00:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 3461 ms. Total solver calls (SAT/UNSAT): 200(149/51)
Jun 06, 2018 11:00:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 102 transitions.
Jun 06, 2018 11:00:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 231 ms. Total solver calls (SAT/UNSAT): 150(0/150)
Jun 06, 2018 11:00:43 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6538ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R050C002"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R050C002.tgz
mv ResAllocation-PT-R050C002 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ResAllocation-PT-R050C002, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r189-qhx2-152732141000156"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;