Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................................................................
/home/mcc/execution
total 240K
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.8K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.5K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 72K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is QuasiCertifProtocol-COL-10, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r189-qhx2-152732140800045
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-00
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-01
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-02
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-03
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-04
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-05
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-06
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-07
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-08
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-09
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-10
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-11
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-12
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-13
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-14
FORMULA_NAME QuasiCertifProtocol-COL-10-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1528312369690

19:13:14.205 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
19:13:14.211 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(X(F(G("(a3_0<=a4_0)"))))))
Formula 0 simplified : !GXFG"(a3_0<=a4_0)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 176 rows 550 cols
invariant :n7_8 + -1'n7_10 + -1'Cstart_8 + Cstart_10 = 0
invariant :n7_78 + -1'n7_87 + -1'Cstart_1 + Cstart_10 = 0
invariant :n7_18 + -1'n7_21 + -1'Cstart_7 + Cstart_10 = 0
invariant :n9_10 + -1'SstopOK_0 + CstopOK_10 = 0
invariant :AstopAbort_0 + a5_0 + a4_0 + a3_0 + a2_0 + a1_0 + Astart_0 + AstopOK_0 = 1
invariant :n8_99 + -1'n8_109 + Cstart_0 + -1'Cstart_10 = 0
invariant :n8_97 + -1'n8_98 + Cstart_9 + -1'Cstart_10 = 0
invariant :n8_72 + -1'n8_76 + Cstart_6 + -1'Cstart_10 = 0
invariant :n7_112 + -1'n7_120 + -1'Cstart_2 + Cstart_10 = 0
invariant :n7_67 + -1'n7_76 + -1'Cstart_1 + Cstart_10 = 0
invariant :n8_67 + -1'n8_76 + Cstart_1 + -1'Cstart_10 = 0
invariant :n8_51 + -1'n8_54 + Cstart_7 + -1'Cstart_10 = 0
invariant :n9_9 + -1'SstopOK_0 + CstopOK_9 = 0
invariant :n9_113 + -1'SstopOK_10 + CstopOK_3 = 0
invariant :n7_58 + -1'n7_65 + -1'Cstart_3 + Cstart_10 = 0
invariant :n7_46 + -1'n7_54 + -1'Cstart_2 + Cstart_10 = 0
invariant :n7_48 + -1'n7_54 + -1'Cstart_4 + Cstart_10 = 0
invariant :n7_97 + -1'n7_98 + -1'Cstart_9 + Cstart_10 = 0
invariant :n9_88 + -1'SstopOK_8 + CstopOK_0 = 0
invariant :n7_55 + -1'n7_65 + -1'Cstart_0 + Cstart_10 = 0
invariant :n7_93 + -1'n7_98 + -1'Cstart_5 + Cstart_10 = 0
invariant :n9_16 + -1'SstopOK_1 + CstopOK_5 = 0
invariant :n9_22 + -1'SstopOK_2 + CstopOK_0 = 0
invariant :n7_104 + -1'n7_109 + -1'Cstart_5 + Cstart_10 = 0
invariant :n9_19 + -1'SstopOK_1 + CstopOK_8 = 0
invariant :n7_19 + -1'n7_21 + -1'Cstart_8 + Cstart_10 = 0
invariant :n7_34 + -1'n7_43 + -1'Cstart_1 + Cstart_10 = 0
invariant :n9_26 + -1'SstopOK_2 + CstopOK_4 = 0
invariant :n8_13 + -1'n8_21 + Cstart_2 + -1'Cstart_10 = 0
invariant :n8_52 + -1'n8_54 + Cstart_8 + -1'Cstart_10 = 0
invariant :n9_71 + -1'SstopOK_6 + CstopOK_5 = 0
invariant :n4_7 + -1'n4_10 + n3_7 + -1'n3_10 = 0
invariant :n8_39 + -1'n8_43 + Cstart_6 + -1'Cstart_10 = 0
invariant :n9_21 + -1'SstopOK_1 + CstopOK_10 = 0
invariant :n8_56 + -1'n8_65 + Cstart_1 + -1'Cstart_10 = 0
invariant :n8_60 + -1'n8_65 + Cstart_5 + -1'Cstart_10 = 0
invariant :n9_108 + -1'SstopOK_9 + CstopOK_9 = 0
invariant :n7_26 + -1'n7_32 + -1'Cstart_4 + Cstart_10 = 0
invariant :SstopAbort_0 + Sstart_0 + Sstart_1 + Sstart_2 + Sstart_3 + Sstart_4 + Sstart_5 + Sstart_6 + Sstart_7 + Sstart_8 + Sstart_9 + Sstart_10 + s2_0 + s2_1 + s2_2 + s2_3 + s2_4 + s2_5 + s2_6 + s2_7 + s2_8 + s2_9 + s2_10 + s3_0 + s3_1 + s3_2 + s3_3 + s3_4 + s3_5 + s3_6 + s3_7 + s3_8 + s3_9 + s3_10 + s4_0 + s4_1 + s4_2 + s4_3 + s4_4 + s4_5 + s4_6 + s4_7 + s4_8 + s4_9 + s4_10 + s5_0 + s5_1 + s5_2 + s5_3 + s5_4 + s5_5 + s5_6 + s5_7 + s5_8 + s5_9 + s5_10 + s6_0 + s6_1 + s6_2 + s6_3 + s6_4 + s6_5 + s6_6 + s6_7 + s6_8 + s6_9 + s6_10 + SstopOK_0 + SstopOK_1 + SstopOK_2 + SstopOK_3 + SstopOK_4 + SstopOK_5 + SstopOK_6 + SstopOK_7 + SstopOK_8 + SstopOK_9 + SstopOK_10 = 11
invariant :n8_79 + -1'n8_87 + Cstart_2 + -1'Cstart_10 = 0
invariant :n7_56 + -1'n7_65 + -1'Cstart_1 + Cstart_10 = 0
invariant :n9_36 + -1'SstopOK_3 + CstopOK_3 = 0
invariant :n9_2 + -1'SstopOK_0 + CstopOK_2 = 0
invariant :n8_96 + -1'n8_98 + Cstart_8 + -1'Cstart_10 = 0
invariant :n8_26 + -1'n8_32 + Cstart_4 + -1'Cstart_10 = 0
invariant :n7_95 + -1'n7_98 + -1'Cstart_7 + Cstart_10 = 0
invariant :n7_31 + -1'n7_32 + -1'Cstart_9 + Cstart_10 = 0
invariant :n9_31 + -1'SstopOK_2 + CstopOK_9 = 0
invariant :n7_83 + -1'n7_87 + -1'Cstart_6 + Cstart_10 = 0
invariant :n9_101 + -1'SstopOK_9 + CstopOK_2 = 0
invariant :n7_114 + -1'n7_120 + -1'Cstart_4 + Cstart_10 = 0
invariant :n9_74 + -1'SstopOK_6 + CstopOK_8 = 0
invariant :n4_2 + -1'n4_10 + n3_2 + -1'n3_10 = 0
invariant :n8_78 + -1'n8_87 + Cstart_1 + -1'Cstart_10 = 0
invariant :n9_76 + -1'SstopOK_6 + CstopOK_10 = 0
invariant :n7_99 + -1'n7_109 + -1'Cstart_0 + Cstart_10 = 0
invariant :n8_40 + -1'n8_43 + Cstart_7 + -1'Cstart_10 = 0
invariant :n8_77 + -1'n8_87 + Cstart_0 + -1'Cstart_10 = 0
invariant :n7_116 + -1'n7_120 + -1'Cstart_6 + Cstart_10 = 0
invariant :n9_12 + -1'SstopOK_1 + CstopOK_1 = 0
invariant :n8_11 + -1'n8_21 + Cstart_0 + -1'Cstart_10 = 0
invariant :n9_4 + -1'SstopOK_0 + CstopOK_4 = 0
invariant :n7_96 + -1'n7_98 + -1'Cstart_8 + Cstart_10 = 0
invariant :n9_13 + -1'SstopOK_1 + CstopOK_2 = 0
invariant :n7_72 + -1'n7_76 + -1'Cstart_6 + Cstart_10 = 0
invariant :n7_5 + -1'n7_10 + -1'Cstart_5 + Cstart_10 = 0
invariant :n8_88 + -1'n8_98 + Cstart_0 + -1'Cstart_10 = 0
invariant :n8_107 + -1'n8_109 + Cstart_8 + -1'Cstart_10 = 0
invariant :n7_36 + -1'n7_43 + -1'Cstart_3 + Cstart_10 = 0
invariant :n7_0 + -1'n7_10 + -1'Cstart_0 + Cstart_10 = 0
invariant :n9_8 + -1'SstopOK_0 + CstopOK_8 = 0
invariant :n8_68 + -1'n8_76 + Cstart_2 + -1'Cstart_10 = 0
invariant :n7_63 + -1'n7_65 + -1'Cstart_8 + Cstart_10 = 0
invariant :n8_75 + -1'n8_76 + Cstart_9 + -1'Cstart_10 = 0
invariant :n7_23 + -1'n7_32 + -1'Cstart_1 + Cstart_10 = 0
invariant :n7_66 + -1'n7_76 + -1'Cstart_0 + Cstart_10 = 0
invariant :n2_2 + -1'n2_10 + n1_2 + -1'n1_10 = 0
invariant :n9_111 + -1'SstopOK_10 + CstopOK_1 = 0
invariant :n7_69 + -1'n7_76 + -1'Cstart_3 + Cstart_10 = 0
invariant :n8_9 + -1'n8_10 + Cstart_9 + -1'Cstart_10 = 0
invariant :n2_0 + -1'n2_10 + n1_0 + -1'n1_10 = 0
invariant :n7_59 + -1'n7_65 + -1'Cstart_4 + Cstart_10 = 0
invariant :n6_8 + -1'n6_10 + n5_8 + -1'n5_10 = 0
invariant :n7_70 + -1'n7_76 + -1'Cstart_4 + Cstart_10 = 0
invariant :n9_72 + -1'SstopOK_6 + CstopOK_6 = 0
invariant :n9_30 + -1'SstopOK_2 + CstopOK_8 = 0
invariant :n7_113 + -1'n7_120 + -1'Cstart_3 + Cstart_10 = 0
invariant :n9_118 + -1'SstopOK_10 + CstopOK_8 = 0
invariant :n8_55 + -1'n8_65 + Cstart_0 + -1'Cstart_10 = 0
invariant :n7_118 + -1'n7_120 + -1'Cstart_8 + Cstart_10 = 0
invariant :n8_44 + -1'n8_54 + Cstart_0 + -1'Cstart_10 = 0
invariant :n7_25 + -1'n7_32 + -1'Cstart_3 + Cstart_10 = 0
invariant :n7_33 + -1'n7_43 + -1'Cstart_0 + Cstart_10 = 0
invariant :n8_22 + -1'n8_32 + Cstart_0 + -1'Cstart_10 = 0
invariant :n9_11 + -1'SstopOK_1 + CstopOK_0 = 0
invariant :n8_115 + -1'n8_120 + Cstart_5 + -1'Cstart_10 = 0
invariant :n8_25 + -1'n8_32 + Cstart_3 + -1'Cstart_10 = 0
invariant :n9_0 + -1'SstopOK_0 + CstopOK_0 = 0
invariant :n8_45 + -1'n8_54 + Cstart_1 + -1'Cstart_10 = 0
invariant :n7_61 + -1'n7_65 + -1'Cstart_6 + Cstart_10 = 0
invariant :n9_96 + -1'SstopOK_8 + CstopOK_8 = 0
invariant :n7_101 + -1'n7_109 + -1'Cstart_2 + Cstart_10 = 0
invariant :n9_45 + -1'SstopOK_4 + CstopOK_1 = 0
invariant :n7_2 + -1'n7_10 + -1'Cstart_2 + Cstart_10 = 0
invariant :n9_112 + -1'SstopOK_10 + CstopOK_2 = 0
invariant :n7_52 + -1'n7_54 + -1'Cstart_8 + Cstart_10 = 0
invariant :n9_80 + -1'SstopOK_7 + CstopOK_3 = 0
invariant :n7_1 + -1'n7_10 + -1'Cstart_1 + Cstart_10 = 0
invariant :n8_2 + -1'n8_10 + Cstart_2 + -1'Cstart_10 = 0
invariant :n8_58 + -1'n8_65 + Cstart_3 + -1'Cstart_10 = 0
invariant :n9_87 + -1'SstopOK_7 + CstopOK_10 = 0
invariant :n7_84 + -1'n7_87 + -1'Cstart_7 + Cstart_10 = 0
invariant :n6_7 + -1'n6_10 + n5_7 + -1'n5_10 = 0
invariant :n7_30 + -1'n7_32 + -1'Cstart_8 + Cstart_10 = 0
invariant :n9_34 + -1'SstopOK_3 + CstopOK_1 = 0
invariant :n6_3 + -1'n6_10 + n5_3 + -1'n5_10 = 0
invariant :n8_69 + -1'n8_76 + Cstart_3 + -1'Cstart_10 = 0
invariant :n8_18 + -1'n8_21 + Cstart_7 + -1'Cstart_10 = 0
invariant :n7_88 + -1'n7_98 + -1'Cstart_0 + Cstart_10 = 0
invariant :n8_7 + -1'n8_10 + Cstart_7 + -1'Cstart_10 = 0
invariant :n6_2 + -1'n6_10 + n5_2 + -1'n5_10 = 0
invariant :n9_5 + -1'SstopOK_0 + CstopOK_5 = 0
invariant :n9_25 + -1'SstopOK_2 + CstopOK_3 = 0
invariant :n9_91 + -1'SstopOK_8 + CstopOK_3 = 0
invariant :n8_42 + -1'n8_43 + Cstart_9 + -1'Cstart_10 = 0
invariant :n9_115 + -1'SstopOK_10 + CstopOK_5 = 0
invariant :n9_29 + -1'SstopOK_2 + CstopOK_7 = 0
invariant :n9_40 + -1'SstopOK_3 + CstopOK_7 = 0
invariant :n7_103 + -1'n7_109 + -1'Cstart_4 + Cstart_10 = 0
invariant :n4_0 + -1'n4_10 + n3_0 + -1'n3_10 = 0
invariant :n9_62 + -1'SstopOK_5 + CstopOK_7 = 0
invariant :n9_70 + -1'SstopOK_6 + CstopOK_4 = 0
invariant :n8_89 + -1'n8_98 + Cstart_1 + -1'Cstart_10 = 0
invariant :n9_56 + -1'SstopOK_5 + CstopOK_1 = 0
invariant :n8_70 + -1'n8_76 + Cstart_4 + -1'Cstart_10 = 0
invariant :n8_1 + -1'n8_10 + Cstart_1 + -1'Cstart_10 = 0
invariant :n8_112 + -1'n8_120 + Cstart_2 + -1'Cstart_10 = 0
invariant :n7_94 + -1'n7_98 + -1'Cstart_6 + Cstart_10 = 0
invariant :n9_63 + -1'SstopOK_5 + CstopOK_8 = 0
invariant :n8_71 + -1'n8_76 + Cstart_5 + -1'Cstart_10 = 0
invariant :n8_73 + -1'n8_76 + Cstart_7 + -1'Cstart_10 = 0
invariant :n7_90 + -1'n7_98 + -1'Cstart_2 + Cstart_10 = 0
invariant :n7_35 + -1'n7_43 + -1'Cstart_2 + Cstart_10 = 0
invariant :n9_67 + -1'SstopOK_6 + CstopOK_1 = 0
invariant :n8_37 + -1'n8_43 + Cstart_4 + -1'Cstart_10 = 0
invariant :n9_84 + -1'SstopOK_7 + CstopOK_7 = 0
invariant :n7_68 + -1'n7_76 + -1'Cstart_2 + Cstart_10 = 0
invariant :n9_47 + -1'SstopOK_4 + CstopOK_3 = 0
invariant :n9_75 + -1'SstopOK_6 + CstopOK_9 = 0
invariant :n4_9 + -1'n4_10 + n3_9 + -1'n3_10 = 0
invariant :n7_115 + -1'n7_120 + -1'Cstart_5 + Cstart_10 = 0
invariant :n8_114 + -1'n8_120 + Cstart_4 + -1'Cstart_10 = 0
invariant :n9_35 + -1'SstopOK_3 + CstopOK_2 = 0
invariant :n8_116 + -1'n8_120 + Cstart_6 + -1'Cstart_10 = 0
invariant :n9_78 + -1'SstopOK_7 + CstopOK_1 = 0
invariant :n9_94 + -1'SstopOK_8 + CstopOK_6 = 0
invariant :n8_80 + -1'n8_87 + Cstart_3 + -1'Cstart_10 = 0
invariant :n8_59 + -1'n8_65 + Cstart_4 + -1'Cstart_10 = 0
invariant :n8_30 + -1'n8_32 + Cstart_8 + -1'Cstart_10 = 0
invariant :n8_49 + -1'n8_54 + Cstart_5 + -1'Cstart_10 = 0
invariant :n7_9 + -1'n7_10 + -1'Cstart_9 + Cstart_10 = 0
invariant :n8_35 + -1'n8_43 + Cstart_2 + -1'Cstart_10 = 0
invariant :n8_28 + -1'n8_32 + Cstart_6 + -1'Cstart_10 = 0
invariant :n2_5 + -1'n2_10 + n1_5 + -1'n1_10 = 0
invariant :n7_105 + -1'n7_109 + -1'Cstart_6 + Cstart_10 = 0
invariant :n8_57 + -1'n8_65 + Cstart_2 + -1'Cstart_10 = 0
invariant :n9_33 + -1'SstopOK_3 + CstopOK_0 = 0
invariant :n9_64 + -1'SstopOK_5 + CstopOK_9 = 0
invariant :n9_18 + -1'SstopOK_1 + CstopOK_7 = 0
invariant :n8_24 + -1'n8_32 + Cstart_2 + -1'Cstart_10 = 0
invariant :n9_49 + -1'SstopOK_4 + CstopOK_5 = 0
invariant :n7_110 + -1'n7_120 + -1'Cstart_0 + Cstart_10 = 0
invariant :n4_1 + -1'n4_10 + n3_1 + -1'n3_10 = 0
invariant :n9_48 + -1'SstopOK_4 + CstopOK_4 = 0
invariant :n4_4 + -1'n4_10 + n3_4 + -1'n3_10 = 0
invariant :n9_17 + -1'SstopOK_1 + CstopOK_6 = 0
invariant :n9_97 + -1'SstopOK_8 + CstopOK_9 = 0
invariant :n8_86 + -1'n8_87 + Cstart_9 + -1'Cstart_10 = 0
invariant :n8_41 + -1'n8_43 + Cstart_8 + -1'Cstart_10 = 0
invariant :n9_79 + -1'SstopOK_7 + CstopOK_2 = 0
invariant :n4_3 + -1'n4_10 + n3_3 + -1'n3_10 = 0
invariant :n7_111 + -1'n7_120 + -1'Cstart_1 + Cstart_10 = 0
invariant :n9_59 + -1'SstopOK_5 + CstopOK_4 = 0
invariant :n8_34 + -1'n8_43 + Cstart_1 + -1'Cstart_10 = 0
invariant :n7_64 + -1'n7_65 + -1'Cstart_9 + Cstart_10 = 0
invariant :n9_86 + -1'SstopOK_7 + CstopOK_9 = 0
invariant :n7_11 + -1'n7_21 + -1'Cstart_0 + Cstart_10 = 0
invariant :n7_42 + -1'n7_43 + -1'Cstart_9 + Cstart_10 = 0
invariant :n9_24 + -1'SstopOK_2 + CstopOK_2 = 0
invariant :n9_117 + -1'SstopOK_10 + CstopOK_7 = 0
invariant :n6_6 + -1'n6_10 + n5_6 + -1'n5_10 = 0
invariant :malicious_reservoir_0 + -1'c1_0 + -1'c1_1 + -1'c1_2 + -1'c1_3 + -1'c1_4 + -1'c1_5 + -1'c1_6 + -1'c1_7 + -1'c1_8 + -1'c1_9 + -1'c1_10 + -1'Cstart_0 + -1'Cstart_1 + -1'Cstart_2 + -1'Cstart_3 + -1'Cstart_4 + -1'Cstart_5 + -1'Cstart_6 + -1'Cstart_7 + -1'Cstart_8 + -1'Cstart_9 + -1'Cstart_10 + -1'Sstart_0 + -1'Sstart_1 + -1'Sstart_2 + -1'Sstart_3 + -1'Sstart_4 + -1'Sstart_5 + -1'Sstart_6 + -1'Sstart_7 + -1'Sstart_8 + -1'Sstart_9 + -1'Sstart_10 + -1's2_0 + -1's2_1 + -1's2_2 + -1's2_3 + -1's2_4 + -1's2_5 + -1's2_6 + -1's2_7 + -1's2_8 + -1's2_9 + -1's2_10 + -1's3_0 + -1's3_1 + -1's3_2 + -1's3_3 + -1's3_4 + -1's3_5 + -1's3_6 + -1's3_7 + -1's3_8 + -1's3_9 + -1's3_10 + -1's4_0 + -1's4_1 + -1's4_2 + -1's4_3 + -1's4_4 + -1's4_5 + -1's4_6 + -1's4_7 + -1's4_8 + -1's4_9 + -1's4_10 + -1's5_0 + -1's5_1 + -1's5_2 + -1's5_3 + -1's5_4 + -1's5_5 + -1's5_6 + -1's5_7 + -1's5_8 + -1's5_9 + -1's5_10 + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_4 + -1's6_5 + -1's6_6 + -1's6_7 + -1's6_8 + -1's6_9 + -1's6_10 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_4 + -1'SstopOK_5 + -1'SstopOK_6 + -1'SstopOK_7 + -1'SstopOK_8 + -1'SstopOK_9 + -1'SstopOK_10 + -1'CstopOK_0 + -1'CstopOK_1 + -1'CstopOK_2 + -1'CstopOK_3 + -1'CstopOK_4 + -1'CstopOK_5 + -1'CstopOK_6 + -1'CstopOK_7 + -1'CstopOK_8 + -1'CstopOK_9 + -1'CstopOK_10 = -16
invariant :n8_3 + -1'n8_10 + Cstart_3 + -1'Cstart_10 = 0
invariant :n9_41 + -1'SstopOK_3 + CstopOK_8 = 0
invariant :n7_71 + -1'n7_76 + -1'Cstart_5 + Cstart_10 = 0
invariant :n9_1 + -1'SstopOK_0 + CstopOK_1 = 0
invariant :n8_20 + -1'n8_21 + Cstart_9 + -1'Cstart_10 = 0
invariant :n8_104 + -1'n8_109 + Cstart_5 + -1'Cstart_10 = 0
invariant :n7_22 + -1'n7_32 + -1'Cstart_0 + Cstart_10 = 0
invariant :n7_50 + -1'n7_54 + -1'Cstart_6 + Cstart_10 = 0
invariant :n9_46 + -1'SstopOK_4 + CstopOK_2 = 0
invariant :n8_110 + -1'n8_120 + Cstart_0 + -1'Cstart_10 = 0
invariant :n8_5 + -1'n8_10 + Cstart_5 + -1'Cstart_10 = 0
invariant :n7_15 + -1'n7_21 + -1'Cstart_4 + Cstart_10 = 0
invariant :n8_95 + -1'n8_98 + Cstart_7 + -1'Cstart_10 = 0
invariant :n9_23 + -1'SstopOK_2 + CstopOK_1 = 0
invariant :n9_89 + -1'SstopOK_8 + CstopOK_1 = 0
invariant :n9_44 + -1'SstopOK_4 + CstopOK_0 = 0
invariant :n2_9 + -1'n2_10 + n1_9 + -1'n1_10 = 0
invariant :n8_119 + -1'n8_120 + Cstart_9 + -1'Cstart_10 = 0
invariant :n7_79 + -1'n7_87 + -1'Cstart_2 + Cstart_10 = 0
invariant :n9_77 + -1'SstopOK_7 + CstopOK_0 = 0
invariant :n8_0 + -1'n8_10 + Cstart_0 + -1'Cstart_10 = 0
invariant :n7_60 + -1'n7_65 + -1'Cstart_5 + Cstart_10 = 0
invariant :n9_39 + -1'SstopOK_3 + CstopOK_6 = 0
invariant :n7_89 + -1'n7_98 + -1'Cstart_1 + Cstart_10 = 0
invariant :n7_38 + -1'n7_43 + -1'Cstart_5 + Cstart_10 = 0
invariant :n8_83 + -1'n8_87 + Cstart_6 + -1'Cstart_10 = 0
invariant :n7_12 + -1'n7_21 + -1'Cstart_1 + Cstart_10 = 0
invariant :n7_45 + -1'n7_54 + -1'Cstart_1 + Cstart_10 = 0
invariant :n9_103 + -1'SstopOK_9 + CstopOK_4 = 0
invariant :n7_81 + -1'n7_87 + -1'Cstart_4 + Cstart_10 = 0
invariant :n7_28 + -1'n7_32 + -1'Cstart_6 + Cstart_10 = 0
invariant :n7_75 + -1'n7_76 + -1'Cstart_9 + Cstart_10 = 0
invariant :n7_62 + -1'n7_65 + -1'Cstart_7 + Cstart_10 = 0
invariant :n7_6 + -1'n7_10 + -1'Cstart_6 + Cstart_10 = 0
invariant :n8_113 + -1'n8_120 + Cstart_3 + -1'Cstart_10 = 0
invariant :n8_117 + -1'n8_120 + Cstart_7 + -1'Cstart_10 = 0
invariant :n4_6 + -1'n4_10 + n3_6 + -1'n3_10 = 0
invariant :n8_108 + -1'n8_109 + Cstart_9 + -1'Cstart_10 = 0
invariant :n7_82 + -1'n7_87 + -1'Cstart_5 + Cstart_10 = 0
invariant :n8_36 + -1'n8_43 + Cstart_3 + -1'Cstart_10 = 0
invariant :n7_47 + -1'n7_54 + -1'Cstart_3 + Cstart_10 = 0
invariant :n8_27 + -1'n8_32 + Cstart_5 + -1'Cstart_10 = 0
invariant :n9_82 + -1'SstopOK_7 + CstopOK_5 = 0
invariant :n7_57 + -1'n7_65 + -1'Cstart_2 + Cstart_10 = 0
invariant :n9_43 + -1'SstopOK_3 + CstopOK_10 = 0
invariant :n9_106 + -1'SstopOK_9 + CstopOK_7 = 0
invariant :n8_38 + -1'n8_43 + Cstart_5 + -1'Cstart_10 = 0
invariant :n8_64 + -1'n8_65 + Cstart_9 + -1'Cstart_10 = 0
invariant :n9_107 + -1'SstopOK_9 + CstopOK_8 = 0
invariant :n7_53 + -1'n7_54 + -1'Cstart_9 + Cstart_10 = 0
invariant :n8_29 + -1'n8_32 + Cstart_7 + -1'Cstart_10 = 0
invariant :n7_17 + -1'n7_21 + -1'Cstart_6 + Cstart_10 = 0
invariant :n9_83 + -1'SstopOK_7 + CstopOK_6 = 0
invariant :n8_94 + -1'n8_98 + Cstart_6 + -1'Cstart_10 = 0
invariant :n9_69 + -1'SstopOK_6 + CstopOK_3 = 0
invariant :n7_29 + -1'n7_32 + -1'Cstart_7 + Cstart_10 = 0
invariant :n7_74 + -1'n7_76 + -1'Cstart_8 + Cstart_10 = 0
invariant :n8_47 + -1'n8_54 + Cstart_3 + -1'Cstart_10 = 0
invariant :n8_23 + -1'n8_32 + Cstart_1 + -1'Cstart_10 = 0
invariant :n6_9 + -1'n6_10 + n5_9 + -1'n5_10 = 0
invariant :n7_4 + -1'n7_10 + -1'Cstart_4 + Cstart_10 = 0
invariant :n9_68 + -1'SstopOK_6 + CstopOK_2 = 0
invariant :n8_8 + -1'n8_10 + Cstart_8 + -1'Cstart_10 = 0
invariant :n4_8 + -1'n4_10 + n3_8 + -1'n3_10 = 0
invariant :n9_104 + -1'SstopOK_9 + CstopOK_5 = 0
invariant :n9_15 + -1'SstopOK_1 + CstopOK_4 = 0
invariant :n9_85 + -1'SstopOK_7 + CstopOK_8 = 0
invariant :n8_118 + -1'n8_120 + Cstart_8 + -1'Cstart_10 = 0
invariant :n8_31 + -1'n8_32 + Cstart_9 + -1'Cstart_10 = 0
invariant :n9_37 + -1'SstopOK_3 + CstopOK_4 = 0
invariant :n8_4 + -1'n8_10 + Cstart_4 + -1'Cstart_10 = 0
invariant :n8_62 + -1'n8_65 + Cstart_7 + -1'Cstart_10 = 0
invariant :n7_13 + -1'n7_21 + -1'Cstart_2 + Cstart_10 = 0
invariant :n8_61 + -1'n8_65 + Cstart_6 + -1'Cstart_10 = 0
invariant :n8_66 + -1'n8_76 + Cstart_0 + -1'Cstart_10 = 0
invariant :n9_61 + -1'SstopOK_5 + CstopOK_6 = 0
invariant :CstopAbort_0 + c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + c1_7 + c1_8 + c1_9 + c1_10 + Cstart_0 + Cstart_1 + Cstart_2 + Cstart_3 + Cstart_4 + Cstart_5 + Cstart_6 + Cstart_7 + Cstart_8 + Cstart_9 + Cstart_10 + CstopOK_0 + CstopOK_1 + CstopOK_2 + CstopOK_3 + CstopOK_4 + CstopOK_5 + CstopOK_6 + CstopOK_7 + CstopOK_8 + CstopOK_9 + CstopOK_10 = 11
invariant :n2_8 + -1'n2_10 + n1_8 + -1'n1_10 = 0
invariant :n7_77 + -1'n7_87 + -1'Cstart_0 + Cstart_10 = 0
invariant :n9_58 + -1'SstopOK_5 + CstopOK_3 = 0
invariant :n7_14 + -1'n7_21 + -1'Cstart_3 + Cstart_10 = 0
invariant :n7_91 + -1'n7_98 + -1'Cstart_3 + Cstart_10 = 0
invariant :n6_4 + -1'n6_10 + n5_4 + -1'n5_10 = 0
invariant :n8_50 + -1'n8_54 + Cstart_6 + -1'Cstart_10 = 0
invariant :n8_103 + -1'n8_109 + Cstart_4 + -1'Cstart_10 = 0
invariant :n7_86 + -1'n7_87 + -1'Cstart_9 + Cstart_10 = 0
invariant :n7_16 + -1'n7_21 + -1'Cstart_5 + Cstart_10 = 0
invariant :n7_40 + -1'n7_43 + -1'Cstart_7 + Cstart_10 = 0
invariant :n9_14 + -1'SstopOK_1 + CstopOK_3 = 0
invariant :n8_84 + -1'n8_87 + Cstart_7 + -1'Cstart_10 = 0
invariant :n8_19 + -1'n8_21 + Cstart_8 + -1'Cstart_10 = 0
invariant :n9_32 + -1'SstopOK_2 + CstopOK_10 = 0
invariant :n8_102 + -1'n8_109 + Cstart_3 + -1'Cstart_10 = 0
invariant :n9_50 + -1'SstopOK_4 + CstopOK_6 = 0
invariant :n2_4 + -1'n2_10 + n1_4 + -1'n1_10 = 0
invariant :n7_119 + -1'n7_120 + -1'Cstart_9 + Cstart_10 = 0
invariant :n8_106 + -1'n8_109 + Cstart_7 + -1'Cstart_10 = 0
invariant :n8_63 + -1'n8_65 + Cstart_8 + -1'Cstart_10 = 0
invariant :n9_55 + -1'SstopOK_5 + CstopOK_0 = 0
invariant :n9_7 + -1'SstopOK_0 + CstopOK_7 = 0
invariant :n8_101 + -1'n8_109 + Cstart_2 + -1'Cstart_10 = 0
invariant :n8_93 + -1'n8_98 + Cstart_5 + -1'Cstart_10 = 0
invariant :n8_46 + -1'n8_54 + Cstart_2 + -1'Cstart_10 = 0
invariant :n8_16 + -1'n8_21 + Cstart_5 + -1'Cstart_10 = 0
invariant :n7_44 + -1'n7_54 + -1'Cstart_0 + Cstart_10 = 0
invariant :n7_39 + -1'n7_43 + -1'Cstart_6 + Cstart_10 = 0
invariant :n8_53 + -1'n8_54 + Cstart_9 + -1'Cstart_10 = 0
invariant :n9_53 + -1'SstopOK_4 + CstopOK_9 = 0
invariant :n8_14 + -1'n8_21 + Cstart_3 + -1'Cstart_10 = 0
invariant :n9_54 + -1'SstopOK_4 + CstopOK_10 = 0
invariant :n9_73 + -1'SstopOK_6 + CstopOK_7 = 0
invariant :n7_117 + -1'n7_120 + -1'Cstart_7 + Cstart_10 = 0
invariant :n7_27 + -1'n7_32 + -1'Cstart_5 + Cstart_10 = 0
invariant :n8_111 + -1'n8_120 + Cstart_1 + -1'Cstart_10 = 0
invariant :n9_65 + -1'SstopOK_5 + CstopOK_10 = 0
invariant :n8_74 + -1'n8_76 + Cstart_8 + -1'Cstart_10 = 0
invariant :n7_73 + -1'n7_76 + -1'Cstart_7 + Cstart_10 = 0
invariant :n8_100 + -1'n8_109 + Cstart_1 + -1'Cstart_10 = 0
invariant :n8_17 + -1'n8_21 + Cstart_6 + -1'Cstart_10 = 0
invariant :n7_51 + -1'n7_54 + -1'Cstart_7 + Cstart_10 = 0
invariant :n9_99 + -1'SstopOK_9 + CstopOK_0 = 0
invariant :n9_110 + -1'SstopOK_10 + CstopOK_0 = 0
invariant :n2_6 + -1'n2_10 + n1_6 + -1'n1_10 = 0
invariant :n9_51 + -1'SstopOK_4 + CstopOK_7 = 0
invariant :n9_28 + -1'SstopOK_2 + CstopOK_6 = 0
invariant :n7_106 + -1'n7_109 + -1'Cstart_7 + Cstart_10 = 0
invariant :n8_81 + -1'n8_87 + Cstart_4 + -1'Cstart_10 = 0
invariant :n9_114 + -1'SstopOK_10 + CstopOK_4 = 0
invariant :n8_15 + -1'n8_21 + Cstart_4 + -1'Cstart_10 = 0
invariant :n9_109 + -1'SstopOK_9 + CstopOK_10 = 0
invariant :n8_91 + -1'n8_98 + Cstart_3 + -1'Cstart_10 = 0
invariant :n9_38 + -1'SstopOK_3 + CstopOK_5 = 0
invariant :n7_85 + -1'n7_87 + -1'Cstart_8 + Cstart_10 = 0
invariant :n8_82 + -1'n8_87 + Cstart_5 + -1'Cstart_10 = 0
invariant :n6_0 + -1'n6_10 + n5_0 + -1'n5_10 = 0
invariant :n8_48 + -1'n8_54 + Cstart_4 + -1'Cstart_10 = 0
invariant :n8_90 + -1'n8_98 + Cstart_2 + -1'Cstart_10 = 0
invariant :n7_7 + -1'n7_10 + -1'Cstart_7 + Cstart_10 = 0
invariant :n9_3 + -1'SstopOK_0 + CstopOK_3 = 0
invariant :n2_7 + -1'n2_10 + n1_7 + -1'n1_10 = 0
invariant :n8_6 + -1'n8_10 + Cstart_6 + -1'Cstart_10 = 0
invariant :n7_102 + -1'n7_109 + -1'Cstart_3 + Cstart_10 = 0
invariant :n8_92 + -1'n8_98 + Cstart_4 + -1'Cstart_10 = 0
invariant :n7_92 + -1'n7_98 + -1'Cstart_4 + Cstart_10 = 0
invariant :n7_80 + -1'n7_87 + -1'Cstart_3 + Cstart_10 = 0
invariant :n9_93 + -1'SstopOK_8 + CstopOK_5 = 0
invariant :n7_49 + -1'n7_54 + -1'Cstart_5 + Cstart_10 = 0
invariant :n4_5 + -1'n4_10 + n3_5 + -1'n3_10 = 0
invariant :n9_119 + -1'SstopOK_10 + CstopOK_9 = 0
invariant :n6_1 + -1'n6_10 + n5_1 + -1'n5_10 = 0
invariant :n7_41 + -1'n7_43 + -1'Cstart_8 + Cstart_10 = 0
invariant :n9_100 + -1'SstopOK_9 + CstopOK_1 = 0
invariant :n9_66 + -1'SstopOK_6 + CstopOK_0 = 0
invariant :n2_1 + -1'n2_10 + n1_1 + -1'n1_10 = 0
invariant :n2_3 + -1'n2_10 + n1_3 + -1'n1_10 = 0
invariant :n9_92 + -1'SstopOK_8 + CstopOK_4 = 0
invariant :n9_57 + -1'SstopOK_5 + CstopOK_2 = 0
invariant :n9_27 + -1'SstopOK_2 + CstopOK_5 = 0
invariant :n8_105 + -1'n8_109 + Cstart_6 + -1'Cstart_10 = 0
invariant :n7_108 + -1'n7_109 + -1'Cstart_9 + Cstart_10 = 0
invariant :n9_81 + -1'SstopOK_7 + CstopOK_4 = 0
invariant :n9_6 + -1'SstopOK_0 + CstopOK_6 = 0
invariant :n9_102 + -1'SstopOK_9 + CstopOK_3 = 0
invariant :n8_12 + -1'n8_21 + Cstart_1 + -1'Cstart_10 = 0
invariant :n7_107 + -1'n7_109 + -1'Cstart_8 + Cstart_10 = 0
invariant :n7_3 + -1'n7_10 + -1'Cstart_3 + Cstart_10 = 0
invariant :n7_24 + -1'n7_32 + -1'Cstart_2 + Cstart_10 = 0
invariant :n7_20 + -1'n7_21 + -1'Cstart_9 + Cstart_10 = 0
invariant :n9_105 + -1'SstopOK_9 + CstopOK_6 = 0
invariant :n8_85 + -1'n8_87 + Cstart_8 + -1'Cstart_10 = 0
invariant :n9_60 + -1'SstopOK_5 + CstopOK_5 = 0
invariant :n6_5 + -1'n6_10 + n5_5 + -1'n5_10 = 0
invariant :n9_52 + -1'SstopOK_4 + CstopOK_8 = 0
invariant :n8_33 + -1'n8_43 + Cstart_0 + -1'Cstart_10 = 0
invariant :n9_120 + -1'SstopOK_10 + CstopOK_10 = 0
invariant :n9_20 + -1'SstopOK_1 + CstopOK_9 = 0
invariant :n7_100 + -1'n7_109 + -1'Cstart_1 + Cstart_10 = 0
invariant :n9_42 + -1'SstopOK_3 + CstopOK_9 = 0
invariant :n9_90 + -1'SstopOK_8 + CstopOK_2 = 0
invariant :n9_98 + -1'SstopOK_8 + CstopOK_10 = 0
invariant :n9_116 + -1'SstopOK_10 + CstopOK_6 = 0
invariant :n9_95 + -1'SstopOK_8 + CstopOK_7 = 0
invariant :n7_37 + -1'n7_43 + -1'Cstart_4 + Cstart_10 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 10378 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 83 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>([]((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>([]((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>([]((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>([]((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>([]((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>([]((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(<>((LTLAP3==true))))U(X(X((LTLAP4==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4889 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]((LTLAP5==true)))U(X([]((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 173 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(((LTLAP7==true))U((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 159 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP11==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 528 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([]((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 112 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP13==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 493 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 426 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP15==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 424 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP16==true))U(<>((LTLAP17==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 407 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP18==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 94 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([](<>((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 144 ms.
FORMULA QuasiCertifProtocol-COL-10-LTLCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>([]((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>([]((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>([]((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>([]((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 7:12:53 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 06, 2018 7:12:53 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 7:12:53 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Jun 06, 2018 7:13:15 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 21872 ms
Jun 06, 2018 7:13:15 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 30 places.
Jun 06, 2018 7:13:15 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Jun 06, 2018 7:13:15 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :tsidxtsid->n9,n8,n7,
Dot->malicious_reservoir,CstopAbort,SstopAbort,AstopAbort,a5,a4,a3,a2,a1,Astart,AstopOK,
tsid->n6,n5,n4,n3,n2,n1,c1,Cstart,Sstart,s2,s3,s4,s5,s6,SstopOK,CstopOK,

Jun 06, 2018 7:13:15 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 26 transitions.
Jun 06, 2018 7:13:15 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Jun 06, 2018 7:13:15 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 35 ms
Jun 06, 2018 7:13:15 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 423 ms
Jun 06, 2018 7:13:18 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 65 ms
Jun 06, 2018 7:13:18 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 3 ms
Jun 06, 2018 7:13:19 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 106 transitions. Expanding to a total of 183 deterministic transitions.
Jun 06, 2018 7:13:19 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 25 ms.
Jun 06, 2018 7:13:20 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 375 place invariants in 418 ms
Jun 06, 2018 7:13:25 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 550 variables to be positive in 4916 ms
Jun 06, 2018 7:13:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 176 transitions.
Jun 06, 2018 7:13:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/176 took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 7:13:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 33 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 7:13:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 176 transitions.
Jun 06, 2018 7:13:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 7:13:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 176 transitions.
Jun 06, 2018 7:13:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/176) took 764 ms. Total solver calls (SAT/UNSAT): 164(164/0)
Jun 06, 2018 7:13:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/176) took 4260 ms. Total solver calls (SAT/UNSAT): 810(810/0)
Jun 06, 2018 7:13:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/176) took 7616 ms. Total solver calls (SAT/UNSAT): 1440(1440/0)
Jun 06, 2018 7:13:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/176) took 10888 ms. Total solver calls (SAT/UNSAT): 1902(1902/0)
Jun 06, 2018 7:13:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/176) took 14262 ms. Total solver calls (SAT/UNSAT): 2355(2355/0)
Jun 06, 2018 7:13:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/176) took 17540 ms. Total solver calls (SAT/UNSAT): 2799(2799/0)
Jun 06, 2018 7:13:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/176) took 20762 ms. Total solver calls (SAT/UNSAT): 3234(3234/0)
Jun 06, 2018 7:13:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/176) took 23822 ms. Total solver calls (SAT/UNSAT): 3660(3660/0)
Jun 06, 2018 7:14:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/176) took 27836 ms. Total solver calls (SAT/UNSAT): 4077(4077/0)
Jun 06, 2018 7:14:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/176) took 31283 ms. Total solver calls (SAT/UNSAT): 4350(4350/0)
Jun 06, 2018 7:14:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/176) took 34924 ms. Total solver calls (SAT/UNSAT): 4752(4752/0)
Jun 06, 2018 7:14:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/176) took 38682 ms. Total solver calls (SAT/UNSAT): 5145(5145/0)
Jun 06, 2018 7:14:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/176) took 42795 ms. Total solver calls (SAT/UNSAT): 5529(5529/0)
Jun 06, 2018 7:14:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/176) took 45946 ms. Total solver calls (SAT/UNSAT): 5904(5904/0)
Jun 06, 2018 7:14:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/176) took 49390 ms. Total solver calls (SAT/UNSAT): 6270(6270/0)
Jun 06, 2018 7:14:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/176) took 52788 ms. Total solver calls (SAT/UNSAT): 6627(6627/0)
Jun 06, 2018 7:14:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/176) took 56177 ms. Total solver calls (SAT/UNSAT): 6975(6975/0)
Jun 06, 2018 7:14:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/176) took 59223 ms. Total solver calls (SAT/UNSAT): 7314(7314/0)
Jun 06, 2018 7:14:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/176) took 62351 ms. Total solver calls (SAT/UNSAT): 7644(7644/0)
Jun 06, 2018 7:14:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/176) took 65384 ms. Total solver calls (SAT/UNSAT): 7965(7965/0)
Jun 06, 2018 7:14:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/176) took 69326 ms. Total solver calls (SAT/UNSAT): 8379(8379/0)
Jun 06, 2018 7:14:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/176) took 72773 ms. Total solver calls (SAT/UNSAT): 8679(8679/0)
Jun 06, 2018 7:14:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/176) took 76219 ms. Total solver calls (SAT/UNSAT): 9065(9065/0)
Jun 06, 2018 7:14:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/176) took 79510 ms. Total solver calls (SAT/UNSAT): 9435(9435/0)
Jun 06, 2018 7:14:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/176) took 83287 ms. Total solver calls (SAT/UNSAT): 9829(9794/35)
Jun 06, 2018 7:15:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/176) took 87291 ms. Total solver calls (SAT/UNSAT): 10249(10214/35)
Jun 06, 2018 7:15:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/176) took 90407 ms. Total solver calls (SAT/UNSAT): 10567(10532/35)
Jun 06, 2018 7:15:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/176) took 94261 ms. Total solver calls (SAT/UNSAT): 10869(10834/35)
Jun 06, 2018 7:15:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/176) took 97826 ms. Total solver calls (SAT/UNSAT): 11014(10979/35)
Jun 06, 2018 7:15:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/176) took 101227 ms. Total solver calls (SAT/UNSAT): 11359(11324/35)
Jun 06, 2018 7:15:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/176) took 109058 ms. Total solver calls (SAT/UNSAT): 11491(11456/35)
Jun 06, 2018 7:15:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/176) took 114594 ms. Total solver calls (SAT/UNSAT): 11620(11585/35)
Jun 06, 2018 7:15:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/176) took 121278 ms. Total solver calls (SAT/UNSAT): 11806(11771/35)
Jun 06, 2018 7:15:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/176) took 128049 ms. Total solver calls (SAT/UNSAT): 12096(12061/35)
Jun 06, 2018 7:15:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(115/176) took 131514 ms. Total solver calls (SAT/UNSAT): 12151(12116/35)
Jun 06, 2018 7:15:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/176) took 135756 ms. Total solver calls (SAT/UNSAT): 12205(12170/35)
Jun 06, 2018 7:15:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/176) took 140481 ms. Total solver calls (SAT/UNSAT): 12258(12223/35)
Jun 06, 2018 7:15:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/176) took 144614 ms. Total solver calls (SAT/UNSAT): 12310(12275/35)
Jun 06, 2018 7:16:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/176) took 148404 ms. Total solver calls (SAT/UNSAT): 12361(12326/35)
SMT solver raised 'unknown', retrying with same input.
Jun 06, 2018 7:16:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/176) took 155172 ms. Total solver calls (SAT/UNSAT): 12601(12566/35)
Jun 06, 2018 7:16:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/176) took 160970 ms. Total solver calls (SAT/UNSAT): 12775(12740/35)
Jun 06, 2018 7:16:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/176) took 164038 ms. Total solver calls (SAT/UNSAT): 12856(12821/35)
Jun 06, 2018 7:16:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/176) took 167798 ms. Total solver calls (SAT/UNSAT): 12933(12898/35)
Jun 06, 2018 7:16:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/176) took 170992 ms. Total solver calls (SAT/UNSAT): 12970(12935/35)
Jun 06, 2018 7:16:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/176) took 174551 ms. Total solver calls (SAT/UNSAT): 13006(12971/35)
Jun 06, 2018 7:16:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/176) took 178670 ms. Total solver calls (SAT/UNSAT): 13075(13040/35)
Jun 06, 2018 7:16:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(144/176) took 182374 ms. Total solver calls (SAT/UNSAT): 13303(13268/35)
Jun 06, 2018 7:16:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(149/176) took 185382 ms. Total solver calls (SAT/UNSAT): 13413(13378/35)
Jun 06, 2018 7:16:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/176) took 188410 ms. Total solver calls (SAT/UNSAT): 13483(13448/35)
Jun 06, 2018 7:16:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/176) took 191531 ms. Total solver calls (SAT/UNSAT): 13575(13540/35)
Jun 06, 2018 7:16:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 192865 ms. Total solver calls (SAT/UNSAT): 13618(13568/50)
Jun 06, 2018 7:16:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 176 transitions.
Jun 06, 2018 7:16:48 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 06, 2018 7:16:48 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 209908ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.001, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>([]((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-COL-10"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-COL-10.tgz
mv QuasiCertifProtocol-COL-10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is QuasiCertifProtocol-COL-10, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r189-qhx2-152732140800045"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;