fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r188-qhx2-152732140200090
Last Updated
June 26, 2018

About the Execution of ITS-Tools for Railroad-PT-010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15734.340 73542.00 172188.00 587.30 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................................................................................
/home/mcc/execution
total 252K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 78K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Railroad-PT-010, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r188-qhx2-152732140200090
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Railroad-PT-010-LTLFireability-00
FORMULA_NAME Railroad-PT-010-LTLFireability-01
FORMULA_NAME Railroad-PT-010-LTLFireability-02
FORMULA_NAME Railroad-PT-010-LTLFireability-03
FORMULA_NAME Railroad-PT-010-LTLFireability-04
FORMULA_NAME Railroad-PT-010-LTLFireability-05
FORMULA_NAME Railroad-PT-010-LTLFireability-06
FORMULA_NAME Railroad-PT-010-LTLFireability-07
FORMULA_NAME Railroad-PT-010-LTLFireability-08
FORMULA_NAME Railroad-PT-010-LTLFireability-09
FORMULA_NAME Railroad-PT-010-LTLFireability-10
FORMULA_NAME Railroad-PT-010-LTLFireability-11
FORMULA_NAME Railroad-PT-010-LTLFireability-12
FORMULA_NAME Railroad-PT-010-LTLFireability-13
FORMULA_NAME Railroad-PT-010-LTLFireability-14
FORMULA_NAME Railroad-PT-010-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1528288325148

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(((pl_P14_8>=1)&&(pl_P15_7>=1))&&(pl_P26_1>=1))"))
Formula 0 simplified : !"(((pl_P14_8>=1)&&(pl_P15_7>=1))&&(pl_P26_1>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 156 rows 89 cols
invariant :pl_P15_6 + pl_P16_6 + pl_P46_1 + pl_P47_1 = 1
invariant :pl_P22_1 + pl_P26_1 + pl_P36_1 + pl_P37_1 + pl_P37_3 + pl_P48_1 + pl_P63_1 = 1
invariant :pl_P15_3 + pl_P16_3 + pl_P51_1 + pl_P56_1 = 1
invariant :pl_P52_1 + -1'pl_P56_1 = 0
invariant :pl_P14_1 + pl_P21_1 + pl_P36_1 + -1'pl_P48_1 + pl_P63_1 = 1
invariant :pl_P31_1 + -1'pl_P36_1 + -1'pl_P37_1 + -1'pl_P63_1 = 0
invariant :-1'pl_P22_1 + pl_P32_1 + -1'pl_P37_3 + -1'pl_P48_1 = 0
invariant :pl_P45_1 + pl_P51_1 + pl_P56_1 = 1
invariant :pl_P44_1 + -1'pl_P54_1 = 0
invariant :pl_P36_1 + pl_P37_1 + pl_P61_1 + pl_P62_1 + pl_P63_1 = 1
invariant :pl_P20_3 + pl_P21_1 + pl_P22_1 + pl_P63_1 = 1
invariant :pl_P30_1 + -1'pl_P47_1 = 0
invariant :pl_P0_1 + -1'pl_P6_1 = 0
invariant :pl_P15_8 + pl_P16_8 + -1'pl_P67_1 = 0
invariant :pl_P20_2 + -1'pl_P22_1 + -1'pl_P63_1 = 0
invariant :-3'pl_P14_10 + -4'pl_P14_11 + 5'pl_P14_2 + 4'pl_P14_3 + 3'pl_P14_4 + 2'pl_P14_5 + pl_P14_6 + -1'pl_P14_8 + -2'pl_P14_9 + -1'pl_P16_1 + -1'pl_P16_10 + -1'pl_P16_11 + -1'pl_P16_2 + -1'pl_P16_3 + -1'pl_P16_4 + -1'pl_P16_5 + -1'pl_P16_6 + -1'pl_P16_7 + -1'pl_P16_8 + -1'pl_P16_9 + -6'pl_P21_1 + -5'pl_P36_1 + pl_P37_1 + 6'pl_P48_1 + pl_P62_1 + -5'pl_P63_1 = -9
invariant :pl_P25_1 + pl_P60_1 + pl_P66_1 = 1
invariant :pl_P50_1 + pl_P58_1 + pl_P59_1 = 1
invariant :pl_P12_1 + -1'pl_P66_1 = 0
invariant :pl_P29_1 + pl_P58_1 + pl_P59_1 = 1
invariant :pl_P11_1 + pl_P21_1 + pl_P22_1 + pl_P63_1 = 1
invariant :pl_P15_2 + pl_P16_2 + -1'pl_P23_1 = 0
invariant :4'pl_P14_10 + 5'pl_P14_11 + -4'pl_P14_2 + -3'pl_P14_3 + -2'pl_P14_4 + -1'pl_P14_5 + pl_P14_7 + 2'pl_P14_8 + 3'pl_P14_9 + pl_P16_1 + pl_P16_10 + pl_P16_11 + pl_P16_2 + pl_P16_3 + pl_P16_4 + pl_P16_5 + pl_P16_6 + pl_P16_7 + pl_P16_8 + pl_P16_9 + 5'pl_P21_1 + 4'pl_P36_1 + -1'pl_P37_1 + -5'pl_P48_1 + -1'pl_P62_1 + 4'pl_P63_1 = 9
invariant :pl_P34_1 + pl_P54_1 + pl_P55_1 = 1
invariant :pl_P38_1 + pl_P3_1 + pl_P53_1 = 1
invariant :pl_P41_1 + -1'pl_P42_1 = 0
invariant :pl_P8_1 + -1'pl_P9_1 = 0
invariant :pl_P15_11 + pl_P16_11 = 0
invariant :pl_P15_4 + pl_P16_4 + -1'pl_P60_1 = 0
invariant :pl_P15_9 + pl_P16_9 + -1'pl_P53_1 = 0
invariant :pl_P20_1 + -1'pl_P21_1 = 0
invariant :pl_P17_1 + pl_P46_1 + pl_P47_1 = 1
invariant :pl_P15_7 + pl_P16_7 + -1'pl_P58_1 = 0
invariant :pl_P27_1 + -1'pl_P43_1 = 0
invariant :pl_P5_1 + pl_P67_1 + pl_P6_1 = 1
invariant :pl_P15_10 + pl_P16_10 + pl_P28_1 + pl_P43_1 = 1
invariant :pl_P10_1 + pl_P23_1 + pl_P9_1 = 1
invariant :pl_P2_1 + pl_P3_1 + pl_P53_1 = 1
invariant :pl_P15_1 + pl_P16_1 + -1'pl_P4_1 = 0
invariant :pl_P15_5 + pl_P16_5 + pl_P54_1 + pl_P55_1 = 1
invariant :pl_P40_1 + pl_P42_1 + pl_P4_1 = 1
invariant :pl_P19_1 + pl_P28_1 + pl_P43_1 = 1
Reverse transition relation is NOT exact ! Due to transitions tr_T28_1, tr_T37_10, tr_T37_2, tr_T37_3, tr_T37_4, tr_T37_5, tr_T37_6, tr_T37_7, tr_T37_8, tr_T37_9, tr_T4_1, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :10/135/11/156
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
5033 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,50.4675,478976,1,0,310,1.30356e+06,328,149,4785,1.64984e+06,323
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA Railroad-PT-010-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((F(F(F("(((pl_P14_5>=1)&&(pl_P15_2>=1))&&(pl_P26_1>=1))")))))
Formula 1 simplified : !F"(((pl_P14_5>=1)&&(pl_P15_2>=1))&&(pl_P26_1>=1))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4878 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 108 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(<>((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 135 ms.
FORMULA Railroad-PT-010-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(([](<>((LTLAP2==true))))U((LTLAP3==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 104 ms.
FORMULA Railroad-PT-010-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]([](X((LTLAP4==true)))))U(<>([]([]((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 96 ms.
FORMULA Railroad-PT-010-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 299 ms.
FORMULA Railroad-PT-010-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(((LTLAP7==true))U((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 388 ms.
FORMULA Railroad-PT-010-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](X((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 139 ms.
FORMULA Railroad-PT-010-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 286 ms.
FORMULA Railroad-PT-010-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 140 ms.
FORMULA Railroad-PT-010-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>(<>((LTLAP12==true)))))U((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 401 ms.
FORMULA Railroad-PT-010-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 192 ms.
FORMULA Railroad-PT-010-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>((<>((LTLAP15==true)))U(X((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 245 ms.
FORMULA Railroad-PT-010-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP17==true))U(<>([]((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 107 ms.
FORMULA Railroad-PT-010-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X((LTLAP19==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 100 ms.
FORMULA Railroad-PT-010-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](<>(<>((LTLAP20==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 345 ms.
FORMULA Railroad-PT-010-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](<>(((LTLAP21==true))U((LTLAP22==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 145 ms.
FORMULA Railroad-PT-010-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1528288398690

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 12:32:08 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 06, 2018 12:32:08 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 106 ms
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 118 places.
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 156 transitions.
Jun 06, 2018 12:32:09 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 50 ms
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 29 fixed domain variables (out of 118 variables) in GAL type Railroad_PT_010
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 29 constant array cells/variables (out of 118 variables) in type Railroad_PT_010
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: pl_P37_2,pl_P37_9,pl_P37_6,pl_P49_1,pl_P20_7,pl_P57_1,pl_P20_4,pl_P33_1,pl_P20_9,pl_P18_1,pl_P65_1,pl_P37_5,pl_P37_8,pl_P37_4,pl_P24_1,pl_P13_1,pl_P35_1,pl_P20_5,pl_P1_1,pl_P20_6,pl_P37_11,pl_P20_11,pl_P20_10,pl_P20_8,pl_P7_1,pl_P37_10,pl_P39_1,pl_P37_7,pl_P64_1,
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 29 fixed domain variables (out of 118 variables) in GAL type Railroad_PT_010
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 29 constant array cells/variables (out of 118 variables) in type Railroad_PT_010
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: pl_P37_2,pl_P37_9,pl_P37_6,pl_P49_1,pl_P20_7,pl_P57_1,pl_P20_4,pl_P33_1,pl_P20_9,pl_P18_1,pl_P65_1,pl_P37_5,pl_P37_8,pl_P37_4,pl_P24_1,pl_P13_1,pl_P35_1,pl_P20_5,pl_P1_1,pl_P20_6,pl_P37_11,pl_P20_11,pl_P20_10,pl_P20_8,pl_P7_1,pl_P37_10,pl_P39_1,pl_P37_7,pl_P64_1,
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 29 constant variables :pl_P37_2=0, pl_P37_9=0, pl_P37_6=0, pl_P49_1=0, pl_P20_7=0, pl_P57_1=0, pl_P20_4=0, pl_P33_1=0, pl_P20_9=0, pl_P18_1=0, pl_P65_1=0, pl_P37_5=0, pl_P37_8=0, pl_P37_4=0, pl_P24_1=0, pl_P13_1=0, pl_P35_1=0, pl_P20_5=0, pl_P1_1=0, pl_P20_6=0, pl_P37_11=0, pl_P20_11=0, pl_P20_10=0, pl_P20_8=0, pl_P7_1=0, pl_P37_10=0, pl_P39_1=0, pl_P37_7=0, pl_P64_1=0
Jun 06, 2018 12:32:09 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 172 ms
Jun 06, 2018 12:32:09 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 9 ms
Jun 06, 2018 12:32:09 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 06, 2018 12:32:10 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 156 transitions.
Jun 06, 2018 12:32:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 42 place invariants in 54 ms
Jun 06, 2018 12:32:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 89 variables to be positive in 544 ms
Jun 06, 2018 12:32:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 156 transitions.
Jun 06, 2018 12:32:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/156 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 12:32:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 12:32:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 156 transitions.
Jun 06, 2018 12:32:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 12:32:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 156 transitions.
Jun 06, 2018 12:32:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/156) took 56 ms. Total solver calls (SAT/UNSAT): 12(0/12)
Jun 06, 2018 12:32:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/156) took 3211 ms. Total solver calls (SAT/UNSAT): 1421(1179/242)
Jun 06, 2018 12:32:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/156) took 6983 ms. Total solver calls (SAT/UNSAT): 2085(1660/425)
Jun 06, 2018 12:32:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/156) took 9999 ms. Total solver calls (SAT/UNSAT): 2470(1851/619)
Jun 06, 2018 12:32:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/156) took 13221 ms. Total solver calls (SAT/UNSAT): 3090(2377/713)
Jun 06, 2018 12:32:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/156) took 16750 ms. Total solver calls (SAT/UNSAT): 3694(2753/941)
Jun 06, 2018 12:32:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/156) took 20132 ms. Total solver calls (SAT/UNSAT): 4499(3512/987)
Jun 06, 2018 12:32:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/156) took 23308 ms. Total solver calls (SAT/UNSAT): 5454(4334/1120)
Jun 06, 2018 12:32:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/156) took 26445 ms. Total solver calls (SAT/UNSAT): 6601(5349/1252)
Jun 06, 2018 12:32:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/156) took 29695 ms. Total solver calls (SAT/UNSAT): 7204(5847/1357)
Jun 06, 2018 12:32:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/156) took 32805 ms. Total solver calls (SAT/UNSAT): 7906(6519/1387)
Jun 06, 2018 12:32:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/156) took 35810 ms. Total solver calls (SAT/UNSAT): 8592(7101/1491)
Jun 06, 2018 12:32:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/156) took 39285 ms. Total solver calls (SAT/UNSAT): 9231(7644/1587)
Jun 06, 2018 12:33:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/156) took 42521 ms. Total solver calls (SAT/UNSAT): 9831(8151/1680)
Jun 06, 2018 12:33:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/156) took 45567 ms. Total solver calls (SAT/UNSAT): 10460(8643/1817)
Jun 06, 2018 12:33:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 47618 ms. Total solver calls (SAT/UNSAT): 10605(8679/1926)
Jun 06, 2018 12:33:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 156 transitions.
Jun 06, 2018 12:33:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 3571 ms. Total solver calls (SAT/UNSAT): 1044(0/1044)
Jun 06, 2018 12:33:08 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 58771ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Railroad-PT-010"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Railroad-PT-010.tgz
mv Railroad-PT-010 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Railroad-PT-010, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r188-qhx2-152732140200090"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;