About the Execution of ITS-Tools for QuasiCertifProtocol-PT-10
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15744.340 | 119428.00 | 237021.00 | 5322.90 | FFFFFFTFFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.........................
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 45K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 42K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 5.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 290K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is QuasiCertifProtocol-PT-10, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r188-qhx2-152732140200060
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-00
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-01
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-02
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-03
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-04
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-05
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-06
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-07
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-08
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-09
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-10
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-11
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-12
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-13
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-14
FORMULA_NAME QuasiCertifProtocol-PT-10-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1528285763350
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F("((((((((((((malicious_reservoir>=1)&&(c1_5>=1))||((c1_6>=1)&&(malicious_reservoir>=1)))||((c1_3>=1)&&(malicious_reservoir>=1)))||((malicious_reservoir>=1)&&(c1_4>=1)))||((c1_1>=1)&&(malicious_reservoir>=1)))||((c1_2>=1)&&(malicious_reservoir>=1)))||((malicious_reservoir>=1)&&(c1_0>=1)))||((malicious_reservoir>=1)&&(c1_10>=1)))||((malicious_reservoir>=1)&&(c1_9>=1)))||((malicious_reservoir>=1)&&(c1_8>=1)))||((malicious_reservoir>=1)&&(c1_7>=1)))")))
Formula 0 simplified : !F"((((((((((((malicious_reservoir>=1)&&(c1_5>=1))||((c1_6>=1)&&(malicious_reservoir>=1)))||((c1_3>=1)&&(malicious_reservoir>=1)))||((malicious_reservoir>=1)&&(c1_4>=1)))||((c1_1>=1)&&(malicious_reservoir>=1)))||((c1_2>=1)&&(malicious_reservoir>=1)))||((malicious_reservoir>=1)&&(c1_0>=1)))||((malicious_reservoir>=1)&&(c1_10>=1)))||((malicious_reservoir>=1)&&(c1_9>=1)))||((malicious_reservoir>=1)&&(c1_8>=1)))||((malicious_reservoir>=1)&&(c1_7>=1)))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 176 rows 550 cols
invariant :n8_10_9 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n8_9_0 + -1'n8_10_0 + n8_10_8 + -1'n8_9_8 = 0
invariant :n8_4_7 + -1'n8_0_7 + -1'n8_4_9 + n8_0_9 = 0
invariant :n8_7_0 + -1'n8_10_0 + n8_10_8 + -1'n8_7_8 = 0
invariant :n7_9_5 + -1'n7_9_9 + n8_10_5 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_6_2 + -1'n7_6_9 + n8_9_2 + -1'n8_7_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n8_1_1 + -1'n8_3_1 + n8_3_9 + -1'n8_1_9 = 0
invariant :n8_2_5 + -1'n8_10_5 + n8_7_9 + -1'n8_2_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n8_9_3 + -1'n8_2_3 + -1'n8_7_9 + n8_2_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n9_0_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_0 = 0
invariant :n7_7_8 + -1'n7_7_9 + -1'n8_7_9 + n8_7_8 = 0
invariant :n7_5_6 + -1'n7_5_9 + n8_3_6 + -1'n8_3_9 = 0
invariant :n7_1_3 + -1'n7_1_10 + n8_2_3 + -1'n8_0_10 + -1'n8_2_9 + n8_0_9 = 0
invariant :n8_0_5 + -1'n8_10_5 + n8_7_9 + -1'n8_0_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n8_8_4 + -1'n8_0_4 + -1'n8_7_9 + n8_0_9 + -1'n8_8_8 + n8_7_8 = 0
invariant :n8_9_5 + -1'n8_10_5 + n8_10_8 + -1'n8_9_8 = 0
invariant :n7_0_6 + -1'n7_0_10 + n8_3_6 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n9_5_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_5 = 0
invariant :n7_2_9 + -1'n7_2_10 + -1'n8_0_10 + n8_0_9 = 0
invariant :n8_10_3 + -1'n8_2_3 + -1'n8_7_9 + n8_2_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n5_4 + n6_4 + -1'n5_10 + -1'n6_10 = 0
invariant :n9_7_2 + CstopOK_2 + -1'SstopOK_7 = 0
invariant :n8_7_3 + -1'n8_2_3 + -1'n8_7_9 + n8_2_9 = 0
invariant :n1_2 + -1'n2_6 + n2_2 + -1'n1_6 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n8_2_10 + -1'n8_0_10 + -1'n8_2_9 + n8_0_9 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :CstopOK_10 + n9_10_10 + -1'SstopOK_10 = 0
invariant :n5_1 + -1'n5_10 + n6_1 + -1'n6_10 = 0
invariant :n7_7_4 + -1'n7_7_9 + n8_0_4 + -1'n8_0_9 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n8_7_7 + -1'n8_0_7 + -1'n8_7_9 + n8_0_9 = 0
invariant :n7_1_1 + -1'n7_1_10 + n8_3_1 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n9_1_8 + CstopOK_8 + -1'SstopOK_1 = 0
invariant :n9_7_1 + CstopOK_1 + -1'SstopOK_7 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n8_5_2 + -1'n8_9_2 + n8_7_9 + -1'n8_5_9 + n8_9_8 + -1'n8_7_8 = 0
invariant :n9_9_5 + CstopOK_5 + -1'SstopOK_9 = 0
invariant :n8_5_3 + -1'n8_2_3 + -1'n8_5_9 + n8_2_9 = 0
invariant :n9_4_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_4 = 0
invariant :n7_5_0 + -1'n7_5_9 + n8_10_0 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_0_2 + -1'n7_0_10 + n8_9_2 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_1 + -1's6_0 + -1's6_3 + -1's6_2 + -1's6_5 + -1's6_4 + -1's6_7 + -1's6_6 + -1's6_9 + -1's6_8 + -1's6_10 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_6 + -1's5_7 + -1's5_4 + -1's5_5 + -1's5_10 + -1's4_0 + -1's5_8 + -1's5_9 + -1's4_3 + -1's4_4 + -1's4_1 + -1's4_2 + -1's4_7 + -1's4_8 + -1's4_5 + -1's4_6 + -1's3_1 + -1's3_0 + -1's4_10 + -1's4_9 + -1's3_5 + -1's3_4 + -1's3_3 + -1's3_2 + -1's3_9 + -1's3_8 + -1's3_7 + -1's3_6 + -1's2_2 + -1's2_1 + -1's2_0 + -1's3_10 + -1's2_7 + -1's2_8 + -1's2_9 + -1's2_10 + -1's2_3 + -1's2_4 + -1's2_5 + -1's2_6 + -1'Sstart_4 + -1'Sstart_5 + -1'Sstart_6 + -1'Sstart_7 + -1'Sstart_0 + -1'Sstart_1 + -1'Sstart_2 + -1'Sstart_3 + -1'Sstart_9 + -1'Sstart_8 + -1'Sstart_10 + -1'SstopOK_10 + -1'SstopOK_8 + -1'SstopOK_9 + -1'SstopOK_6 + -1'SstopOK_7 + -1'SstopOK_4 + -1'SstopOK_5 + -1'SstopOK_1 + -1'SstopOK_0 + -1'SstopOK_3 + -1'SstopOK_2 = -5
invariant :n3_6 + -1'n3_7 + n4_6 + -1'n4_7 = 0
invariant :n7_8_2 + -1'n7_8_9 + n8_9_2 + -1'n8_7_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :Cstart_8 + -1'Cstart_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + n8_7_8 = 0
invariant :n7_7_2 + -1'n7_7_9 + n8_9_2 + -1'n8_7_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n8_1_10 + -1'n8_0_10 + -1'n8_1_9 + n8_0_9 = 0
invariant :n9_7_3 + CstopOK_3 + -1'SstopOK_7 = 0
invariant :n8_9_6 + -1'n8_3_6 + -1'n8_7_9 + n8_3_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n9_10_7 + CstopOK_7 + -1'SstopOK_10 = 0
invariant :n9_8_2 + CstopOK_2 + -1'SstopOK_8 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n7_8_1 + -1'n7_8_9 + n8_3_1 + -1'n8_3_9 = 0
invariant :n7_2_6 + -1'n7_2_10 + n8_3_6 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n7_3_6 + -1'n7_3_10 + n8_3_6 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n8_9_4 + -1'n8_0_4 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n8_3_5 + -1'n8_10_5 + n8_7_9 + -1'n8_3_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n2_10 + -1'n2_6 + n1_10 + -1'n1_6 = 0
invariant :n9_8_5 + CstopOK_5 + -1'SstopOK_8 = 0
invariant :n8_8_6 + -1'n8_3_6 + -1'n8_7_9 + n8_3_9 + -1'n8_8_8 + n8_7_8 = 0
invariant :n8_1_7 + -1'n8_0_7 + -1'n8_1_9 + n8_0_9 = 0
invariant :n4_0 + -1'n3_7 + n3_0 + -1'n4_7 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n7_0_3 + -1'n7_0_10 + n8_2_3 + -1'n8_0_10 + -1'n8_2_9 + n8_0_9 = 0
invariant :n8_5_5 + -1'n8_10_5 + n8_7_9 + -1'n8_5_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n7_5_3 + -1'n7_5_9 + n8_2_3 + -1'n8_2_9 = 0
invariant :n7_0_9 + -1'n7_0_10 + -1'n8_0_10 + n8_0_9 = 0
invariant :n7_3_4 + -1'n7_3_10 + n8_0_4 + -1'n8_0_10 = 0
invariant :Cstart_9 + -1'Cstart_10 + -1'n8_0_10 + n8_0_9 = 0
invariant :n8_5_7 + -1'n8_0_7 + -1'n8_5_9 + n8_0_9 = 0
invariant :n1_1 + -1'n2_6 + n2_1 + -1'n1_6 = 0
invariant :n7_2_7 + -1'n7_2_10 + n8_0_7 + -1'n8_0_10 = 0
invariant :n8_1_4 + -1'n8_0_4 + -1'n8_1_9 + n8_0_9 = 0
invariant :n8_7_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n9_9_7 + CstopOK_7 + -1'SstopOK_9 = 0
invariant :n7_10_4 + -1'n7_10_9 + n8_0_4 + -1'n8_0_9 = 0
invariant :n7_0_0 + -1'n7_0_10 + n8_10_0 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_8_6 + -1'n7_8_9 + n8_3_6 + -1'n8_3_9 = 0
invariant :n8_8_1 + -1'n8_3_1 + -1'n8_7_9 + n8_3_9 + -1'n8_8_8 + n8_7_8 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n7_8_8 + -1'n7_8_9 + -1'n8_7_9 + n8_7_8 = 0
invariant :n4_1 + -1'n3_7 + n3_1 + -1'n4_7 = 0
invariant :n7_4_0 + -1'n7_4_10 + n8_10_0 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n7_9_10 + -1'n7_9_9 + n8_0_10 + -1'n8_0_9 = 0
invariant :n9_10_6 + CstopOK_6 + -1'SstopOK_10 = 0
invariant :n1_5 + -1'n2_6 + n2_5 + -1'n1_6 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n7_3_2 + -1'n7_3_10 + n8_9_2 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n8_0_6 + -1'n8_3_6 + n8_3_9 + -1'n8_0_9 = 0
invariant :n8_9_9 + -1'n8_7_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n9_1_7 + CstopOK_7 + -1'SstopOK_1 = 0
invariant :n8_2_8 + n8_7_9 + -1'n8_2_9 + -1'n8_7_8 = 0
invariant :n8_5_1 + -1'n8_3_1 + -1'n8_5_9 + n8_3_9 = 0
invariant :n7_9_3 + -1'n7_9_9 + n8_2_3 + -1'n8_2_9 = 0
invariant :n1_0 + -1'n2_6 + n2_0 + -1'n1_6 = 0
invariant :n8_2_0 + -1'n8_10_0 + n8_7_9 + -1'n8_2_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
invariant :n5_6 + n6_6 + -1'n5_10 + -1'n6_10 = 0
invariant :n8_8_2 + -1'n8_9_2 + n8_9_8 + -1'n8_8_8 = 0
invariant :n9_9_9 + CstopOK_9 + -1'SstopOK_9 = 0
invariant :n9_6_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_6 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n7_10_5 + -1'n7_10_9 + n8_10_5 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n8_6_3 + -1'n8_2_3 + -1'n8_6_9 + n8_2_9 = 0
invariant :n9_8_4 + CstopOK_4 + -1'SstopOK_8 = 0
invariant :n7_6_5 + -1'n7_6_9 + n8_10_5 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n2_7 + -1'n2_6 + n1_7 + -1'n1_6 = 0
invariant :n9_10_4 + CstopOK_4 + -1'SstopOK_10 = 0
invariant :n7_3_1 + -1'n7_3_10 + n8_3_1 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n8_10_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n8_4_3 + -1'n8_2_3 + -1'n8_4_9 + n8_2_9 = 0
invariant :n8_4_2 + -1'n8_9_2 + n8_7_9 + -1'n8_4_9 + n8_9_8 + -1'n8_7_8 = 0
invariant :n8_8_9 + -1'n8_7_9 + -1'n8_8_8 + n8_7_8 = 0
invariant :n5_7 + -1'n5_10 + n6_7 + -1'n6_10 = 0
invariant :n7_9_8 + -1'n7_9_9 + -1'n8_7_9 + n8_7_8 = 0
invariant :n9_7_7 + CstopOK_7 + -1'SstopOK_7 = 0
invariant :n7_8_7 + -1'n7_8_9 + n8_0_7 + -1'n8_0_9 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_5_8 + -1'n7_5_9 + -1'n8_7_9 + n8_7_8 = 0
invariant :n9_5_7 + CstopOK_7 + -1'SstopOK_5 = 0
invariant :n9_10_9 + CstopOK_9 + -1'SstopOK_10 = 0
invariant :n7_5_7 + -1'n7_5_9 + n8_0_7 + -1'n8_0_9 = 0
invariant :n7_2_1 + -1'n7_2_10 + n8_3_1 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n3_10 + -1'n3_7 + n4_10 + -1'n4_7 = 0
invariant :n7_4_1 + -1'n7_4_10 + n8_3_1 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n8_4_0 + -1'n8_10_0 + n8_7_9 + -1'n8_4_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n9_10_8 + CstopOK_8 + -1'SstopOK_10 = 0
invariant :n9_8_7 + CstopOK_7 + -1'SstopOK_8 = 0
invariant :n8_5_8 + n8_7_9 + -1'n8_5_9 + -1'n8_7_8 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :n9_7_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_7 = 0
invariant :n7_6_1 + -1'n7_6_9 + n8_3_1 + -1'n8_3_9 = 0
invariant :n8_7_2 + -1'n8_9_2 + n8_9_8 + -1'n8_7_8 = 0
invariant :n8_8_7 + -1'n8_0_7 + -1'n8_7_9 + n8_0_9 + -1'n8_8_8 + n8_7_8 = 0
invariant :a3 + AstopAbort + a2 + a4 + a5 + a1 + AstopOK + Astart = 1
invariant :n7_1_4 + -1'n7_1_10 + n8_0_4 + -1'n8_0_10 = 0
invariant :n9_0_9 + CstopOK_9 + -1'SstopOK_0 = 0
invariant :n9_9_8 + CstopOK_8 + -1'SstopOK_9 = 0
invariant :n8_1_2 + -1'n8_9_2 + n8_7_9 + -1'n8_1_9 + n8_9_8 + -1'n8_7_8 = 0
invariant :n7_9_2 + -1'n7_9_9 + n8_9_2 + -1'n8_7_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n7_4_2 + -1'n7_4_10 + n8_9_2 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n7_7_10 + -1'n7_7_9 + n8_0_10 + -1'n8_0_9 = 0
invariant :n7_1_9 + -1'n7_1_10 + -1'n8_0_10 + n8_0_9 = 0
invariant :n3_9 + -1'n3_7 + n4_9 + -1'n4_7 = 0
invariant :n7_9_6 + -1'n7_9_9 + n8_3_6 + -1'n8_3_9 = 0
invariant :Cstart_5 + -1'Cstart_10 + n8_10_5 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n8_3_0 + -1'n8_10_0 + n8_7_9 + -1'n8_3_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :Cstart_0 + -1'Cstart_10 + n8_10_0 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_8_8 + CstopOK_8 + -1'SstopOK_8 = 0
invariant :n9_3_9 + CstopOK_9 + -1'SstopOK_3 = 0
invariant :n2_9 + -1'n2_6 + -1'n1_6 + n1_9 = 0
invariant :n9_5_9 + CstopOK_9 + -1'SstopOK_5 = 0
invariant :n8_2_6 + -1'n8_3_6 + n8_3_9 + -1'n8_2_9 = 0
invariant :n5_5 + n6_5 + -1'n5_10 + -1'n6_10 = 0
invariant :n8_0_3 + -1'n8_2_3 + n8_2_9 + -1'n8_0_9 = 0
invariant :n7_3_3 + -1'n7_3_10 + n8_2_3 + -1'n8_0_10 + -1'n8_2_9 + n8_0_9 = 0
invariant :n8_7_1 + -1'n8_3_1 + -1'n8_7_9 + n8_3_9 = 0
invariant :n9_7_4 + CstopOK_4 + -1'SstopOK_7 = 0
invariant :n9_8_6 + CstopOK_6 + -1'SstopOK_8 = 0
invariant :n8_5_4 + -1'n8_0_4 + -1'n8_5_9 + n8_0_9 = 0
invariant :n8_6_8 + n8_7_9 + -1'n8_6_9 + -1'n8_7_8 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n7_4_8 + -1'n7_4_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + n8_7_8 = 0
invariant :n5_3 + n6_3 + -1'n5_10 + -1'n6_10 = 0
invariant :n8_5_10 + -1'n8_0_10 + -1'n8_5_9 + n8_0_9 = 0
invariant :n9_9_0 + CstopOK_0 + -1'SstopOK_9 = 0
invariant :n9_2_7 + CstopOK_7 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + c1_7 + c1_8 + c1_9 + c1_10 + CstopAbort + CstopOK_6 + CstopOK_7 + CstopOK_8 + CstopOK_9 + CstopOK_2 + CstopOK_3 + CstopOK_4 + CstopOK_5 + -1'n9_10_10 + CstopOK_0 + CstopOK_1 + 11'Cstart_10 + -1'n8_3_1 + -1'n8_10_0 + -1'n8_0_4 + -1'n8_9_2 + -1'n8_2_3 + -1'n8_0_7 + -1'n8_10_5 + -1'n8_3_6 + 10'n8_0_10 + 4'n8_7_9 + 2'n8_3_9 + n8_2_9 + -8'n8_0_9 + 2'n8_10_8 + n8_9_8 + -4'n8_7_8 + SstopOK_10 = 11
invariant :n7_3_0 + -1'n7_3_10 + n8_10_0 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_3_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_3 = 0
invariant :n7_5_5 + -1'n7_5_9 + n8_10_5 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_10_3 + -1'n7_10_9 + n8_2_3 + -1'n8_2_9 = 0
invariant :n8_5_0 + -1'n8_10_0 + n8_7_9 + -1'n8_5_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :Cstart_6 + -1'Cstart_10 + n8_3_6 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n7_6_6 + -1'n7_6_9 + n8_3_6 + -1'n8_3_9 = 0
invariant :n8_10_1 + -1'n8_3_1 + -1'n8_7_9 + n8_3_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :n1_4 + n2_4 + -1'n2_6 + -1'n1_6 = 0
invariant :n8_6_2 + -1'n8_9_2 + n8_7_9 + -1'n8_6_9 + n8_9_8 + -1'n8_7_8 = 0
invariant :n8_1_3 + -1'n8_2_3 + n8_2_9 + -1'n8_1_9 = 0
invariant :n9_6_7 + CstopOK_7 + -1'SstopOK_6 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n5_2 + -1'n5_10 + n6_2 + -1'n6_10 = 0
invariant :n1_3 + n2_3 + -1'n2_6 + -1'n1_6 = 0
invariant :n9_10_1 + CstopOK_1 + -1'SstopOK_10 = 0
invariant :n9_8_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_8 = 0
invariant :n7_6_7 + -1'n7_6_9 + n8_0_7 + -1'n8_0_9 = 0
invariant :n8_6_6 + -1'n8_3_6 + -1'n8_6_9 + n8_3_9 = 0
invariant :n8_3_7 + -1'n8_0_7 + -1'n8_3_9 + n8_0_9 = 0
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n8_3_10 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n8_10_4 + -1'n8_0_4 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_0_1 + -1'n7_0_10 + n8_3_1 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n7_2_0 + -1'n7_2_10 + n8_10_0 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n8_6_5 + -1'n8_10_5 + n8_7_9 + -1'n8_6_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n7_1_2 + -1'n7_1_10 + n8_9_2 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n7_5_1 + -1'n7_5_9 + n8_3_1 + -1'n8_3_9 = 0
invariant :n8_4_4 + -1'n8_0_4 + -1'n8_4_9 + n8_0_9 = 0
invariant :n8_1_5 + -1'n8_10_5 + n8_7_9 + -1'n8_1_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n8_3_8 + n8_7_9 + -1'n8_3_9 + -1'n8_7_8 = 0
invariant :n9_9_2 + CstopOK_2 + -1'SstopOK_9 = 0
invariant :n8_7_6 + -1'n8_3_6 + -1'n8_7_9 + n8_3_9 = 0
invariant :n7_8_4 + -1'n7_8_9 + n8_0_4 + -1'n8_0_9 = 0
invariant :n9_3_8 + CstopOK_8 + -1'SstopOK_3 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :Cstart_7 + -1'Cstart_10 + n8_0_7 + -1'n8_0_10 = 0
invariant :n4_2 + -1'n3_7 + n3_2 + -1'n4_7 = 0
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n7_2_8 + -1'n7_2_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + n8_7_8 = 0
invariant :n7_0_4 + -1'n7_0_10 + n8_0_4 + -1'n8_0_10 = 0
invariant :n9_10_2 + CstopOK_2 + -1'SstopOK_10 = 0
invariant :n8_1_0 + -1'n8_10_0 + n8_7_9 + -1'n8_1_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n7_0_5 + -1'n7_0_10 + n8_10_5 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_8_5 + -1'n7_8_9 + n8_10_5 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_3_7 + -1'n7_3_10 + n8_0_7 + -1'n8_0_10 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n7_3_8 + -1'n7_3_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + n8_7_8 = 0
invariant :n8_10_6 + -1'n8_3_6 + -1'n8_7_9 + n8_3_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_4_9 + -1'n7_4_10 + -1'n8_0_10 + n8_0_9 = 0
invariant :n9_1_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_1 = 0
invariant :n7_4_4 + -1'n7_4_10 + n8_0_4 + -1'n8_0_10 = 0
invariant :n7_7_0 + -1'n7_7_9 + n8_10_0 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_6_8 + CstopOK_8 + -1'SstopOK_6 = 0
invariant :n9_7_9 + CstopOK_9 + -1'SstopOK_7 = 0
invariant :n7_10_6 + -1'n7_10_9 + n8_3_6 + -1'n8_3_9 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_0_7 + CstopOK_7 + -1'SstopOK_0 = 0
invariant :n7_3_9 + -1'n7_3_10 + -1'n8_0_10 + n8_0_9 = 0
invariant :n7_10_7 + -1'n7_10_9 + n8_0_7 + -1'n8_0_9 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n8_3_2 + -1'n8_9_2 + n8_7_9 + -1'n8_3_9 + n8_9_8 + -1'n8_7_8 = 0
invariant :n7_6_0 + -1'n7_6_9 + n8_10_0 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_4_5 + -1'n7_4_10 + n8_10_5 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_2_4 + -1'n7_2_10 + n8_0_4 + -1'n8_0_10 = 0
invariant :n8_4_10 + -1'n8_0_10 + -1'n8_4_9 + n8_0_9 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n7_5_10 + -1'n7_5_9 + n8_0_10 + -1'n8_0_9 = 0
invariant :n8_0_0 + -1'n8_10_0 + n8_7_9 + -1'n8_0_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n8_10_7 + -1'n8_0_7 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_5_4 + -1'n7_5_9 + n8_0_4 + -1'n8_0_9 = 0
invariant :n9_9_6 + CstopOK_6 + -1'SstopOK_9 = 0
invariant :n8_2_2 + -1'n8_9_2 + n8_7_9 + -1'n8_2_9 + n8_9_8 + -1'n8_7_8 = 0
invariant :n4_4 + n3_4 + -1'n3_7 + -1'n4_7 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_10_10 + -1'n7_10_9 + n8_0_10 + -1'n8_0_9 = 0
invariant :n8_8_5 + -1'n8_10_5 + n8_10_8 + -1'n8_8_8 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n7_8_10 + -1'n7_8_9 + n8_0_10 + -1'n8_0_9 = 0
invariant :n7_1_5 + -1'n7_1_10 + n8_10_5 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_10_5 + CstopOK_5 + -1'SstopOK_10 = 0
invariant :n9_7_0 + CstopOK_0 + -1'SstopOK_7 = 0
invariant :n7_7_6 + -1'n7_7_9 + n8_3_6 + -1'n8_3_9 = 0
invariant :n7_1_7 + -1'n7_1_10 + n8_0_7 + -1'n8_0_10 = 0
invariant :n7_9_7 + -1'n7_9_9 + n8_0_7 + -1'n8_0_9 = 0
invariant :n8_2_7 + -1'n8_0_7 + -1'n8_2_9 + n8_0_9 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n9_4_8 + CstopOK_8 + -1'SstopOK_4 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n8_7_5 + -1'n8_10_5 + n8_10_8 + -1'n8_7_8 = 0
invariant :n7_2_3 + -1'n7_2_10 + n8_2_3 + -1'n8_0_10 + -1'n8_2_9 + n8_0_9 = 0
invariant :n8_9_1 + -1'n8_3_1 + -1'n8_7_9 + n8_3_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n9_7_5 + CstopOK_5 + -1'SstopOK_7 = 0
invariant :n7_10_2 + -1'n7_10_9 + n8_9_2 + -1'n8_7_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n7_4_3 + -1'n7_4_10 + n8_2_3 + -1'n8_0_10 + -1'n8_2_9 + n8_0_9 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :n8_8_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_8_8 + n8_7_8 = 0
invariant :n8_2_4 + -1'n8_0_4 + -1'n8_2_9 + n8_0_9 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_0_8 + CstopOK_8 + -1'SstopOK_0 = 0
invariant :n7_10_8 + -1'n7_10_9 + -1'n8_7_9 + n8_7_8 = 0
invariant :n7_1_0 + -1'n7_1_10 + n8_10_0 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_3_7 + CstopOK_7 + -1'SstopOK_3 = 0
invariant :n8_0_8 + n8_7_9 + -1'n8_0_9 + -1'n8_7_8 = 0
invariant :n7_7_5 + -1'n7_7_9 + n8_10_5 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_6_9 + CstopOK_9 + -1'SstopOK_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_10_0 + CstopOK_0 + -1'SstopOK_10 = 0
invariant :n8_4_5 + -1'n8_10_5 + n8_7_9 + -1'n8_4_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n8_1_6 + -1'n8_3_6 + n8_3_9 + -1'n8_1_9 = 0
invariant :n5_9 + -1'n5_10 + -1'n6_10 + n6_9 = 0
invariant :n8_0_1 + -1'n8_3_1 + n8_3_9 + -1'n8_0_9 = 0
invariant :n9_9_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_9 = 0
invariant :n8_2_1 + -1'n8_3_1 + n8_3_9 + -1'n8_2_9 = 0
invariant :n8_8_0 + -1'n8_10_0 + n8_10_8 + -1'n8_8_8 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_7_3 + -1'n7_7_9 + n8_2_3 + -1'n8_2_9 = 0
invariant :n7_6_8 + -1'n7_6_9 + -1'n8_7_9 + n8_7_8 = 0
invariant :n7_9_1 + -1'n7_9_9 + n8_3_1 + -1'n8_3_9 = 0
invariant :Cstart_2 + -1'Cstart_10 + n8_9_2 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n7_3_5 + -1'n7_3_10 + n8_10_5 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n7_1_8 + -1'n7_1_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + n8_7_8 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n7_10_1 + -1'n7_10_9 + n8_3_1 + -1'n8_3_9 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n7_2_2 + -1'n7_2_10 + n8_9_2 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n9_2_10 + -1'n9_10_10 + SstopOK_10 + -1'SstopOK_2 = 0
invariant :n8_0_2 + -1'n8_9_2 + n8_7_9 + -1'n8_0_9 + n8_9_8 + -1'n8_7_8 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n7_7_1 + -1'n7_7_9 + n8_3_1 + -1'n8_3_9 = 0
invariant :n8_6_0 + -1'n8_10_0 + n8_7_9 + -1'n8_6_9 + n8_10_8 + -1'n8_7_8 = 0
invariant :n8_3_4 + -1'n8_0_4 + -1'n8_3_9 + n8_0_9 = 0
invariant :n8_6_1 + -1'n8_3_1 + -1'n8_6_9 + n8_3_9 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n9_4_7 + CstopOK_7 + -1'SstopOK_4 = 0
invariant :Cstart_1 + -1'Cstart_10 + n8_3_1 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n7_9_4 + -1'n7_9_9 + n8_0_4 + -1'n8_0_9 = 0
invariant :n9_8_0 + CstopOK_0 + -1'SstopOK_8 = 0
invariant :n8_5_6 + -1'n8_3_6 + -1'n8_5_9 + n8_3_9 = 0
invariant :n7_1_6 + -1'n7_1_10 + n8_3_6 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n9_9_3 + CstopOK_3 + -1'SstopOK_9 = 0
invariant :n7_0_7 + -1'n7_0_10 + n8_0_7 + -1'n8_0_10 = 0
invariant :n8_4_8 + n8_7_9 + -1'n8_4_9 + -1'n8_7_8 = 0
invariant :n7_5_2 + -1'n7_5_9 + n8_9_2 + -1'n8_7_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n9_9_4 + CstopOK_4 + -1'SstopOK_9 = 0
invariant :n8_4_6 + -1'n8_3_6 + -1'n8_4_9 + n8_3_9 = 0
invariant :n9_1_9 + CstopOK_9 + -1'SstopOK_1 = 0
invariant :n7_9_0 + -1'n7_9_9 + n8_10_0 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n8_10_2 + -1'n8_9_2 + -1'n8_10_8 + n8_9_8 = 0
invariant :n3_5 + -1'n3_7 + n4_5 + -1'n4_7 = 0
invariant :n7_7_7 + -1'n7_7_9 + n8_0_7 + -1'n8_0_9 = 0
invariant :n5_8 + -1'n5_10 + n6_8 + -1'n6_10 = 0
invariant :n9_2_8 + CstopOK_8 + -1'SstopOK_2 = 0
invariant :n8_9_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n8_1_8 + n8_7_9 + -1'n8_1_9 + -1'n8_7_8 = 0
invariant :n3_8 + -1'n3_7 + -1'n4_7 + n4_8 = 0
invariant :n8_6_7 + -1'n8_0_7 + -1'n8_6_9 + n8_0_9 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_10 + n8_2_3 + -1'n8_0_10 + -1'n8_2_9 + n8_0_9 = 0
invariant :n7_6_10 + -1'n7_6_9 + n8_0_10 + -1'n8_0_9 = 0
invariant :n9_8_1 + CstopOK_1 + -1'SstopOK_8 = 0
invariant :n7_2_5 + -1'n7_2_10 + n8_10_5 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n8_7_4 + -1'n8_0_4 + -1'n8_7_9 + n8_0_9 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n9_7_8 + CstopOK_8 + -1'SstopOK_7 = 0
invariant :n9_2_9 + CstopOK_9 + -1'SstopOK_2 = 0
invariant :n8_6_4 + -1'n8_0_4 + -1'n8_6_9 + n8_0_9 = 0
invariant :n8_8_3 + -1'n8_2_3 + -1'n8_7_9 + n8_2_9 + -1'n8_8_8 + n8_7_8 = 0
invariant :n7_8_3 + -1'n7_8_9 + n8_2_3 + -1'n8_2_9 = 0
invariant :n7_0_8 + -1'n7_0_10 + -1'n8_0_10 + -1'n8_7_9 + n8_0_9 + n8_7_8 = 0
invariant :Cstart_4 + -1'Cstart_10 + n8_0_4 + -1'n8_0_10 = 0
invariant :n9_7_6 + CstopOK_6 + -1'SstopOK_7 = 0
invariant :n8_3_3 + -1'n8_2_3 + -1'n8_3_9 + n8_2_9 = 0
invariant :n7_6_4 + -1'n7_6_9 + n8_0_4 + -1'n8_0_9 = 0
invariant :n8_9_7 + -1'n8_0_7 + -1'n8_7_9 + n8_0_9 + -1'n8_9_8 + n8_7_8 = 0
invariant :n7_6_3 + -1'n7_6_9 + n8_2_3 + -1'n8_2_9 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_6 + -1'n7_4_10 + n8_3_6 + -1'n8_0_10 + -1'n8_3_9 + n8_0_9 = 0
invariant :n4_3 + -1'n3_7 + n3_3 + -1'n4_7 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_10_0 + -1'n7_10_9 + n8_10_0 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n7_4_7 + -1'n7_4_10 + n8_0_7 + -1'n8_0_10 = 0
invariant :n8_4_1 + -1'n8_3_1 + -1'n8_4_9 + n8_3_9 = 0
invariant :n9_8_9 + CstopOK_9 + -1'SstopOK_8 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n9_10_3 + CstopOK_3 + -1'SstopOK_10 = 0
invariant :n7_8_0 + -1'n7_8_9 + n8_10_0 + -1'n8_7_9 + -1'n8_10_8 + n8_7_8 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :n9_5_8 + CstopOK_8 + -1'SstopOK_5 = 0
invariant :n2_8 + -1'n2_6 + -1'n1_6 + n1_8 = 0
invariant :n8_6_10 + -1'n8_0_10 + -1'n8_6_9 + n8_0_9 = 0
invariant :n9_8_3 + CstopOK_3 + -1'SstopOK_8 = 0
invariant :n5_0 + n6_0 + -1'n5_10 + -1'n6_10 = 0
invariant :n9_9_1 + CstopOK_1 + -1'SstopOK_9 = 0
invariant :n9_4_9 + CstopOK_9 + -1'SstopOK_4 = 0
invariant :s6_1 + s6_0 + s6_3 + s6_2 + s6_5 + s6_4 + s6_7 + s6_6 + s6_9 + s6_8 + SstopAbort + s6_10 + s5_1 + s5_0 + s5_3 + s5_2 + s5_6 + s5_7 + s5_4 + s5_5 + s5_10 + s4_0 + s5_8 + s5_9 + s4_3 + s4_4 + s4_1 + s4_2 + s4_7 + s4_8 + s4_5 + s4_6 + s3_1 + s3_0 + s4_10 + s4_9 + s3_5 + s3_4 + s3_3 + s3_2 + s3_9 + s3_8 + s3_7 + s3_6 + s2_2 + s2_1 + s2_0 + s3_10 + s2_7 + s2_8 + s2_9 + s2_10 + s2_3 + s2_4 + s2_5 + s2_6 + Sstart_4 + Sstart_5 + Sstart_6 + Sstart_7 + Sstart_0 + Sstart_1 + Sstart_2 + Sstart_3 + Sstart_9 + Sstart_8 + Sstart_10 + SstopOK_10 + SstopOK_8 + SstopOK_9 + SstopOK_6 + SstopOK_7 + SstopOK_4 + SstopOK_5 + SstopOK_1 + SstopOK_0 + SstopOK_3 + SstopOK_2 = 11
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7367 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 96 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 451 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 430 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((<>((LTLAP2==true)))U([]((LTLAP3==true))))U((LTLAP4==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 437 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 99 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](((LTLAP3==true))U(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 408 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP6==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 405 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 385 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 85 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](<>([](<>((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 82 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](<>(((LTLAP9==true))U((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 110 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP11==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 436 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((<>((LTLAP12==true)))U([]([]((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 444 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](([]([]((LTLAP14==true))))U([]((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 475 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X([]([]((LTLAP16==true)))))U((X((LTLAP17==true)))U([]((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 106 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((X((LTLAP19==true)))U(X((LTLAP20==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 112 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(([]((LTLAP21==true)))U(<>((LTLAP22==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 103 ms.
FORMULA QuasiCertifProtocol-PT-10-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1528285882778
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 11:49:41 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 06, 2018 11:49:42 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 11:49:42 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 135 ms
Jun 06, 2018 11:49:42 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 550 places.
Jun 06, 2018 11:49:42 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 176 transitions.
Jun 06, 2018 11:49:42 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 36 ms
Jun 06, 2018 11:49:42 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 165 ms
Jun 06, 2018 11:49:42 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 30 ms
Jun 06, 2018 11:49:42 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 9 ms
Jun 06, 2018 11:49:43 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 176 transitions.
Jun 06, 2018 11:49:44 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 375 place invariants in 262 ms
Jun 06, 2018 11:49:45 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 550 variables to be positive in 1904 ms
Jun 06, 2018 11:49:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 176 transitions.
Jun 06, 2018 11:49:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/176 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 11:49:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 29 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 11:49:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 176 transitions.
Jun 06, 2018 11:49:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 11:49:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 176 transitions.
Jun 06, 2018 11:49:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/176) took 853 ms. Total solver calls (SAT/UNSAT): 154(154/0)
Jun 06, 2018 11:49:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/176) took 3900 ms. Total solver calls (SAT/UNSAT): 760(760/0)
Jun 06, 2018 11:50:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/176) took 7106 ms. Total solver calls (SAT/UNSAT): 1326(1326/0)
Jun 06, 2018 11:50:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/176) took 10999 ms. Total solver calls (SAT/UNSAT): 2017(2017/0)
Jun 06, 2018 11:50:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/176) took 14076 ms. Total solver calls (SAT/UNSAT): 2535(2535/0)
Jun 06, 2018 11:50:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/176) took 17303 ms. Total solver calls (SAT/UNSAT): 3025(3025/0)
Jun 06, 2018 11:50:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/176) took 20954 ms. Total solver calls (SAT/UNSAT): 3615(3615/0)
Jun 06, 2018 11:50:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/176) took 24643 ms. Total solver calls (SAT/UNSAT): 4180(4180/0)
Jun 06, 2018 11:50:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/176) took 27827 ms. Total solver calls (SAT/UNSAT): 4614(4614/0)
Jun 06, 2018 11:50:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/176) took 30982 ms. Total solver calls (SAT/UNSAT): 5032(5032/0)
Jun 06, 2018 11:50:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/176) took 34501 ms. Total solver calls (SAT/UNSAT): 5551(5534/17)
Jun 06, 2018 11:50:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/176) took 37961 ms. Total solver calls (SAT/UNSAT): 6029(5994/35)
Jun 06, 2018 11:50:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/176) took 41524 ms. Total solver calls (SAT/UNSAT): 6484(6449/35)
Jun 06, 2018 11:50:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/176) took 44662 ms. Total solver calls (SAT/UNSAT): 6914(6879/35)
Jun 06, 2018 11:50:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/176) took 47710 ms. Total solver calls (SAT/UNSAT): 7319(7284/35)
Jun 06, 2018 11:50:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/176) took 51038 ms. Total solver calls (SAT/UNSAT): 7772(7737/35)
Jun 06, 2018 11:50:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/176) took 54408 ms. Total solver calls (SAT/UNSAT): 8255(8220/35)
Jun 06, 2018 11:50:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/176) took 57888 ms. Total solver calls (SAT/UNSAT): 8696(8661/35)
Jun 06, 2018 11:50:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/176) took 61139 ms. Total solver calls (SAT/UNSAT): 9140(9105/35)
Jun 06, 2018 11:50:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/176) took 64421 ms. Total solver calls (SAT/UNSAT): 9496(9461/35)
Jun 06, 2018 11:51:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/176) took 67445 ms. Total solver calls (SAT/UNSAT): 9900(9865/35)
Jun 06, 2018 11:51:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(144/176) took 70524 ms. Total solver calls (SAT/UNSAT): 10255(10220/35)
Jun 06, 2018 11:51:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/176) took 73596 ms. Total solver calls (SAT/UNSAT): 10537(10502/35)
Jun 06, 2018 11:51:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 74002 ms. Total solver calls (SAT/UNSAT): 10555(10505/50)
Jun 06, 2018 11:51:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 176 transitions.
Jun 06, 2018 11:51:09 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 06, 2018 11:51:09 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 86297ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-10.tgz
mv QuasiCertifProtocol-PT-10 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is QuasiCertifProtocol-PT-10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r188-qhx2-152732140200060"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;