fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r188-qhx2-152732140100002
Last Updated
June 26, 2018

About the Execution of ITS-Tools for ARMCacheCoherence-PT-none

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15755.950 124440.00 257443.00 5297.90 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 14M May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ARMCacheCoherence-PT-none, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r188-qhx2-152732140100002
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-00
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-01
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-02
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-03
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-04
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-05
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-06
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-07
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-08
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-09
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-10
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-11
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-12
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-13
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-14
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1528274065546

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 500
// Phase 1: matrix 500 rows 87 cols
invariant :u6:p40 + u6:p41 + u6:p42 + u6:p43 + u6:p44 + u6:p45 + u6:p46 + u6:p47 + u6:p48 + u6:p49 + u6:p50 + u6:p51 + u6:p52 + u6:p53 + u6:p54 + u13:p0 = 1
invariant :u2:p6 + u2:p7 + u13:p0 = 1
invariant :u12:p83 + u12:p84 + u12:p85 + u12:p86 + u13:p0 = 1
invariant :u1:p1 + u1:p2 + u1:p3 + u1:p4 + u1:p5 + u13:p0 = 1
invariant :u4:p10 + u4:p11 + u4:p12 + u4:p13 + u4:p14 + u4:p15 + u4:p16 + u4:p17 + u4:p18 + u4:p19 + u4:p20 + u4:p21 + u4:p22 + u4:p23 + u4:p24 + u13:p0 = 1
invariant :u5:p25 + u5:p26 + u5:p27 + u5:p28 + u5:p29 + u5:p30 + u5:p31 + u5:p32 + u5:p33 + u5:p34 + u5:p35 + u5:p36 + u5:p37 + u5:p38 + u5:p39 + u13:p0 = 1
invariant :u7:p55 + u7:p56 + u7:p57 + u7:p58 + u7:p59 + u7:p60 + u7:p61 + u7:p62 + u7:p63 + u7:p64 + u7:p65 + u7:p66 + u7:p67 + u7:p68 + u7:p69 + u13:p0 = 1
invariant :u8:p70 + u8:p71 + u13:p0 = 1
invariant :u3:p8 + u3:p9 + u13:p0 = 1
invariant :u9:p72 + u9:p73 + u9:p74 + u13:p0 = 1
invariant :u11:p79 + u11:p80 + u11:p81 + u11:p82 + u13:p0 = 1
invariant :u10:p75 + u10:p76 + u10:p77 + u10:p78 + u13:p0 = 1
Checking formula 0 : !((F(G(F(("((((u1.p4>=1)&&(u4.p22>=1))&&(u5.p39>=1))&&(u12.p84>=1))")U("((((u1.p4>=1)&&(u4.p22>=1))&&(u5.p37>=1))&&(u11.p80>=1))"))))))
Formula 0 simplified : !FGF("((((u1.p4>=1)&&(u4.p22>=1))&&(u5.p39>=1))&&(u12.p84>=1))" U "((((u1.p4>=1)&&(u4.p22>=1))&&(u5.p37>=1))&&(u11.p80>=1))")
built 50 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions u4.t106, u4.t107, u4.t108, u4.t109, u4.t110, u4.t111, u5.t80, u5.t81, u5.t82, u5.t83, u5.t84, u5.t85, u6.t54, u6.t55, u6.t56, u6.t57, u6.t58, u6.t59, u7.t28, u7.t29, u7.t30, u7.t31, u7.t32, u7.t33, u10.t19, u10.t20, u11.t10, u11.t11, u11.t12, u11.t13, u12.t1, u12.t2, u12.t3, u12.t4, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :32425/1240/11/33676
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
413 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,48.9062,111980,1,0,13653,2807,8070,13980,565,18822,52773
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(((F(G(F("((((u1.p4>=1)&&(u6.p54>=1))&&(u7.p67>=1))&&(u12.p84>=1))"))))U(F(G(G("((((u1.p3>=1)&&(u4.p24>=1))&&(u5.p39>=1))&&(u11.p80>=1))"))))))
Formula 1 simplified : !(FGF"((((u1.p4>=1)&&(u6.p54>=1))&&(u7.p67>=1))&&(u12.p84>=1))" U FG"((((u1.p3>=1)&&(u4.p24>=1))&&(u5.p39>=1))&&(u11.p80>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
871 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,57.6205,201820,1,0,240922,15385,8105,550528,565,248943,348737
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X(X(F(("((((u1.p4>=1)&&(u6.p54>=1))&&(u7.p69>=1))&&(u11.p80>=1))")U("((((u1.p4>=1)&&(u6.p52>=1))&&(u7.p67>=1))&&(u11.p80>=1))"))))))
Formula 2 simplified : !XXF("((((u1.p4>=1)&&(u6.p54>=1))&&(u7.p69>=1))&&(u11.p80>=1))" U "((((u1.p4>=1)&&(u6.p52>=1))&&(u7.p67>=1))&&(u11.p80>=1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
160 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,59.2248,237196,1,0,310420,15931,8183,662632,565,261657,460277
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((G("(((u1.p2>=1)&&(u6.p52>=1))&&(u12.p83>=1))")))
Formula 3 simplified : !G"(((u1.p2>=1)&&(u6.p52>=1))&&(u12.p83>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
5 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,59.2745,237972,1,0,310420,15931,8217,662634,565,261657,460310
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((F(G((G("((((u1.p2>=1)&&(u6.p52>=1))&&(u7.p69>=1))&&(u12.p84>=1))"))U("(((u1.p3>=1)&&(u4.p22>=1))&&(u10.p76>=1))")))))
Formula 4 simplified : !FG(G"((((u1.p2>=1)&&(u6.p52>=1))&&(u7.p69>=1))&&(u12.p84>=1))" U "(((u1.p3>=1)&&(u4.p22>=1))&&(u10.p76>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
6 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,59.332,238652,1,0,311640,16030,8317,664880,565,263259,462318
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((X((F(G("((((u1.p4>=1)&&(u4.p24>=1))&&(u5.p37>=1))&&(u12.p84>=1))")))U(F(F("(((u1.p3>=1)&&(u4.p22>=1))&&(u11.p80>=1))"))))))
Formula 5 simplified : !X(FG"((((u1.p4>=1)&&(u4.p24>=1))&&(u5.p37>=1))&&(u12.p84>=1))" U F"(((u1.p3>=1)&&(u4.p22>=1))&&(u11.p80>=1))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
139 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,60.7204,268992,1,0,371775,16548,8396,763830,565,286966,565273
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((X((X(F("(((u10.p78>=1)&&(u11.p82>=1))&&(u12.p86>=1))")))U(F(X("(((u1.p4>=1)&&(u3.p8>=1))&&(u11.p80>=1))"))))))
Formula 6 simplified : !X(XF"(((u10.p78>=1)&&(u11.p82>=1))&&(u12.p86>=1))" U FX"(((u1.p4>=1)&&(u3.p8>=1))&&(u11.p80>=1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
193 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,62.6537,294068,1,0,416894,17496,8446,844659,565,319074,648813
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((X(G(G(X("((((u1.p4>=1)&&(u6.p52>=1))&&(u7.p69>=1))&&(u11.p80>=1))"))))))
Formula 7 simplified : !XGX"((((u1.p4>=1)&&(u6.p52>=1))&&(u7.p69>=1))&&(u11.p80>=1))"
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
70 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,63.3532,296964,1,0,421540,18003,8472,852680,565,328004,659749
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((G(G(G(G(X("((((u1.p1>=1)&&(u6.p52>=1))&&(u7.p69>=1))&&(u11.p80>=1))")))))))
Formula 8 simplified : !GX"((((u1.p1>=1)&&(u6.p52>=1))&&(u7.p69>=1))&&(u11.p80>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,63.3667,297488,1,0,421540,18003,8502,852680,565,328004,659774
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((F("((((u1.p5>=1)&&(u6.p54>=1))&&(u7.p67>=1))&&(u12.p84>=1))")))
Formula 9 simplified : !F"((((u1.p5>=1)&&(u6.p54>=1))&&(u7.p67>=1))&&(u12.p84>=1))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
90 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,64.2647,315176,1,0,458377,18320,8546,909122,565,333904,713241
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((F((G(F("((((u1.p5>=1)&&(u4.p24>=1))&&(u5.p39>=1))&&(u11.p80>=1))")))U(X("((((u1.p4>=1)&&(u4.p22>=1))&&(u5.p37>=1))&&(u12.p84>=1))")))))
Formula 10 simplified : !F(GF"((((u1.p5>=1)&&(u4.p24>=1))&&(u5.p39>=1))&&(u11.p80>=1))" U X"((((u1.p4>=1)&&(u4.p22>=1))&&(u5.p37>=1))&&(u12.p84>=1))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
354 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,67.8148,373784,1,0,545997,20014,8575,1.10028e+06,565,403991,842110
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((G(X(G(("(((u1.p5>=1)&&(u7.p67>=1))&&(u11.p80>=1))")U("((((u1.p5>=1)&&(u6.p54>=1))&&(u7.p69>=1))&&(u11.p80>=1))"))))))
Formula 11 simplified : !GXG("(((u1.p5>=1)&&(u7.p67>=1))&&(u11.p80>=1))" U "((((u1.p5>=1)&&(u6.p54>=1))&&(u7.p69>=1))&&(u11.p80>=1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,67.828,373956,1,0,545997,20014,8613,1.10028e+06,565,403991,842153
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !((G(X(G(("((((u1.p3>=1)&&(u4.p22>=1))&&(u5.p39>=1))&&(u11.p80>=1))")U("((((u1.p1>=1)&&(u4.p24>=1))&&(u5.p39>=1))&&(u11.p80>=1))"))))))
Formula 12 simplified : !GXG("((((u1.p3>=1)&&(u4.p22>=1))&&(u5.p39>=1))&&(u11.p80>=1))" U "((((u1.p1>=1)&&(u4.p24>=1))&&(u5.p39>=1))&&(u11.p80>=1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,67.8378,373956,1,0,545997,20014,8653,1.10028e+06,565,403991,842196
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !(("((((u1.p4>=1)&&(u6.p54>=1))&&(u7.p67>=1))&&(u11.p80>=1))"))
Formula 13 simplified : !"((((u1.p4>=1)&&(u6.p54>=1))&&(u7.p67>=1))&&(u11.p80>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,67.8415,373956,1,0,545997,20014,8662,1.10028e+06,565,403991,842204
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !(((("((((u1.p5>=1)&&(u6.p54>=1))&&(u7.p67>=1))&&(u11.p80>=1))")U(G("((((u1.p5>=1)&&(u4.p24>=1))&&(u5.p37>=1))&&(u11.p80>=1))")))U(G(("((((u1.p4>=1)&&(u4.p24>=1))&&(u5.p39>=1))&&(u12.p84>=1))")U("((((u1.p4>=1)&&(u6.p52>=1))&&(u7.p69>=1))&&(u12.p84>=1))")))))
Formula 14 simplified : !(("((((u1.p5>=1)&&(u6.p54>=1))&&(u7.p67>=1))&&(u11.p80>=1))" U G"((((u1.p5>=1)&&(u4.p24>=1))&&(u5.p37>=1))&&(u11.p80>=1))") U G("((((u1.p4>=1)&&(u4.p24>=1))&&(u5.p39>=1))&&(u12.p84>=1))" U "((((u1.p4>=1)&&(u6.p52>=1))&&(u7.p69>=1))&&(u12.p84>=1))"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,67.8892,375128,1,0,545997,20014,8810,1.10028e+06,571,403991,842312
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((F(G(G(G(X("((((u1.p4>=1)&&(u6.p54>=1))&&(u7.p69>=1))&&(u12.p84>=1))")))))))
Formula 15 simplified : !FGX"((((u1.p4>=1)&&(u6.p54>=1))&&(u7.p69>=1))&&(u12.p84>=1))"
3 unique states visited
2 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,67.9049,375128,1,0,546124,20014,8823,1.10048e+06,571,404077,842560
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1528274189986

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 8:34:43 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 06, 2018 8:34:43 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 8:34:45 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 1710 ms
Jun 06, 2018 8:34:45 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 87 places.
Jun 06, 2018 8:34:47 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 33676 transitions.
Jun 06, 2018 8:34:47 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 06, 2018 8:34:47 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 06, 2018 8:34:51 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 06, 2018 8:35:00 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 9251 ms
Jun 06, 2018 8:35:00 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 06, 2018 8:35:12 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 123217 redundant transitions.
Jun 06, 2018 8:35:14 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 328 ms
Jun 06, 2018 8:35:14 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Jun 06, 2018 8:35:28 AM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 32425 identical transitions.
Jun 06, 2018 8:35:28 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1251 transitions.
Jun 06, 2018 8:35:29 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 12 place invariants in 112 ms
Jun 06, 2018 8:35:31 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 87 variables to be positive in 1800 ms
Jun 06, 2018 8:35:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1251 transitions.
Jun 06, 2018 8:35:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1251 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 8:35:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 224 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 8:35:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1251 transitions.
Jun 06, 2018 8:35:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 186 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 8:36:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1251 transitions.
Jun 06, 2018 8:36:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1251) took 810 ms. Total solver calls (SAT/UNSAT): 1250(0/1250)
Jun 06, 2018 8:36:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/1251) took 3875 ms. Total solver calls (SAT/UNSAT): 4631(484/4147)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:517)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 06, 2018 8:36:28 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 74268ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ARMCacheCoherence-PT-none, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r188-qhx2-152732140100002"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;