fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r177-smll-152708747900425
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for Vasy2003-PT-none

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15754.330 13195.00 42557.00 330.80 FTTTFTFTFFFFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.........................
/home/mcc/execution
total 364K
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.4K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 207K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is Vasy2003-PT-none, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r177-smll-152708747900425
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-00
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-01
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-02
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-03
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-04
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-05
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-06
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-07
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-08
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-09
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-10
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-11
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-12
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-13
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-14
FORMULA_NAME Vasy2003-PT-none-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527624512143

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 696
// Phase 1: matrix 696 rows 485 cols
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 696
// Phase 1: matrix 696 rows 485 cols
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : Vasy2003-PT-none-ReachabilityCardinality-00 with value :((u52.p307>=2)||(u57.p456>=3))
Read [invariant] property : Vasy2003-PT-none-ReachabilityCardinality-01 with value :(((u52.p395==0)||(u37.p102==1))||((u52.p438==0)||(u52.p293==1)))
Read [invariant] property : Vasy2003-PT-none-ReachabilityCardinality-02 with value :(!(u32.p91>=2))
Read [reachable] property : Vasy2003-PT-none-ReachabilityCardinality-03 with value :((!((u56.p450==0)||(u2.p3==1)))&&((((u52.p226==0)||(u15.p36==1))||((u41.p111==0)||(u52.p173==1)))&&(!((u52.p321==0)||(u52.p310==1)))))
Read [reachable] property : Vasy2003-PT-none-ReachabilityCardinality-04 with value :((!(((u52.p255==0)||(u52.p130==1))||((u52.p276==0)||(u58.p467==1))))&&((u28.p83==0)||(u52.p139==1)))
Read [invariant] property : Vasy2003-PT-none-ReachabilityCardinality-05 with value :((!(u52.p231>=3))||(((u30.p88==0)||(u52.p231==1))&&(!((u5.p9==0)||(u52.p178==1)))))
Read [invariant] property : Vasy2003-PT-none-ReachabilityCardinality-06 with value :(!((!((u21.p68==0)||(u43.p117==1)))||((u52.p379>=3)&&((u6.p11==0)||(u52.p260==1)))))
Read [invariant] property : Vasy2003-PT-none-ReachabilityCardinality-07 with value :(!((u52.p389>=1)&&(u15.p34>=3)))
Read [invariant] property : Vasy2003-PT-none-ReachabilityCardinality-08 with value :((((u58.p467>=2)||(u52.p235>=1))&&(((u52.p316==0)||(u30.p87==1))||((u52.p408==0)||(u35.p98==1))))||((u52.p431==0)||(u5.p9==1)))
Read [reachable] property : Vasy2003-PT-none-ReachabilityCardinality-09 with value :(u52.p313>=2)
Read [reachable] property : Vasy2003-PT-none-ReachabilityCardinality-10 with value :(((u52.p313>=3)&&(!((u9.p18==0)||(u58.p480==1))))&&((u52.p172==0)||(u52.p274==1)))
Read [invariant] property : Vasy2003-PT-none-ReachabilityCardinality-11 with value :((u52.p253>=2)||((u52.p214==0)||(u52.p193==1)))
Read [invariant] property : Vasy2003-PT-none-ReachabilityCardinality-12 with value :(!((!((u52.p273==0)||(u52.p358==1)))&&(((u25.p77==0)||(u52.p409==1))&&(u2.p4>=1))))
Read [reachable] property : Vasy2003-PT-none-ReachabilityCardinality-13 with value :(!(((u56.p450>=1)||(u36.p99>=1))||(((u52.p413==0)||(u52.p221==1))&&((u52.p269==0)||(u52.p385==1)))))
Read [reachable] property : Vasy2003-PT-none-ReachabilityCardinality-14 with value :(u52.p370>=2)
Read [reachable] property : Vasy2003-PT-none-ReachabilityCardinality-15 with value :(u52.p144>=3)
built 93 ordering constraints for composite.
invariant :p57 + p58 + -1'p123 = 0
invariant :p77 + p78 + -1'p123 = 0
invariant :p109 + -1'p184 + -1'p431 = 0
invariant :p101 + p102 + -1'p123 = 0
invariant :p95 + p96 + -1'p123 = 0
invariant :p1 + p2 + -1'p123 = 0
invariant :p81 + p82 + -1'p123 = 0
invariant :p112 + -1'p186 + -1'p433 = 0
invariant :p15 + p16 + -1'p123 = 0
invariant :p91 + p92 + -1'p123 = 0
invariant :p107 + p108 + -1'p123 = 0
invariant :p113 + p114 + -1'p123 + p186 + p433 = 0
invariant :p27 + p28 + p29 + p30 + p31 + p32 + -1'p123 = 0
invariant :-1'p123 + p192 + p440 + p451 + p452 + p453 + p454 + p455 + p456 + p457 + p458 + p459 + p460 + p461 + p462 + p463 + p465 + -1'p479 = 0
invariant :p21 + p22 + -1'p123 = 0
invariant :p0 + p123 = 1
invariant :p62 + p63 + -1'p123 = 0
invariant :p123 + -1'p190 + -1'p245 + -1'p248 + -1'p250 + -1'p303 + -1'p306 + -1'p438 + p481 + -1'p484 = 0
invariant :p48 + p49 + p53 + p54 + p55 + p56 + -1'p123 + p446 = 0
invariant :p11 + p12 + -1'p123 = 0
invariant :p17 + p18 + -1'p123 = 0
invariant :p99 + p100 + -1'p123 = 0
invariant :p75 + p76 + -1'p123 = 0
invariant :p105 + p106 + -1'p123 = 0
invariant :p23 + p24 + -1'p123 = 0
invariant :p9 + p10 + -1'p123 = 0
invariant :p110 + p111 + -1'p123 + p184 + p431 = 0
invariant :-1'p123 + p124 + p125 = 0
invariant :p59 + p60 + p61 + -1'p123 = 0
invariant :p39 + p40 + p41 + p42 + p43 + p44 + -1'p123 = 0
invariant :-1'p123 + p444 + p445 = 0
invariant :p3 + p4 + -1'p123 = 0
invariant :p119 + -1'p123 = 0
invariant :p85 + p86 + -1'p123 = 0
invariant :-1'p123 + p126 + p127 = 0
invariant :-1'p123 + p128 + p129 + p130 + p131 + p132 + p133 + p134 + p135 + p136 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 + p145 + p146 + p147 + p148 + p149 + p150 + p151 + p152 + p153 + p154 + p155 + p156 + p157 + p158 + p159 + p160 + p161 + p162 + p163 + p164 + p165 + p166 + p167 + p168 + p169 + p170 + p171 + p172 + p173 + p174 + p175 + p176 + p177 + p178 + p179 + p180 + p181 + p182 + p183 + p184 + p185 + p186 + p187 + p188 + p189 + p190 + p191 + p192 + p193 + p194 + p195 + p196 + p197 + p198 + p199 + p200 + p201 + p202 + p203 + p204 + p205 + p206 + p207 + p208 + p209 + p210 + p211 + p212 + p213 + p214 + p215 + p216 + p217 + p218 + p219 + p220 + p221 + p222 + p223 + p224 + p225 + p226 + p227 + p228 + p229 + p230 + p231 + p232 + p233 + p234 + p235 + p236 + p237 + p238 + p239 + p240 + p241 + p242 + p243 + p244 + p245 + p246 + p247 + p248 + p249 + p250 + p251 + p252 + p253 + p254 + p255 + p256 + p257 + p258 + p259 + p260 + p261 + p262 + p263 + p264 + p265 + p266 + p267 + p268 + p269 + p270 + p271 + p272 + p273 + p274 + p275 + p276 + p277 + p278 + p279 + p280 + p281 + p282 + p283 + p284 + p285 + p286 + p287 + p288 + p289 + p290 + p291 + p292 + p293 + p294 + p295 + p296 + p297 + p298 + p299 + p300 + p301 + p302 + p303 + p304 + p305 + p306 + p307 + p308 + p309 + p310 + p311 + p312 + p313 + p314 + p315 + p316 + p317 + p318 + p319 + p320 + p321 + p322 + p323 + p324 + p325 + p326 + p327 + p328 + p329 + p330 + p331 + p332 + p333 + p334 + p335 + p336 + p337 + p338 + p339 + p340 + p341 + p342 + p343 + p344 + p345 + p346 + p347 + p348 + p349 + p350 + p351 + p352 + p353 + p354 + p355 + p356 + p357 + p358 + p359 + p360 + p361 + p362 + p363 + p364 + p365 + p366 + p367 + p368 + p369 + p370 + p371 + p372 + p373 + p374 + p375 + p376 + p377 + p378 + p379 + p380 + p381 + p382 + p383 + p384 + p385 + p386 + p387 + p388 + p389 + p390 + p391 + p392 + p393 + p394 + p395 + p396 + p397 + p398 + p399 + p400 + p401 + p402 + p403 + p404 + p405 + p406 + p407 + p408 + p409 + p410 + p411 + p412 + p413 + p414 + p415 + p416 + p417 + p418 + p419 + p420 + p421 + p422 + p423 + p424 + p425 + p426 + p427 + p428 + p429 + p430 + p431 + p432 + p433 + p434 + p435 + p436 + p437 + p438 + p439 + p440 + p441 = 0
invariant :p116 + p117 + -1'p123 + p188 + p435 = 0
invariant :p83 + p84 + -1'p123 = 0
invariant :p120 + -1'p123 = 0
invariant :p25 + p26 + -1'p123 = 0
invariant :p103 + p104 + -1'p123 = 0
invariant :p64 + p65 + p66 + p67 + p68 + -1'p123 = 0
invariant :p93 + p94 + -1'p123 = 0
invariant :p5 + p6 + -1'p123 = 0
invariant :-1'p123 + p466 + p467 + p468 + p469 + p470 + p471 + p472 + p473 + p474 + p475 + p476 + p477 + p478 + p479 + p480 = 0
invariant :-1'p123 + p442 + p443 = 0
invariant :p89 + p90 + -1'p123 = 0
invariant :-2'p123 + p190 + p245 + p248 + p250 + p303 + p306 + p438 + p482 + p484 = 0
invariant :p79 + p80 + -1'p123 = 0
invariant :-1'p123 + p446 + p447 + p448 = 0
invariant :p118 + -1'p123 = 0
invariant :p115 + -1'p188 + -1'p435 = 0
invariant :p19 + p20 + -1'p123 = 0
invariant :-1'p123 + p449 + p450 = 0
invariant :p69 + p70 + p71 + -1'p123 = 0
invariant :p97 + p98 + -1'p123 = 0
invariant :p33 + p34 + p35 + p36 + p37 + p38 + -1'p123 = 0
invariant :-1'p192 + -1'p440 + p464 + p479 = 0
invariant :p72 + p73 + p74 + -1'p123 = 0
invariant :p122 + -1'p123 = 0
invariant :p87 + p88 + -1'p123 = 0
invariant :p13 + p14 + -1'p123 = 0
invariant :p45 + p46 + p47 + p50 + p51 + p52 + -1'p446 = 0
invariant :-1'p123 + p483 + p484 = 0
invariant :p7 + p8 + -1'p123 = 0
invariant :p121 + -1'p123 = 0
invariant :p57 + p58 + -1'p123 = 0
invariant :p77 + p78 + -1'p123 = 0
invariant :p109 + -1'p184 + -1'p431 = 0
invariant :p101 + p102 + -1'p123 = 0
invariant :p95 + p96 + -1'p123 = 0
invariant :p1 + p2 + -1'p123 = 0
invariant :p81 + p82 + -1'p123 = 0
invariant :p112 + -1'p186 + -1'p433 = 0
invariant :p15 + p16 + -1'p123 = 0
invariant :p91 + p92 + -1'p123 = 0
invariant :p107 + p108 + -1'p123 = 0
invariant :p113 + p114 + -1'p123 + p186 + p433 = 0
invariant :p27 + p28 + p29 + p30 + p31 + p32 + -1'p123 = 0
invariant :-1'p123 + p192 + p440 + p451 + p452 + p453 + p454 + p455 + p456 + p457 + p458 + p459 + p460 + p461 + p462 + p463 + p465 + -1'p479 = 0
invariant :p21 + p22 + -1'p123 = 0
invariant :p0 + p123 = 1
invariant :p62 + p63 + -1'p123 = 0
invariant :p123 + -1'p190 + -1'p245 + -1'p248 + -1'p250 + -1'p303 + -1'p306 + -1'p438 + p481 + -1'p484 = 0
invariant :p48 + p49 + p53 + p54 + p55 + p56 + -1'p123 + p446 = 0
invariant :p11 + p12 + -1'p123 = 0
invariant :p17 + p18 + -1'p123 = 0
invariant :p99 + p100 + -1'p123 = 0
invariant :p75 + p76 + -1'p123 = 0
invariant :p105 + p106 + -1'p123 = 0
invariant :p23 + p24 + -1'p123 = 0
invariant :p9 + p10 + -1'p123 = 0
invariant :p110 + p111 + -1'p123 + p184 + p431 = 0
invariant :-1'p123 + p124 + p125 = 0
invariant :p59 + p60 + p61 + -1'p123 = 0
invariant :p39 + p40 + p41 + p42 + p43 + p44 + -1'p123 = 0
invariant :-1'p123 + p444 + p445 = 0
invariant :p3 + p4 + -1'p123 = 0
invariant :p119 + -1'p123 = 0
invariant :p85 + p86 + -1'p123 = 0
invariant :-1'p123 + p126 + p127 = 0
invariant :-1'p123 + p128 + p129 + p130 + p131 + p132 + p133 + p134 + p135 + p136 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 + p145 + p146 + p147 + p148 + p149 + p150 + p151 + p152 + p153 + p154 + p155 + p156 + p157 + p158 + p159 + p160 + p161 + p162 + p163 + p164 + p165 + p166 + p167 + p168 + p169 + p170 + p171 + p172 + p173 + p174 + p175 + p176 + p177 + p178 + p179 + p180 + p181 + p182 + p183 + p184 + p185 + p186 + p187 + p188 + p189 + p190 + p191 + p192 + p193 + p194 + p195 + p196 + p197 + p198 + p199 + p200 + p201 + p202 + p203 + p204 + p205 + p206 + p207 + p208 + p209 + p210 + p211 + p212 + p213 + p214 + p215 + p216 + p217 + p218 + p219 + p220 + p221 + p222 + p223 + p224 + p225 + p226 + p227 + p228 + p229 + p230 + p231 + p232 + p233 + p234 + p235 + p236 + p237 + p238 + p239 + p240 + p241 + p242 + p243 + p244 + p245 + p246 + p247 + p248 + p249 + p250 + p251 + p252 + p253 + p254 + p255 + p256 + p257 + p258 + p259 + p260 + p261 + p262 + p263 + p264 + p265 + p266 + p267 + p268 + p269 + p270 + p271 + p272 + p273 + p274 + p275 + p276 + p277 + p278 + p279 + p280 + p281 + p282 + p283 + p284 + p285 + p286 + p287 + p288 + p289 + p290 + p291 + p292 + p293 + p294 + p295 + p296 + p297 + p298 + p299 + p300 + p301 + p302 + p303 + p304 + p305 + p306 + p307 + p308 + p309 + p310 + p311 + p312 + p313 + p314 + p315 + p316 + p317 + p318 + p319 + p320 + p321 + p322 + p323 + p324 + p325 + p326 + p327 + p328 + p329 + p330 + p331 + p332 + p333 + p334 + p335 + p336 + p337 + p338 + p339 + p340 + p341 + p342 + p343 + p344 + p345 + p346 + p347 + p348 + p349 + p350 + p351 + p352 + p353 + p354 + p355 + p356 + p357 + p358 + p359 + p360 + p361 + p362 + p363 + p364 + p365 + p366 + p367 + p368 + p369 + p370 + p371 + p372 + p373 + p374 + p375 + p376 + p377 + p378 + p379 + p380 + p381 + p382 + p383 + p384 + p385 + p386 + p387 + p388 + p389 + p390 + p391 + p392 + p393 + p394 + p395 + p396 + p397 + p398 + p399 + p400 + p401 + p402 + p403 + p404 + p405 + p406 + p407 + p408 + p409 + p410 + p411 + p412 + p413 + p414 + p415 + p416 + p417 + p418 + p419 + p420 + p421 + p422 + p423 + p424 + p425 + p426 + p427 + p428 + p429 + p430 + p431 + p432 + p433 + p434 + p435 + p436 + p437 + p438 + p439 + p440 + p441 = 0
invariant :p116 + p117 + -1'p123 + p188 + p435 = 0
invariant :p83 + p84 + -1'p123 = 0
invariant :p120 + -1'p123 = 0
invariant :p25 + p26 + -1'p123 = 0
invariant :p103 + p104 + -1'p123 = 0
invariant :p64 + p65 + p66 + p67 + p68 + -1'p123 = 0
invariant :p93 + p94 + -1'p123 = 0
invariant :p5 + p6 + -1'p123 = 0
invariant :-1'p123 + p466 + p467 + p468 + p469 + p470 + p471 + p472 + p473 + p474 + p475 + p476 + p477 + p478 + p479 + p480 = 0
invariant :-1'p123 + p442 + p443 = 0
invariant :p89 + p90 + -1'p123 = 0
invariant :-2'p123 + p190 + p245 + p248 + p250 + p303 + p306 + p438 + p482 + p484 = 0
invariant :p79 + p80 + -1'p123 = 0
invariant :-1'p123 + p446 + p447 + p448 = 0
invariant :p118 + -1'p123 = 0
invariant :p115 + -1'p188 + -1'p435 = 0
invariant :p19 + p20 + -1'p123 = 0
invariant :-1'p123 + p449 + p450 = 0
invariant :p69 + p70 + p71 + -1'p123 = 0
invariant :p97 + p98 + -1'p123 = 0
invariant :p33 + p34 + p35 + p36 + p37 + p38 + -1'p123 = 0
invariant :-1'p192 + -1'p440 + p464 + p479 = 0
invariant :p72 + p73 + p74 + -1'p123 = 0
invariant :p122 + -1'p123 = 0
invariant :p87 + p88 + -1'p123 = 0
invariant :p13 + p14 + -1'p123 = 0
invariant :p45 + p46 + p47 + p50 + p51 + p52 + -1'p446 = 0
invariant :-1'p123 + p483 + p484 = 0
invariant :p7 + p8 + -1'p123 = 0
invariant :p121 + -1'p123 = 0
FORMULA Vasy2003-PT-none-ReachabilityCardinality-00 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003\_PT\_none\_flat\_flat\_flat\_flat\_mod,9.79474e+21,6.47514,137360,347,3458,29778,236652,1541,41687,1744,1.68095e+06,0
Total reachable state count : 9794739147610899087360

Verifying 16 reachability properties.
Reachability property Vasy2003-PT-none-ReachabilityCardinality-00 does not hold.
No reachable states exhibit your property : Vasy2003-PT-none-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-00,0,6.47831,137416,1,0,29778,236652,1546,41687,1747,1.68095e+06,0
Invariant property Vasy2003-PT-none-ReachabilityCardinality-01 is true.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-01,0,6.48525,137512,1,0,29778,236652,1561,41687,1758,1.68095e+06,216
Invariant property Vasy2003-PT-none-ReachabilityCardinality-02 is true.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-02,0,6.48583,137512,1,0,29778,236652,1565,41687,1760,1.68095e+06,216
Reachability property Vasy2003-PT-none-ReachabilityCardinality-03 is true.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-03,2.01989e+18,6.49383,137512,75,346,29778,236652,1596,41687,1779,1.68095e+06,647
Reachability property Vasy2003-PT-none-ReachabilityCardinality-04 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : Vasy2003-PT-none-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-04,0,6.49827,137512,1,0,29778,236652,1617,41687,1789,1.68095e+06,719
Invariant property Vasy2003-PT-none-ReachabilityCardinality-05 is true.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-05,0,6.51278,137512,1,0,29778,236652,1634,41687,1797,1.68095e+06,1344
Invariant property Vasy2003-PT-none-ReachabilityCardinality-06 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-06,6.46365e+18,6.51411,137512,77,603,29778,236652,1649,41687,1801,1.68095e+06,1379
Invariant property Vasy2003-PT-none-ReachabilityCardinality-07 is true.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-07,0,6.51585,137512,1,0,29778,236652,1656,41687,1803,1.68095e+06,1392
Invariant property Vasy2003-PT-none-ReachabilityCardinality-08 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-08,6.92534e+18,6.52395,137512,117,361,29778,236652,1681,41687,1812,1.68095e+06,1793
Reachability property Vasy2003-PT-none-ReachabilityCardinality-09 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : Vasy2003-PT-none-ReachabilityCardinality-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-09,0,6.52522,137512,1,0,29778,236652,1683,41687,1813,1.68095e+06,1793
Reachability property Vasy2003-PT-none-ReachabilityCardinality-10 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : Vasy2003-PT-none-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-10,0,6.52828,137512,1,0,29778,236652,1703,41687,1821,1.68095e+06,2093
Invariant property Vasy2003-PT-none-ReachabilityCardinality-11 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-11,3.23183e+19,6.53075,137512,78,347,29778,236652,1715,41687,1833,1.68095e+06,2093
Invariant property Vasy2003-PT-none-ReachabilityCardinality-12 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-12,4.03978e+18,6.53548,137512,75,346,29778,236652,1733,41687,1842,1.68095e+06,2134
Reachability property Vasy2003-PT-none-ReachabilityCardinality-13 is true.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-13,1.51492e+19,6.54398,137512,140,551,29778,236652,1755,41687,1854,1.68095e+06,2343
Reachability property Vasy2003-PT-none-ReachabilityCardinality-14 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : Vasy2003-PT-none-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-14,0,6.54495,137512,1,0,29778,236652,1757,41687,1855,1.68095e+06,2343
Reachability property Vasy2003-PT-none-ReachabilityCardinality-15 does not hold.
FORMULA Vasy2003-PT-none-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : Vasy2003-PT-none-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Vasy2003-PT-none-ReachabilityCardinality-15,0,6.54701,137512,1,0,29778,236652,1759,41687,1856,1.68095e+06,2343
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527624525338

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 8:08:34 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 29, 2018 8:08:34 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 8:08:34 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 137 ms
May 29, 2018 8:08:34 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 485 places.
May 29, 2018 8:08:35 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 776 transitions.
May 29, 2018 8:08:35 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 29, 2018 8:08:35 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 35 ms
May 29, 2018 8:08:35 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 295 ms
May 29, 2018 8:08:35 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 29, 2018 8:08:35 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 262 ms
May 29, 2018 8:08:35 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 273 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 149 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 29, 2018 8:08:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 776 transitions.
May 29, 2018 8:08:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 776 transitions.
May 29, 2018 8:08:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 223 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 707 ms.
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-00(UNSAT) depth K=0 took 13 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-01(UNSAT) depth K=0 took 9 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-02(UNSAT) depth K=0 took 17 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-03(UNSAT) depth K=0 took 20 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-04(UNSAT) depth K=0 took 16 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-05(UNSAT) depth K=0 took 27 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-06(UNSAT) depth K=0 took 12 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-07(UNSAT) depth K=0 took 12 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-08(UNSAT) depth K=0 took 12 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 776 transitions.
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-09(UNSAT) depth K=0 took 12 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-10(UNSAT) depth K=0 took 7 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-11(UNSAT) depth K=0 took 11 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-12(UNSAT) depth K=0 took 8 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-13(UNSAT) depth K=0 took 16 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-14(UNSAT) depth K=0 took 21 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-15(UNSAT) depth K=0 took 6 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-00(UNSAT) depth K=1 took 16 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-01(UNSAT) depth K=1 took 11 ms
May 29, 2018 8:08:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-02(UNSAT) depth K=1 took 12 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-03(UNSAT) depth K=1 took 12 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-04(UNSAT) depth K=1 took 11 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-05(UNSAT) depth K=1 took 12 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-06(UNSAT) depth K=1 took 16 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-07(UNSAT) depth K=1 took 12 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-08(UNSAT) depth K=1 took 16 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-09(UNSAT) depth K=1 took 11 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-10(UNSAT) depth K=1 took 12 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-11(UNSAT) depth K=1 took 20 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-12(UNSAT) depth K=1 took 12 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-13(UNSAT) depth K=1 took 16 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-14(UNSAT) depth K=1 took 16 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-15(UNSAT) depth K=1 took 11 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 702 redundant transitions.
May 29, 2018 8:08:37 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 12 ms
May 29, 2018 8:08:37 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-00(UNSAT) depth K=2 took 507 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-01(UNSAT) depth K=2 took 23 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-02(UNSAT) depth K=2 took 32 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-03(UNSAT) depth K=2 took 24 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-04(UNSAT) depth K=2 took 15 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-05(UNSAT) depth K=2 took 32 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-06(UNSAT) depth K=2 took 34 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-07(UNSAT) depth K=2 took 20 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-08(UNSAT) depth K=2 took 13 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-09(UNSAT) depth K=2 took 11 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 66 place invariants in 1104 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-10(UNSAT) depth K=2 took 49 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-11(UNSAT) depth K=2 took 24 ms
May 29, 2018 8:08:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-12(UNSAT) depth K=2 took 20 ms
May 29, 2018 8:08:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-13(UNSAT) depth K=2 took 32 ms
May 29, 2018 8:08:38 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 66 place invariants in 719 ms
May 29, 2018 8:08:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-14(UNSAT) depth K=2 took 33 ms
May 29, 2018 8:08:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-15(UNSAT) depth K=2 took 27 ms
May 29, 2018 8:08:41 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 485 variables to be positive in 4626 ms
May 29, 2018 8:08:41 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 485 variables to be positive in 5178 ms
May 29, 2018 8:08:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 776 transitions.
May 29, 2018 8:08:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/776 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 8:08:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 121 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 8:08:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 776 transitions.
May 29, 2018 8:08:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 113 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 8:08:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Vasy2003-PT-none-ReachabilityCardinality-00(UNSAT) depth K=3 took 5647 ms
May 29, 2018 8:08:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Vasy2003-PT-none-ReachabilityCardinality-00
May 29, 2018 8:08:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Vasy2003-PT-none-ReachabilityCardinality-00
May 29, 2018 8:08:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Vasy2003-PT-none-ReachabilityCardinality-00(FALSE) depth K=0 took 2001 ms
May 29, 2018 8:08:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 29, 2018 8:08:44 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:766)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:502)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 29, 2018 8:08:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying Vasy2003-PT-none-ReachabilityCardinality-01 SMT depth 3
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 29, 2018 8:08:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
May 29, 2018 8:08:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 29, 2018 8:08:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying Vasy2003-PT-none-ReachabilityCardinality-01 K-induction depth 0
Exception in thread "Thread-6" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 29, 2018 8:08:44 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 1/ 16 properties. Interrupting other analysis methods.
May 29, 2018 8:08:44 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 8603ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Vasy2003-PT-none"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Vasy2003-PT-none.tgz
mv Vasy2003-PT-none execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is Vasy2003-PT-none, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r177-smll-152708747900425"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;