Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 5.3M
-rw-r--r-- 1 mcc users 51K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 177K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 509K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.5M May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 17K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 54K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 171K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 481K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 62K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 210K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 339K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 957K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 14K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 35K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 802K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is TokenRing-PT-010, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r177-smll-152708747800320
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-00
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-01
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-02
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-03
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-04
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-05
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-06
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-07
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-08
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-09
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-10
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-11
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-12
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-13
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-14
FORMULA_NAME TokenRing-PT-010-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527559317422

FORMULA TokenRing-PT-010-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TokenRing-PT-010-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TokenRing-PT-010-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TokenRing-PT-010-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TokenRing-PT-010-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : TokenRing-PT-010-ReachabilityCardinality-02 with value :((!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((State_9_0+State_2_4)+State_8_1)+State_1_10)+State_6_2)+State_4_8)+State_4_3)+State_9_5)+State_8_9)+State_6_1)+State_8_4)+State_9_7)+State_6_6)+State_5_8)+State_3_0)+State_4_10)+State_10_10)+State_2_2)+State_10_5)+State_1_9)+State_3_7)+State_1_4)+State_10_0)+State_5_3)+State_9_2)+State_4_5)+State_5_1)+State_0_6)+State_8_2)+State_6_8)+State_2_0)+State_3_2)+State_9_9)+State_4_1)+State_4_7)+State_8_7)+State_6_3)+State_9_4)+State_5_6)+State_0_4)+State_3_10)+State_0_2)+State_3_5)+State_0_8)+State_1_6)+State_10_3)+State_7_8)+State_4_0)+State_1_7)+State_0_9)+State_4_6)+State_10_8)+State_6_4)+State_6_9)+State_6_10)+State_10_7)+State_8_8)+State_1_2)+State_5_10)+State_5_0)+State_0_3)+State_9_3)+State_5_5)+State_7_4)+State_9_8)+State_7_9)+State_2_7)+State_3_6)+State_10_2)+State_3_1)+State_4_4)+State_6_7)+State_0_5)+State_8_3)+State_1_3)+State_6_0)+State_2_1)+State_9_6)+State_5_2)+State_5_4)+State_6_5)+State_7_0)+State_9_1)+State_1_8)+State_7_3)+State_2_6)+State_4_2)+State_5_7)+State_0_7)+State_1_1)+State_2_3)+State_10_4)+State_7_10)+State_5_9)+State_8_10)+State_4_9)+State_10_6)+State_10_1)+State_2_8)+State_7_5)+State_7_1)+State_10_9)+State_3_9)+State_0_1)+State_2_5)+State_8_6)+State_7_2)+State_3_3)+State_8_5)+State_8_0)+State_1_0)+State_3_8)+State_0_0)+State_9_10)+State_7_6)+State_1_5)+State_3_4)+State_0_10)+State_2_9)+State_7_7)+State_2_10)>=1))&&((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((State_9_0+State_2_4)+State_8_1)+State_1_10)+State_6_2)+State_4_8)+State_4_3)+State_9_5)+State_8_9)+State_6_1)+State_8_4)+State_9_7)+State_6_6)+State_5_8)+State_3_0)+State_4_10)+State_10_10)+State_2_2)+State_10_5)+State_1_9)+State_3_7)+State_1_4)+State_10_0)+State_5_3)+State_9_2)+State_4_5)+State_5_1)+State_0_6)+State_8_2)+State_6_8)+State_2_0)+State_3_2)+State_9_9)+State_4_1)+State_4_7)+State_8_7)+State_6_3)+State_9_4)+State_5_6)+State_0_4)+State_3_10)+State_0_2)+State_3_5)+State_0_8)+State_1_6)+State_10_3)+State_7_8)+State_4_0)+State_1_7)+State_0_9)+State_4_6)+State_10_8)+State_6_4)+State_6_9)+State_6_10)+State_10_7)+State_8_8)+State_1_2)+State_5_10)+State_5_0)+State_0_3)+State_9_3)+State_5_5)+State_7_4)+State_9_8)+State_7_9)+State_2_7)+State_3_6)+State_10_2)+State_3_1)+State_4_4)+State_6_7)+State_0_5)+State_8_3)+State_1_3)+State_6_0)+State_2_1)+State_9_6)+State_5_2)+State_5_4)+State_6_5)+State_7_0)+State_9_1)+State_1_8)+State_7_3)+State_2_6)+State_4_2)+State_5_7)+State_0_7)+State_1_1)+State_2_3)+State_10_4)+State_7_10)+State_5_9)+State_8_10)+State_4_9)+State_10_6)+State_10_1)+State_2_8)+State_7_5)+State_7_1)+State_10_9)+State_3_9)+State_0_1)+State_2_5)+State_8_6)+State_7_2)+State_3_3)+State_8_5)+State_8_0)+State_1_0)+State_3_8)+State_0_0)+State_9_10)+State_7_6)+State_1_5)+State_3_4)+State_0_10)+State_2_9)+State_7_7)+State_2_10)>=1)||(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((State_9_0+State_2_4)+State_8_1)+State_1_10)+State_6_2)+State_4_8)+State_4_3)+State_9_5)+State_8_9)+State_6_1)+State_8_4)+State_9_7)+State_6_6)+State_5_8)+State_3_0)+State_4_10)+State_10_10)+State_2_2)+State_10_5)+State_1_9)+State_3_7)+State_1_4)+State_10_0)+State_5_3)+State_9_2)+State_4_5)+State_5_1)+State_0_6)+State_8_2)+State_6_8)+State_2_0)+State_3_2)+State_9_9)+State_4_1)+State_4_7)+State_8_7)+State_6_3)+State_9_4)+State_5_6)+State_0_4)+State_3_10)+State_0_2)+State_3_5)+State_0_8)+State_1_6)+State_10_3)+State_7_8)+State_4_0)+State_1_7)+State_0_9)+State_4_6)+State_10_8)+State_6_4)+State_6_9)+State_6_10)+State_10_7)+State_8_8)+State_1_2)+State_5_10)+State_5_0)+State_0_3)+State_9_3)+State_5_5)+State_7_4)+State_9_8)+State_7_9)+State_2_7)+State_3_6)+State_10_2)+State_3_1)+State_4_4)+State_6_7)+State_0_5)+State_8_3)+State_1_3)+State_6_0)+State_2_1)+State_9_6)+State_5_2)+State_5_4)+State_6_5)+State_7_0)+State_9_1)+State_1_8)+State_7_3)+State_2_6)+State_4_2)+State_5_7)+State_0_7)+State_1_1)+State_2_3)+State_10_4)+State_7_10)+State_5_9)+State_8_10)+State_4_9)+State_10_6)+State_10_1)+State_2_8)+State_7_5)+State_7_1)+State_10_9)+State_3_9)+State_0_1)+State_2_5)+State_8_6)+State_7_2)+State_3_3)+State_8_5)+State_8_0)+State_1_0)+State_3_8)+State_0_0)+State_9_10)+State_7_6)+State_1_5)+State_3_4)+State_0_10)+State_2_9)+State_7_7)+State_2_10)>=2)))
Read [reachable] property : TokenRing-PT-010-ReachabilityCardinality-04 with value :(!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((State_9_0+State_2_4)+State_8_1)+State_1_10)+State_6_2)+State_4_8)+State_4_3)+State_9_5)+State_8_9)+State_6_1)+State_8_4)+State_9_7)+State_6_6)+State_5_8)+State_3_0)+State_4_10)+State_10_10)+State_2_2)+State_10_5)+State_1_9)+State_3_7)+State_1_4)+State_10_0)+State_5_3)+State_9_2)+State_4_5)+State_5_1)+State_0_6)+State_8_2)+State_6_8)+State_2_0)+State_3_2)+State_9_9)+State_4_1)+State_4_7)+State_8_7)+State_6_3)+State_9_4)+State_5_6)+State_0_4)+State_3_10)+State_0_2)+State_3_5)+State_0_8)+State_1_6)+State_10_3)+State_7_8)+State_4_0)+State_1_7)+State_0_9)+State_4_6)+State_10_8)+State_6_4)+State_6_9)+State_6_10)+State_10_7)+State_8_8)+State_1_2)+State_5_10)+State_5_0)+State_0_3)+State_9_3)+State_5_5)+State_7_4)+State_9_8)+State_7_9)+State_2_7)+State_3_6)+State_10_2)+State_3_1)+State_4_4)+State_6_7)+State_0_5)+State_8_3)+State_1_3)+State_6_0)+State_2_1)+State_9_6)+State_5_2)+State_5_4)+State_6_5)+State_7_0)+State_9_1)+State_1_8)+State_7_3)+State_2_6)+State_4_2)+State_5_7)+State_0_7)+State_1_1)+State_2_3)+State_10_4)+State_7_10)+State_5_9)+State_8_10)+State_4_9)+State_10_6)+State_10_1)+State_2_8)+State_7_5)+State_7_1)+State_10_9)+State_3_9)+State_0_1)+State_2_5)+State_8_6)+State_7_2)+State_3_3)+State_8_5)+State_8_0)+State_1_0)+State_3_8)+State_0_0)+State_9_10)+State_7_6)+State_1_5)+State_3_4)+State_0_10)+State_2_9)+State_7_7)+State_2_10)>=3))
Read [reachable] property : TokenRing-PT-010-ReachabilityCardinality-07 with value :(!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((State_9_0+State_2_4)+State_8_1)+State_1_10)+State_6_2)+State_4_8)+State_4_3)+State_9_5)+State_8_9)+State_6_1)+State_8_4)+State_9_7)+State_6_6)+State_5_8)+State_3_0)+State_4_10)+State_10_10)+State_2_2)+State_10_5)+State_1_9)+State_3_7)+State_1_4)+State_10_0)+State_5_3)+State_9_2)+State_4_5)+State_5_1)+State_0_6)+State_8_2)+State_6_8)+State_2_0)+State_3_2)+State_9_9)+State_4_1)+State_4_7)+State_8_7)+State_6_3)+State_9_4)+State_5_6)+State_0_4)+State_3_10)+State_0_2)+State_3_5)+State_0_8)+State_1_6)+State_10_3)+State_7_8)+State_4_0)+State_1_7)+State_0_9)+State_4_6)+State_10_8)+State_6_4)+State_6_9)+State_6_10)+State_10_7)+State_8_8)+State_1_2)+State_5_10)+State_5_0)+State_0_3)+State_9_3)+State_5_5)+State_7_4)+State_9_8)+State_7_9)+State_2_7)+State_3_6)+State_10_2)+State_3_1)+State_4_4)+State_6_7)+State_0_5)+State_8_3)+State_1_3)+State_6_0)+State_2_1)+State_9_6)+State_5_2)+State_5_4)+State_6_5)+State_7_0)+State_9_1)+State_1_8)+State_7_3)+State_2_6)+State_4_2)+State_5_7)+State_0_7)+State_1_1)+State_2_3)+State_10_4)+State_7_10)+State_5_9)+State_8_10)+State_4_9)+State_10_6)+State_10_1)+State_2_8)+State_7_5)+State_7_1)+State_10_9)+State_3_9)+State_0_1)+State_2_5)+State_8_6)+State_7_2)+State_3_3)+State_8_5)+State_8_0)+State_1_0)+State_3_8)+State_0_0)+State_9_10)+State_7_6)+State_1_5)+State_3_4)+State_0_10)+State_2_9)+State_7_7)+State_2_10)>=1))
Read [reachable] property : TokenRing-PT-010-ReachabilityCardinality-08 with value :((State_3_10>=3)&&(((State_6_7<=State_3_7)&&(State_3_7<=State_0_4))||((State_1_9>=1)&&(State_1_1<=State_10_0))))
Read [reachable] property : TokenRing-PT-010-ReachabilityCardinality-09 with value :(!(((State_10_3<=State_9_2)||(State_8_4<=State_8_9))&&(State_6_7<=State_0_7)))
Read [invariant] property : TokenRing-PT-010-ReachabilityCardinality-10 with value :((((State_4_5<=State_9_3)||(State_5_8<=State_4_4))&&((State_5_5>=1)&&(State_5_9>=1)))||(!(State_2_2>=2)))
Read [invariant] property : TokenRing-PT-010-ReachabilityCardinality-11 with value :((((State_6_9<=State_2_4)&&(State_9_3>=3))||(!(State_8_0>=2)))||((State_1_8>=2)||((State_10_8>=2)||(State_1_9>=1))))
Read [reachable] property : TokenRing-PT-010-ReachabilityCardinality-12 with value :((State_7_8>=3)&&(State_5_8>=3))
Read [reachable] property : TokenRing-PT-010-ReachabilityCardinality-13 with value :(State_1_9>=2)
Read [invariant] property : TokenRing-PT-010-ReachabilityCardinality-14 with value :((State_8_2<=State_5_4)&&(!((State_6_10>=1)&&(State_7_1<=State_2_4))))
Read [invariant] property : TokenRing-PT-010-ReachabilityCardinality-15 with value :((State_1_4>=3)||(((State_10_2<=State_3_9)||(State_4_7<=State_5_8))||((State_5_10>=2)||(State_5_4<=State_9_9))))
FORMULA TokenRing-PT-010-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1111 rows 121 cols
invariant :State_6_2 + State_6_1 + State_6_6 + State_6_8 + State_6_3 + State_6_4 + State_6_9 + State_6_10 + State_6_7 + State_6_0 + State_6_5 = 1
invariant :State_3_0 + State_3_7 + State_3_2 + State_3_10 + State_3_5 + State_3_6 + State_3_1 + State_3_9 + State_3_3 + State_3_8 + State_3_4 = 1
invariant :State_1_10 + State_1_9 + State_1_4 + State_1_6 + State_1_7 + State_1_2 + State_1_3 + State_1_8 + State_1_1 + State_1_0 + State_1_5 = 1
invariant :State_9_0 + State_9_5 + State_9_7 + State_9_2 + State_9_9 + State_9_4 + State_9_3 + State_9_8 + State_9_6 + State_9_1 + State_9_10 = 1
invariant :State_7_8 + State_7_4 + State_7_9 + State_7_0 + State_7_3 + State_7_10 + State_7_5 + State_7_1 + State_7_2 + State_7_6 + State_7_7 = 1
invariant :State_10_10 + State_10_5 + State_10_0 + State_10_3 + State_10_8 + State_10_7 + State_10_2 + State_10_4 + State_10_6 + State_10_1 + State_10_9 = 1
invariant :State_2_4 + State_2_2 + State_2_0 + State_2_7 + State_2_1 + State_2_6 + State_2_3 + State_2_8 + State_2_5 + State_2_9 + State_2_10 = 1
invariant :State_5_8 + State_5_3 + State_5_1 + State_5_6 + State_5_10 + State_5_0 + State_5_5 + State_5_2 + State_5_4 + State_5_7 + State_5_9 = 1
invariant :State_8_1 + State_8_9 + State_8_4 + State_8_2 + State_8_7 + State_8_8 + State_8_3 + State_8_10 + State_8_6 + State_8_5 + State_8_0 = 1
invariant :State_4_8 + State_4_3 + State_4_10 + State_4_5 + State_4_1 + State_4_7 + State_4_0 + State_4_6 + State_4_4 + State_4_2 + State_4_9 = 1
invariant :State_0_6 + State_0_4 + State_0_2 + State_0_8 + State_0_9 + State_0_3 + State_0_5 + State_0_7 + State_0_1 + State_0_0 + State_0_10 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1111 rows 121 cols
invariant :State_6_2 + State_6_1 + State_6_6 + State_6_8 + State_6_3 + State_6_4 + State_6_9 + State_6_10 + State_6_7 + State_6_0 + State_6_5 = 1
invariant :State_3_0 + State_3_7 + State_3_2 + State_3_10 + State_3_5 + State_3_6 + State_3_1 + State_3_9 + State_3_3 + State_3_8 + State_3_4 = 1
invariant :State_1_10 + State_1_9 + State_1_4 + State_1_6 + State_1_7 + State_1_2 + State_1_3 + State_1_8 + State_1_1 + State_1_0 + State_1_5 = 1
invariant :State_9_0 + State_9_5 + State_9_7 + State_9_2 + State_9_9 + State_9_4 + State_9_3 + State_9_8 + State_9_6 + State_9_1 + State_9_10 = 1
invariant :State_7_8 + State_7_4 + State_7_9 + State_7_0 + State_7_3 + State_7_10 + State_7_5 + State_7_1 + State_7_2 + State_7_6 + State_7_7 = 1
invariant :State_10_10 + State_10_5 + State_10_0 + State_10_3 + State_10_8 + State_10_7 + State_10_2 + State_10_4 + State_10_6 + State_10_1 + State_10_9 = 1
invariant :State_2_4 + State_2_2 + State_2_0 + State_2_7 + State_2_1 + State_2_6 + State_2_3 + State_2_8 + State_2_5 + State_2_9 + State_2_10 = 1
invariant :State_5_8 + State_5_3 + State_5_1 + State_5_6 + State_5_10 + State_5_0 + State_5_5 + State_5_2 + State_5_4 + State_5_7 + State_5_9 = 1
invariant :State_8_1 + State_8_9 + State_8_4 + State_8_2 + State_8_7 + State_8_8 + State_8_3 + State_8_10 + State_8_6 + State_8_5 + State_8_0 = 1
invariant :State_4_8 + State_4_3 + State_4_10 + State_4_5 + State_4_1 + State_4_7 + State_4_0 + State_4_6 + State_4_4 + State_4_2 + State_4_9 = 1
invariant :State_0_6 + State_0_4 + State_0_2 + State_0_8 + State_0_9 + State_0_3 + State_0_5 + State_0_7 + State_0_1 + State_0_0 + State_0_10 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing\_PT\_010\_flat\_flat,58905,1.98158,47552,2,3551,5,74203,6,0,1598,46214,0
Total reachable state count : 58905

Verifying 11 reachability properties.
Reachability property TokenRing-PT-010-ReachabilityCardinality-02 does not hold.
No reachable states exhibit your property : TokenRing-PT-010-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-02,0,70.8043,925200,1,0,5,74203,7,0,305277,46214,0
Reachability property TokenRing-PT-010-ReachabilityCardinality-04 does not hold.
FORMULA TokenRing-PT-010-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : TokenRing-PT-010-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-04,0,136.344,1062576,1,0,5,74203,8,0,608831,46214,0
Reachability property TokenRing-PT-010-ReachabilityCardinality-07 does not hold.
FORMULA TokenRing-PT-010-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : TokenRing-PT-010-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-07,0,136.365,1062660,1,0,5,74203,9,0,608831,46214,0
Reachability property TokenRing-PT-010-ReachabilityCardinality-08 does not hold.
FORMULA TokenRing-PT-010-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : TokenRing-PT-010-ReachabilityCardinality-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-08,0,136.372,1062892,1,0,5,74203,10,0,608852,46214,0
Reachability property TokenRing-PT-010-ReachabilityCardinality-09 is true.
FORMULA TokenRing-PT-010-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-09,1,136.373,1063048,2,122,6,74203,11,0,608863,46214,0
Invariant property TokenRing-PT-010-ReachabilityCardinality-10 is true.
FORMULA TokenRing-PT-010-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-10,0,136.381,1063392,1,0,6,74203,12,0,608881,46214,0
Invariant property TokenRing-PT-010-ReachabilityCardinality-11 is true.
FORMULA TokenRing-PT-010-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-11,0,136.384,1063484,1,0,6,74203,13,0,608895,46214,0
Reachability property TokenRing-PT-010-ReachabilityCardinality-12 does not hold.
FORMULA TokenRing-PT-010-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : TokenRing-PT-010-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-12,0,136.385,1063620,1,0,6,74203,14,0,608898,46214,0
Reachability property TokenRing-PT-010-ReachabilityCardinality-13 does not hold.
FORMULA TokenRing-PT-010-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : TokenRing-PT-010-ReachabilityCardinality-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-13,0,136.388,1063880,1,0,6,74203,15,0,608899,46214,0
Invariant property TokenRing-PT-010-ReachabilityCardinality-14 does not hold.
FORMULA TokenRing-PT-010-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-14,1551,136.39,1063888,2,976,7,74203,16,0,608908,46214,0
Invariant property TokenRing-PT-010-ReachabilityCardinality-15 is true.
FORMULA TokenRing-PT-010-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
TokenRing-PT-010-ReachabilityCardinality-15,0,136.395,1064020,1,0,7,74203,17,0,608924,46214,0
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527559460801

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 2:02:00 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 29, 2018 2:02:00 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 2:02:00 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 259 ms
May 29, 2018 2:02:00 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 121 places.
May 29, 2018 2:02:00 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1111 transitions.
May 29, 2018 2:02:01 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 67 ms
May 29, 2018 2:02:01 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 382 ms
May 29, 2018 2:02:01 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 277 ms
May 29, 2018 2:02:01 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 267 ms
May 29, 2018 2:02:01 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 21 ms
May 29, 2018 2:02:01 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
May 29, 2018 2:02:02 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1111 transitions.
May 29, 2018 2:02:02 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1111 transitions.
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable TokenRing-PT-010-ReachabilityCardinality-02
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 11 in 1188 ms.
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-04(UNSAT) depth K=0 took 11 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-07(UNSAT) depth K=0 took 3 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-08(UNSAT) depth K=0 took 1 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-09(UNSAT) depth K=0 took 1 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-10(UNSAT) depth K=0 took 3 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-11(UNSAT) depth K=0 took 20 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-12(UNSAT) depth K=0 took 11 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-13(UNSAT) depth K=0 took 15 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-14(UNSAT) depth K=0 took 15 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-15(UNSAT) depth K=0 took 15 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-04(UNSAT) depth K=1 took 44 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-07(UNSAT) depth K=1 took 44 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-08(UNSAT) depth K=1 took 15 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-09(UNSAT) depth K=1 took 28 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 11 place invariants in 230 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-10(UNSAT) depth K=1 took 31 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-11(UNSAT) depth K=1 took 11 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-12(UNSAT) depth K=1 took 13 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1111 transitions.
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-13(UNSAT) depth K=1 took 21 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-14(UNSAT) depth K=1 took 23 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-15(UNSAT) depth K=1 took 20 ms
May 29, 2018 2:02:03 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 11 place invariants in 95 ms
May 29, 2018 2:02:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-04(UNSAT) depth K=2 took 1441 ms
May 29, 2018 2:02:05 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 121 variables to be positive in 1872 ms
May 29, 2018 2:02:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1111 transitions.
May 29, 2018 2:02:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1111 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 2:02:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 234 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 2:02:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1111 transitions.
May 29, 2018 2:02:05 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 121 variables to be positive in 1433 ms
May 29, 2018 2:02:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 65 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 2:02:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-07(UNSAT) depth K=2 took 1397 ms
May 29, 2018 2:02:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-08(UNSAT) depth K=2 took 783 ms
May 29, 2018 2:02:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-09(UNSAT) depth K=2 took 285 ms
May 29, 2018 2:02:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-10(UNSAT) depth K=2 took 370 ms
May 29, 2018 2:02:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-11(UNSAT) depth K=2 took 3202 ms
May 29, 2018 2:02:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-12(UNSAT) depth K=2 took 3681 ms
May 29, 2018 2:02:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-13(UNSAT) depth K=2 took 100 ms
May 29, 2018 2:02:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-14(UNSAT) depth K=2 took 251 ms
May 29, 2018 2:02:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-15(UNSAT) depth K=2 took 244 ms
May 29, 2018 2:02:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-04(UNSAT) depth K=3 took 15821 ms
May 29, 2018 2:02:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-07(UNSAT) depth K=3 took 17944 ms
May 29, 2018 2:03:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-08(UNSAT) depth K=3 took 19007 ms
May 29, 2018 2:03:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1111 transitions.
May 29, 2018 2:03:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-09(UNSAT) depth K=3 took 9789 ms
May 29, 2018 2:03:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1111) took 2823 ms. Total solver calls (SAT/UNSAT): 329(20/309)
May 29, 2018 2:03:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-10(UNSAT) depth K=3 took 4965 ms
May 29, 2018 2:03:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/1111) took 8395 ms. Total solver calls (SAT/UNSAT): 986(60/926)
May 29, 2018 2:03:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/1111) took 13109 ms. Total solver calls (SAT/UNSAT): 1543(91/1452)
May 29, 2018 2:03:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/1111) took 16220 ms. Total solver calls (SAT/UNSAT): 1872(111/1761)
May 29, 2018 2:03:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-11(UNSAT) depth K=3 took 10987 ms
May 29, 2018 2:03:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/1111) took 21723 ms. Total solver calls (SAT/UNSAT): 2526(150/2376)
May 29, 2018 2:03:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-12(UNSAT) depth K=3 took 4851 ms
May 29, 2018 2:03:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/1111) took 27195 ms. Total solver calls (SAT/UNSAT): 3178(190/2988)
May 29, 2018 2:03:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-13(UNSAT) depth K=3 took 6309 ms
May 29, 2018 2:03:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/1111) took 32640 ms. Total solver calls (SAT/UNSAT): 3830(230/3600)
May 29, 2018 2:03:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/1111) took 37375 ms. Total solver calls (SAT/UNSAT): 4384(261/4123)
May 29, 2018 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-14(UNSAT) depth K=3 took 11032 ms
May 29, 2018 2:03:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/1111) took 42996 ms. Total solver calls (SAT/UNSAT): 5033(300/4733)
May 29, 2018 2:04:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property TokenRing-PT-010-ReachabilityCardinality-15(UNSAT) depth K=3 took 5529 ms
May 29, 2018 2:04:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/1111) took 48563 ms. Total solver calls (SAT/UNSAT): 5681(340/5341)
May 29, 2018 2:04:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/1111) took 53196 ms. Total solver calls (SAT/UNSAT): 6231(371/5860)
May 29, 2018 2:04:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/1111) took 57948 ms. Total solver calls (SAT/UNSAT): 6779(400/6379)
May 29, 2018 2:04:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
SMT solver raised 'unknown', retrying with same input.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
May 29, 2018 2:04:19 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 29, 2018 2:04:19 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:490)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 29, 2018 2:04:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying TokenRing-PT-010-ReachabilityCardinality-04 K-induction depth 0
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 29, 2018 2:04:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying TokenRing-PT-010-ReachabilityCardinality-04 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 29, 2018 2:04:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
May 29, 2018 2:04:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
May 29, 2018 2:04:19 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 1/ 11 properties. Interrupting other analysis methods.
May 29, 2018 2:04:19 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 137966ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TokenRing-PT-010"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/TokenRing-PT-010.tgz
mv TokenRing-PT-010 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is TokenRing-PT-010, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r177-smll-152708747800320"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;