fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r177-smll-152708747500105
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for SharedMemory-PT-000005

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15753.210 4421.00 9613.00 188.10 FTTTTTTTFTTTTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 380K
-rw-r--r-- 1 mcc users 8.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 30K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 29K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 46K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.4K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 7 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 82K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is SharedMemory-PT-000005, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r177-smll-152708747500105
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-00
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-01
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-02
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-03
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-04
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-05
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-06
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-07
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-08
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-09
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-10
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-11
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-12
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-13
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-14
FORMULA_NAME SharedMemory-PT-000005-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1527429735268

FORMULA SharedMemory-PT-000005-ReachabilityFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000005-ReachabilityFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000005-ReachabilityFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000005-ReachabilityFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000005-ReachabilityFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000005-ReachabilityFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph2550864339359236178.txt, -o, /tmp/graph2550864339359236178.bin, -w, /tmp/graph2550864339359236178.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph2550864339359236178.bin, -l, -1, -v, -w, /tmp/graph2550864339359236178.weights, -q, 0, -e, 0.001], workingDir=null]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 55 rows 41 cols
invariant :Ext_Mem_Acc_2_1 + Ext_Mem_Acc_3_1 + Ext_Mem_Acc_4_1 + Ext_Mem_Acc_5_1 + Memory_1 = 1
invariant :-1'Ext_Mem_Acc_3_1 + -1'Ext_Mem_Acc_4_1 + -1'Ext_Mem_Acc_5_1 + Ext_Mem_Acc_2_3 + Ext_Mem_Acc_2_4 + Ext_Mem_Acc_2_5 + -1'Memory_1 + Active_2 + Queue_2 + OwnMemAcc_2 = 0
invariant :-1'Ext_Mem_Acc_3_2 + -1'Ext_Mem_Acc_4_2 + -1'Ext_Mem_Acc_5_2 + -1'Ext_Mem_Acc_2_3 + -1'Ext_Mem_Acc_4_3 + -1'Ext_Mem_Acc_5_3 + -1'Ext_Mem_Acc_3_4 + -1'Ext_Mem_Acc_2_4 + -1'Ext_Mem_Acc_5_4 + -1'Ext_Mem_Acc_3_5 + -1'Ext_Mem_Acc_2_5 + -1'Ext_Mem_Acc_4_5 + -1'Memory_2 + -1'Memory_4 + -1'Memory_3 + Active_1 + -1'Memory_5 + Queue_1 + OwnMemAcc_1 = -3
invariant :Ext_Mem_Acc_5_1 + Ext_Mem_Acc_5_2 + Ext_Mem_Acc_5_3 + Ext_Mem_Acc_5_4 + Active_5 + Queue_5 + OwnMemAcc_5 = 1
invariant :Ext_Mem_Acc_1_5 + Ext_Mem_Acc_3_5 + Ext_Mem_Acc_2_5 + Ext_Mem_Acc_4_5 + Memory_5 = 1
invariant :Ext_Mem_Acc_1_3 + Ext_Mem_Acc_2_3 + Ext_Mem_Acc_4_3 + Ext_Mem_Acc_5_3 + Memory_3 = 1
invariant :Ext_Mem_Acc_1_2 + Ext_Mem_Acc_3_2 + Ext_Mem_Acc_4_2 + Ext_Mem_Acc_5_2 + Memory_2 = 1
invariant :Ext_Mem_Acc_1_4 + Ext_Mem_Acc_3_4 + Ext_Mem_Acc_2_4 + Ext_Mem_Acc_5_4 + Memory_4 = 1
invariant :Ext_Bus + -1'Memory_2 + -1'Memory_1 + -1'Memory_4 + -1'Memory_3 + -1'Memory_5 = -4
invariant :Ext_Mem_Acc_4_1 + Ext_Mem_Acc_4_2 + Ext_Mem_Acc_4_3 + Ext_Mem_Acc_4_5 + Active_4 + Queue_4 + OwnMemAcc_4 = 1
invariant :Ext_Mem_Acc_3_1 + Ext_Mem_Acc_3_2 + Ext_Mem_Acc_3_4 + Ext_Mem_Acc_3_5 + Active_3 + Queue_3 + OwnMemAcc_3 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 55 rows 41 cols
invariant :Ext_Mem_Acc_2_1 + Ext_Mem_Acc_3_1 + Ext_Mem_Acc_4_1 + Ext_Mem_Acc_5_1 + Memory_1 = 1
invariant :-1'Ext_Mem_Acc_3_1 + -1'Ext_Mem_Acc_4_1 + -1'Ext_Mem_Acc_5_1 + Ext_Mem_Acc_2_3 + Ext_Mem_Acc_2_4 + Ext_Mem_Acc_2_5 + -1'Memory_1 + Active_2 + Queue_2 + OwnMemAcc_2 = 0
invariant :-1'Ext_Mem_Acc_3_2 + -1'Ext_Mem_Acc_4_2 + -1'Ext_Mem_Acc_5_2 + -1'Ext_Mem_Acc_2_3 + -1'Ext_Mem_Acc_4_3 + -1'Ext_Mem_Acc_5_3 + -1'Ext_Mem_Acc_3_4 + -1'Ext_Mem_Acc_2_4 + -1'Ext_Mem_Acc_5_4 + -1'Ext_Mem_Acc_3_5 + -1'Ext_Mem_Acc_2_5 + -1'Ext_Mem_Acc_4_5 + -1'Memory_2 + -1'Memory_4 + -1'Memory_3 + Active_1 + -1'Memory_5 + Queue_1 + OwnMemAcc_1 = -3
invariant :Ext_Mem_Acc_5_1 + Ext_Mem_Acc_5_2 + Ext_Mem_Acc_5_3 + Ext_Mem_Acc_5_4 + Active_5 + Queue_5 + OwnMemAcc_5 = 1
invariant :Ext_Mem_Acc_1_5 + Ext_Mem_Acc_3_5 + Ext_Mem_Acc_2_5 + Ext_Mem_Acc_4_5 + Memory_5 = 1
invariant :Ext_Mem_Acc_1_3 + Ext_Mem_Acc_2_3 + Ext_Mem_Acc_4_3 + Ext_Mem_Acc_5_3 + Memory_3 = 1
invariant :Ext_Mem_Acc_1_2 + Ext_Mem_Acc_3_2 + Ext_Mem_Acc_4_2 + Ext_Mem_Acc_5_2 + Memory_2 = 1
invariant :Ext_Mem_Acc_1_4 + Ext_Mem_Acc_3_4 + Ext_Mem_Acc_2_4 + Ext_Mem_Acc_5_4 + Memory_4 = 1
invariant :Ext_Bus + -1'Memory_2 + -1'Memory_1 + -1'Memory_4 + -1'Memory_3 + -1'Memory_5 = -4
invariant :Ext_Mem_Acc_4_1 + Ext_Mem_Acc_4_2 + Ext_Mem_Acc_4_3 + Ext_Mem_Acc_4_5 + Active_4 + Queue_4 + OwnMemAcc_4 = 1
invariant :Ext_Mem_Acc_3_1 + Ext_Mem_Acc_3_2 + Ext_Mem_Acc_3_4 + Ext_Mem_Acc_3_5 + Active_3 + Queue_3 + OwnMemAcc_3 = 1
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityFireability.pnml.gal, -t, CGAL, -reachable-file, ReachabilityFireability.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityFireability.pnml.gal -t CGAL -reachable-file ReachabilityFireability.prop --nowitness
Loading property file ReachabilityFireability.prop.
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-01 with value :((((((((((((((((((((((((u0.Ext_Mem_Acc_4_1>=1)||(u0.Ext_Mem_Acc_5_1>=1))||(u0.Ext_Mem_Acc_2_1>=1))||(u6.Ext_Mem_Acc_3_1>=1))||(u2.Ext_Mem_Acc_5_2>=1))||(u2.Ext_Mem_Acc_4_2>=1))||(u2.Ext_Mem_Acc_3_2>=1))||(u2.Ext_Mem_Acc_1_2>=1))||(u3.Ext_Mem_Acc_5_3>=1))||(u3.Ext_Mem_Acc_4_3>=1))||(u3.Ext_Mem_Acc_2_3>=1))||(u4.Ext_Mem_Acc_1_3>=1))||(u8.Ext_Mem_Acc_5_4>=1))||(u1.Ext_Mem_Acc_3_4>=1))||(u1.Ext_Mem_Acc_2_4>=1))||(u1.Ext_Mem_Acc_1_4>=1))||(u7.Ext_Mem_Acc_4_5>=1))||(u5.Ext_Mem_Acc_3_5>=1))||(u5.Ext_Mem_Acc_2_5>=1))||(u5.Ext_Mem_Acc_1_5>=1))||((((((u8.OwnMemAcc_5>=1)&&(u5.Memory_5>=1))||((u7.OwnMemAcc_4>=1)&&(u1.Memory_4>=1)))||((u4.OwnMemAcc_1>=1)&&(u0.Memory_1>=1)))||((u6.OwnMemAcc_3>=1)&&(u3.Memory_3>=1)))||((u9.OwnMemAcc_2>=1)&&(u2.Memory_2>=1))))&&((((((u9.Active_2>=1)||(u4.Active_1>=1))||(u8.Active_5>=1))||(u6.Active_3>=1))||(u7.Active_4>=1))&&((((((u8.OwnMemAcc_5>=1)&&(u5.Memory_5>=1))||((u7.OwnMemAcc_4>=1)&&(u1.Memory_4>=1)))||((u4.OwnMemAcc_1>=1)&&(u0.Memory_1>=1)))||((u6.OwnMemAcc_3>=1)&&(u3.Memory_3>=1)))||((u9.OwnMemAcc_2>=1)&&(u2.Memory_2>=1)))))||((((((((u8.OwnMemAcc_5>=1)&&(u5.Memory_5>=1))||((u7.OwnMemAcc_4>=1)&&(u1.Memory_4>=1)))||((u4.OwnMemAcc_1>=1)&&(u0.Memory_1>=1)))||((u6.OwnMemAcc_3>=1)&&(u3.Memory_3>=1)))||((u9.OwnMemAcc_2>=1)&&(u2.Memory_2>=1)))||((((((((((((((((((((((u2.Ext_Bus>=1)&&(u2.Memory_2>=1))&&(u4.Queue_1>=1))||(((u2.Ext_Bus>=1)&&(u6.Queue_3>=1))&&(u2.Memory_2>=1)))||(((u2.Ext_Bus>=1)&&(u7.Queue_4>=1))&&(u2.Memory_2>=1)))||(((u8.Queue_5>=1)&&(u2.Memory_2>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u9.Queue_2>=1))&&(u0.Memory_1>=1)))||(((u2.Ext_Bus>=1)&&(u0.Memory_1>=1))&&(u6.Queue_3>=1)))||(((u2.Ext_Bus>=1)&&(u0.Memory_1>=1))&&(u7.Queue_4>=1)))||(((u0.Memory_1>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u1.Memory_4>=1))&&(u4.Queue_1>=1)))||(((u2.Ext_Bus>=1)&&(u9.Queue_2>=1))&&(u1.Memory_4>=1)))||(((u6.Queue_3>=1)&&(u1.Memory_4>=1))&&(u2.Ext_Bus>=1)))||(((u8.Queue_5>=1)&&(u1.Memory_4>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u4.Queue_1>=1))&&(u3.Memory_3>=1)))||(((u2.Ext_Bus>=1)&&(u3.Memory_3>=1))&&(u9.Queue_2>=1)))||(((u2.Ext_Bus>=1)&&(u3.Memory_3>=1))&&(u7.Queue_4>=1)))||(((u3.Memory_3>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u5.Memory_5>=1))&&(u9.Queue_2>=1)))||(((u4.Queue_1>=1)&&(u5.Memory_5>=1))&&(u2.Ext_Bus>=1)))||(((u5.Memory_5>=1)&&(u7.Queue_4>=1))&&(u2.Ext_Bus>=1)))||(((u5.Memory_5>=1)&&(u6.Queue_3>=1))&&(u2.Ext_Bus>=1))))&&(((((((((((((((((((((((u2.Ext_Bus>=1)&&(u2.Memory_2>=1))&&(u4.Queue_1>=1))||(((u2.Ext_Bus>=1)&&(u6.Queue_3>=1))&&(u2.Memory_2>=1)))||(((u2.Ext_Bus>=1)&&(u7.Queue_4>=1))&&(u2.Memory_2>=1)))||(((u8.Queue_5>=1)&&(u2.Memory_2>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u9.Queue_2>=1))&&(u0.Memory_1>=1)))||(((u2.Ext_Bus>=1)&&(u0.Memory_1>=1))&&(u6.Queue_3>=1)))||(((u2.Ext_Bus>=1)&&(u0.Memory_1>=1))&&(u7.Queue_4>=1)))||(((u0.Memory_1>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u1.Memory_4>=1))&&(u4.Queue_1>=1)))||(((u2.Ext_Bus>=1)&&(u9.Queue_2>=1))&&(u1.Memory_4>=1)))||(((u6.Queue_3>=1)&&(u1.Memory_4>=1))&&(u2.Ext_Bus>=1)))||(((u8.Queue_5>=1)&&(u1.Memory_4>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u4.Queue_1>=1))&&(u3.Memory_3>=1)))||(((u2.Ext_Bus>=1)&&(u3.Memory_3>=1))&&(u9.Queue_2>=1)))||(((u2.Ext_Bus>=1)&&(u3.Memory_3>=1))&&(u7.Queue_4>=1)))||(((u3.Memory_3>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u5.Memory_5>=1))&&(u9.Queue_2>=1)))||(((u4.Queue_1>=1)&&(u5.Memory_5>=1))&&(u2.Ext_Bus>=1)))||(((u5.Memory_5>=1)&&(u7.Queue_4>=1))&&(u2.Ext_Bus>=1)))||(((u5.Memory_5>=1)&&(u6.Queue_3>=1))&&(u2.Ext_Bus>=1)))&&(((((u9.Active_2>=1)||(u4.Active_1>=1))||(u7.Active_4>=1))||(u6.Active_3>=1))||(u8.Active_5>=1)))))&&(!(((((((u8.OwnMemAcc_5>=1)&&(u5.Memory_5>=1))||((u7.OwnMemAcc_4>=1)&&(u1.Memory_4>=1)))||((u4.OwnMemAcc_1>=1)&&(u0.Memory_1>=1)))||((u6.OwnMemAcc_3>=1)&&(u3.Memory_3>=1)))||((u9.OwnMemAcc_2>=1)&&(u2.Memory_2>=1)))&&(((((((((((((((((((((u0.Ext_Mem_Acc_4_1>=1)||(u0.Ext_Mem_Acc_5_1>=1))||(u0.Ext_Mem_Acc_2_1>=1))||(u6.Ext_Mem_Acc_3_1>=1))||(u2.Ext_Mem_Acc_5_2>=1))||(u2.Ext_Mem_Acc_4_2>=1))||(u2.Ext_Mem_Acc_3_2>=1))||(u2.Ext_Mem_Acc_1_2>=1))||(u3.Ext_Mem_Acc_5_3>=1))||(u3.Ext_Mem_Acc_4_3>=1))||(u3.Ext_Mem_Acc_2_3>=1))||(u4.Ext_Mem_Acc_1_3>=1))||(u8.Ext_Mem_Acc_5_4>=1))||(u1.Ext_Mem_Acc_3_4>=1))||(u1.Ext_Mem_Acc_2_4>=1))||(u1.Ext_Mem_Acc_1_4>=1))||(u7.Ext_Mem_Acc_4_5>=1))||(u5.Ext_Mem_Acc_3_5>=1))||(u5.Ext_Mem_Acc_2_5>=1))||(u5.Ext_Mem_Acc_1_5>=1))||((((((u8.OwnMemAcc_5>=1)&&(u5.Memory_5>=1))||((u7.OwnMemAcc_4>=1)&&(u1.Memory_4>=1)))||((u4.OwnMemAcc_1>=1)&&(u0.Memory_1>=1)))||((u6.OwnMemAcc_3>=1)&&(u3.Memory_3>=1)))||((u9.OwnMemAcc_2>=1)&&(u2.Memory_2>=1)))))))
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-02 with value :(((((((((((((((((((((u0.Ext_Mem_Acc_4_1>=1)||(u0.Ext_Mem_Acc_5_1>=1))||(u0.Ext_Mem_Acc_2_1>=1))||(u6.Ext_Mem_Acc_3_1>=1))||(u2.Ext_Mem_Acc_5_2>=1))||(u2.Ext_Mem_Acc_4_2>=1))||(u2.Ext_Mem_Acc_3_2>=1))||(u2.Ext_Mem_Acc_1_2>=1))||(u3.Ext_Mem_Acc_5_3>=1))||(u3.Ext_Mem_Acc_4_3>=1))||(u3.Ext_Mem_Acc_2_3>=1))||(u4.Ext_Mem_Acc_1_3>=1))||(u8.Ext_Mem_Acc_5_4>=1))||(u1.Ext_Mem_Acc_3_4>=1))||(u1.Ext_Mem_Acc_2_4>=1))||(u1.Ext_Mem_Acc_1_4>=1))||(u7.Ext_Mem_Acc_4_5>=1))||(u5.Ext_Mem_Acc_3_5>=1))||(u5.Ext_Mem_Acc_2_5>=1))||(u5.Ext_Mem_Acc_1_5>=1))&&(((((((((((((((((((((((((u2.Ext_Bus>=1)&&(u2.Memory_2>=1))&&(u4.Queue_1>=1))||(((u2.Ext_Bus>=1)&&(u6.Queue_3>=1))&&(u2.Memory_2>=1)))||(((u2.Ext_Bus>=1)&&(u7.Queue_4>=1))&&(u2.Memory_2>=1)))||(((u8.Queue_5>=1)&&(u2.Memory_2>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u9.Queue_2>=1))&&(u0.Memory_1>=1)))||(((u2.Ext_Bus>=1)&&(u0.Memory_1>=1))&&(u6.Queue_3>=1)))||(((u2.Ext_Bus>=1)&&(u0.Memory_1>=1))&&(u7.Queue_4>=1)))||(((u0.Memory_1>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u1.Memory_4>=1))&&(u4.Queue_1>=1)))||(((u2.Ext_Bus>=1)&&(u9.Queue_2>=1))&&(u1.Memory_4>=1)))||(((u6.Queue_3>=1)&&(u1.Memory_4>=1))&&(u2.Ext_Bus>=1)))||(((u8.Queue_5>=1)&&(u1.Memory_4>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u4.Queue_1>=1))&&(u3.Memory_3>=1)))||(((u2.Ext_Bus>=1)&&(u3.Memory_3>=1))&&(u9.Queue_2>=1)))||(((u2.Ext_Bus>=1)&&(u3.Memory_3>=1))&&(u7.Queue_4>=1)))||(((u3.Memory_3>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u5.Memory_5>=1))&&(u9.Queue_2>=1)))||(((u4.Queue_1>=1)&&(u5.Memory_5>=1))&&(u2.Ext_Bus>=1)))||(((u5.Memory_5>=1)&&(u7.Queue_4>=1))&&(u2.Ext_Bus>=1)))||(((u5.Memory_5>=1)&&(u6.Queue_3>=1))&&(u2.Ext_Bus>=1)))||((((((u8.OwnMemAcc_5>=1)&&(u5.Memory_5>=1))||((u7.OwnMemAcc_4>=1)&&(u1.Memory_4>=1)))||((u4.OwnMemAcc_1>=1)&&(u0.Memory_1>=1)))||((u6.OwnMemAcc_3>=1)&&(u3.Memory_3>=1)))||((u9.OwnMemAcc_2>=1)&&(u2.Memory_2>=1))))||((((((u8.OwnMemAcc_5>=1)&&(u5.Memory_5>=1))||((u7.OwnMemAcc_4>=1)&&(u1.Memory_4>=1)))||((u4.OwnMemAcc_1>=1)&&(u0.Memory_1>=1)))||((u6.OwnMemAcc_3>=1)&&(u3.Memory_3>=1)))||((u9.OwnMemAcc_2>=1)&&(u2.Memory_2>=1))))&&(((((u9.Active_2>=1)||(u4.Active_1>=1))||(u7.Active_4>=1))||(u6.Active_3>=1))||(u8.Active_5>=1))))
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-04 with value :((((((((((((((((((((u0.Ext_Mem_Acc_4_1>=1)||(u0.Ext_Mem_Acc_5_1>=1))||(u0.Ext_Mem_Acc_2_1>=1))||(u6.Ext_Mem_Acc_3_1>=1))||(u2.Ext_Mem_Acc_5_2>=1))||(u2.Ext_Mem_Acc_4_2>=1))||(u2.Ext_Mem_Acc_3_2>=1))||(u2.Ext_Mem_Acc_1_2>=1))||(u3.Ext_Mem_Acc_5_3>=1))||(u3.Ext_Mem_Acc_4_3>=1))||(u3.Ext_Mem_Acc_2_3>=1))||(u4.Ext_Mem_Acc_1_3>=1))||(u8.Ext_Mem_Acc_5_4>=1))||(u1.Ext_Mem_Acc_3_4>=1))||(u1.Ext_Mem_Acc_2_4>=1))||(u1.Ext_Mem_Acc_1_4>=1))||(u7.Ext_Mem_Acc_4_5>=1))||(u5.Ext_Mem_Acc_3_5>=1))||(u5.Ext_Mem_Acc_2_5>=1))||(u5.Ext_Mem_Acc_1_5>=1))
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-05 with value :((((((((((((((((((((u0.Ext_Mem_Acc_4_1>=1)||(u0.Ext_Mem_Acc_5_1>=1))||(u0.Ext_Mem_Acc_2_1>=1))||(u6.Ext_Mem_Acc_3_1>=1))||(u2.Ext_Mem_Acc_5_2>=1))||(u2.Ext_Mem_Acc_4_2>=1))||(u2.Ext_Mem_Acc_3_2>=1))||(u2.Ext_Mem_Acc_1_2>=1))||(u3.Ext_Mem_Acc_5_3>=1))||(u3.Ext_Mem_Acc_4_3>=1))||(u3.Ext_Mem_Acc_2_3>=1))||(u4.Ext_Mem_Acc_1_3>=1))||(u8.Ext_Mem_Acc_5_4>=1))||(u1.Ext_Mem_Acc_3_4>=1))||(u1.Ext_Mem_Acc_2_4>=1))||(u1.Ext_Mem_Acc_1_4>=1))||(u7.Ext_Mem_Acc_4_5>=1))||(u5.Ext_Mem_Acc_3_5>=1))||(u5.Ext_Mem_Acc_2_5>=1))||(u5.Ext_Mem_Acc_1_5>=1))
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-07 with value :(!(((!((((((((((((((((((((((u2.Ext_Bus>=1)&&(u2.Memory_2>=1))&&(u4.Queue_1>=1))||(((u2.Ext_Bus>=1)&&(u6.Queue_3>=1))&&(u2.Memory_2>=1)))||(((u2.Ext_Bus>=1)&&(u7.Queue_4>=1))&&(u2.Memory_2>=1)))||(((u8.Queue_5>=1)&&(u2.Memory_2>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u9.Queue_2>=1))&&(u0.Memory_1>=1)))||(((u2.Ext_Bus>=1)&&(u0.Memory_1>=1))&&(u6.Queue_3>=1)))||(((u2.Ext_Bus>=1)&&(u0.Memory_1>=1))&&(u7.Queue_4>=1)))||(((u0.Memory_1>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u1.Memory_4>=1))&&(u4.Queue_1>=1)))||(((u2.Ext_Bus>=1)&&(u9.Queue_2>=1))&&(u1.Memory_4>=1)))||(((u6.Queue_3>=1)&&(u1.Memory_4>=1))&&(u2.Ext_Bus>=1)))||(((u8.Queue_5>=1)&&(u1.Memory_4>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u4.Queue_1>=1))&&(u3.Memory_3>=1)))||(((u2.Ext_Bus>=1)&&(u3.Memory_3>=1))&&(u9.Queue_2>=1)))||(((u2.Ext_Bus>=1)&&(u3.Memory_3>=1))&&(u7.Queue_4>=1)))||(((u3.Memory_3>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1)))||(((u2.Ext_Bus>=1)&&(u5.Memory_5>=1))&&(u9.Queue_2>=1)))||(((u4.Queue_1>=1)&&(u5.Memory_5>=1))&&(u2.Ext_Bus>=1)))||(((u5.Memory_5>=1)&&(u7.Queue_4>=1))&&(u2.Ext_Bus>=1)))||(((u5.Memory_5>=1)&&(u6.Queue_3>=1))&&(u2.Ext_Bus>=1))))||((((((u9.Active_2>=1)||(u4.Active_1>=1))||(u7.Active_4>=1))||(u6.Active_3>=1))||(u8.Active_5>=1))||((((((((((((((((((((u0.Ext_Mem_Acc_4_1>=1)||(u0.Ext_Mem_Acc_5_1>=1))||(u0.Ext_Mem_Acc_2_1>=1))||(u6.Ext_Mem_Acc_3_1>=1))||(u2.Ext_Mem_Acc_5_2>=1))||(u2.Ext_Mem_Acc_4_2>=1))||(u2.Ext_Mem_Acc_3_2>=1))||(u2.Ext_Mem_Acc_1_2>=1))||(u3.Ext_Mem_Acc_5_3>=1))||(u3.Ext_Mem_Acc_4_3>=1))||(u3.Ext_Mem_Acc_2_3>=1))||(u4.Ext_Mem_Acc_1_3>=1))||(u8.Ext_Mem_Acc_5_4>=1))||(u1.Ext_Mem_Acc_3_4>=1))||(u1.Ext_Mem_Acc_2_4>=1))||(u1.Ext_Mem_Acc_1_4>=1))||(u7.Ext_Mem_Acc_4_5>=1))||(u5.Ext_Mem_Acc_3_5>=1))||(u5.Ext_Mem_Acc_2_5>=1))||(u5.Ext_Mem_Acc_1_5>=1))))||((((((((((((((((((((u0.Ext_Mem_Acc_4_1>=1)||(u0.Ext_Mem_Acc_5_1>=1))||(u0.Ext_Mem_Acc_2_1>=1))||(u6.Ext_Mem_Acc_3_1>=1))||(u2.Ext_Mem_Acc_5_2>=1))||(u2.Ext_Mem_Acc_4_2>=1))||(u2.Ext_Mem_Acc_3_2>=1))||(u2.Ext_Mem_Acc_1_2>=1))||(u3.Ext_Mem_Acc_5_3>=1))||(u3.Ext_Mem_Acc_4_3>=1))||(u3.Ext_Mem_Acc_2_3>=1))||(u4.Ext_Mem_Acc_1_3>=1))||(u8.Ext_Mem_Acc_5_4>=1))||(u1.Ext_Mem_Acc_3_4>=1))||(u1.Ext_Mem_Acc_2_4>=1))||(u1.Ext_Mem_Acc_1_4>=1))||(u7.Ext_Mem_Acc_4_5>=1))||(u5.Ext_Mem_Acc_3_5>=1))||(u5.Ext_Mem_Acc_2_5>=1))||(u5.Ext_Mem_Acc_1_5>=1))))
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-09 with value :(!(u4.Active_1>=1))
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-10 with value :(u3.Ext_Mem_Acc_4_3>=1)
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-12 with value :((((((u2.Ext_Bus>=1)&&(u5.Memory_5>=1))&&(u9.Queue_2>=1))||(((u6.OwnMemAcc_3>=1)&&(u3.Memory_3>=1))&&(u5.Ext_Mem_Acc_3_5>=1)))&&((u0.Ext_Mem_Acc_5_1>=1)&&((((u3.Memory_3>=1)&&(u8.Queue_5>=1))&&(u2.Ext_Bus>=1))||(u0.Ext_Mem_Acc_5_1>=1))))||(!(u6.Active_3>=1)))
Read [reachable] property : SharedMemory-PT-000005-ReachabilityFireability-13 with value :(u2.Ext_Mem_Acc_3_2>=1)
Read [invariant] property : SharedMemory-PT-000005-ReachabilityFireability-14 with value :(!((!(u5.Ext_Mem_Acc_2_5>=1))&&(((u5.Memory_5>=1)&&(u7.Queue_4>=1))&&(u2.Ext_Bus>=1))))
built 25 ordering constraints for composite.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-01 TRUE TECHNIQUES SAT_SMT BMC(1)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory\_PT\_000005\_flat\_flat\_flat\_flat\_mod,1863,0.019275,4212,84,33,378,141,159,192,48,206,0
Total reachable state count : 1863

Verifying 10 reachability properties.
Reachability property SharedMemory-PT-000005-ReachabilityFireability-01 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-01,30,0.042637,4592,34,16,855,141,448,808,66,206,2947
Reachability property SharedMemory-PT-000005-ReachabilityFireability-02 is true.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-02,211,0.051178,4604,82,32,916,141,458,840,66,206,3144
Reachability property SharedMemory-PT-000005-ReachabilityFireability-04 is true.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-04,81,0.052619,4724,18,19,916,141,458,840,66,206,3144
Reachability property SharedMemory-PT-000005-ReachabilityFireability-05 is true.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-05,81,0.054006,4752,18,19,916,141,458,840,66,206,3144
Reachability property SharedMemory-PT-000005-ReachabilityFireability-07 is true.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-07,31,0.06273,4752,27,17,988,141,475,953,66,206,3352
Reachability property SharedMemory-PT-000005-ReachabilityFireability-09 is true.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-09,27,0.062985,4752,18,21,988,141,477,953,68,206,3352
Reachability property SharedMemory-PT-000005-ReachabilityFireability-10 is true.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-10,81,0.063193,4780,18,18,991,141,477,953,68,206,3352
Reachability property SharedMemory-PT-000005-ReachabilityFireability-12 is true.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-12,81,0.064295,4780,17,18,997,141,493,953,68,206,3378
Reachability property SharedMemory-PT-000005-ReachabilityFireability-13 is true.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-13,81,0.064455,4780,17,18,997,141,493,953,68,206,3378
Invariant property SharedMemory-PT-000005-ReachabilityFireability-14 does not hold.
FORMULA SharedMemory-PT-000005-ReachabilityFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SharedMemory-PT-000005-ReachabilityFireability-14,81,0.064859,4788,16,16,1001,141,500,953,70,206,3384
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527429739689

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 2:02:17 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 27, 2018 2:02:17 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 2:02:17 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 59 ms
May 27, 2018 2:02:17 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 41 places.
May 27, 2018 2:02:17 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 55 transitions.
May 27, 2018 2:02:17 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 9 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property SharedMemory-PT-000005-ReachabilityFireability-00 is trivially false : it is not verified in initial state.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property SharedMemory-PT-000005-ReachabilityFireability-03 is trivially true : it is verified in initial state.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property SharedMemory-PT-000005-ReachabilityFireability-06 is trivially true : it is verified in initial state.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property SharedMemory-PT-000005-ReachabilityFireability-08 is trivially false : it is not verified in initial state.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property SharedMemory-PT-000005-ReachabilityFireability-11 is trivially true : it is verified in initial state.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property SharedMemory-PT-000005-ReachabilityFireability-15 is trivially false : it is not verified in initial state.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 43 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 22 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 25 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 26 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 55 transitions.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 55 transitions.
Begin: Sun May 27 14:02:18 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Sun May 27 14:02:18 2018
network size: 41 nodes, 190 links, 110 weight
quality increased from -0.0363866 to 0.401116
end computation: Sun May 27 14:02:18 2018
level 1:
start computation: Sun May 27 14:02:18 2018
network size: 10 nodes, 68 links, 110 weight
quality increased from 0.401116 to 0.401116
end computation: Sun May 27 14:02:18 2018
End: Sun May 27 14:02:18 2018
Total duration: 0 sec
0.401116
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 19 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 11 place invariants in 27 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 10 in 319 ms.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-01(UNSAT) depth K=0 took 15 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-02(UNSAT) depth K=0 took 7 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-04(UNSAT) depth K=0 took 9 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 55 transitions.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 52 redundant transitions.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-05(UNSAT) depth K=0 took 10 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-07(UNSAT) depth K=0 took 16 ms
May 27, 2018 2:02:18 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityFireability.pnml.gal : 12 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-09(UNSAT) depth K=0 took 13 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 11 place invariants in 9 ms
May 27, 2018 2:02:18 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityFireability.prop : 6 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-10(UNSAT) depth K=0 took 11 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-12(UNSAT) depth K=0 took 12 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-13(UNSAT) depth K=0 took 7 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-14(UNSAT) depth K=0 took 17 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: Result is SAT, found a trace to state matching reachability predicate SharedMemory-PT-000005-ReachabilityFireability-01
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-01(TRUE) depth K=1 took 11 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-02(UNSAT) depth K=1 took 55 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SharedMemory-PT-000005-ReachabilityFireability-04(UNSAT) depth K=1 took 30 ms
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying SharedMemory-PT-000005-ReachabilityFireability-05 SMT depth 1
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 1
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Exception in thread "Thread-6" java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 1
May 27, 2018 2:02:18 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 1/ 10 properties. Interrupting other analysis methods.
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 2:02:18 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 494ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000005"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000005.tgz
mv SharedMemory-PT-000005 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is SharedMemory-PT-000005, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r177-smll-152708747500105"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;