Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 300K
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rwxr-xr-x 1 mcc users 121K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is TriangularGrid-PT-4022, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r176-smll-152708747200398
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TriangularGrid-PT-4022-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527373661864

Flatten gal took : 109 ms
Applied a total of 0 rules in 19 ms. Remains 184 /184 variables (removed 0) and now considering 156/156 (removed 0) transitions.
// Phase 1: matrix 156 rows 184 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 156 rows 184 cols
invariant :po1_3_5 + pol1_3_5 = 1
invariant :pb1_4_3 + pb2_4_3 + pb3_4_3 + pbl_4_3 = 8
invariant :pi2_2_3 + pil2_2_3 = 1
invariant :po3_4_5 + pol3_4_5 = 1
invariant :pi1_4_1 + pil1_4_1 = 1
invariant :pi2_4_5 + pil2_4_5 = 1
invariant :pi3_2_3 + pil3_2_3 = 1
invariant :pi3_4_7 + pil3_4_7 = 1
invariant :pb1_2_3 + pb2_2_3 + pb3_2_3 + pbl_2_3 = 8
invariant :po1_3_3 + pol1_3_3 = 1
invariant :pb1_4_7 + pb2_4_7 + pb3_4_7 + pbl_4_7 = 8
invariant :po2_2_1 + pol2_2_1 = 1
invariant :pi2_3_3 + pil2_3_3 = 1
invariant :pi2_4_7 + pil2_4_7 = 1
invariant :pi1_3_1 + pil1_3_1 = 1
invariant :pi2_2_1 + pil2_2_1 = 1
invariant :pi2_3_5 + pil2_3_5 = 1
invariant :pi3_4_3 + pil3_4_3 = 1
invariant :po3_3_3 + pol3_3_3 = 1
invariant :pi1_2_3 + pil1_2_3 = 1
invariant :po3_2_1 + pol3_2_1 = 1
invariant :pi2_1_1 + pil2_1_1 = 1
invariant :pb1_3_1 + pb2_3_1 + pb3_3_1 + pbl_3_1 = 8
invariant :po3_4_3 + pol3_4_3 = 1
invariant :pi1_4_7 + pil1_4_7 = 1
invariant :pi2_4_1 + pil2_4_1 = 1
invariant :pi1_3_5 + pil1_3_5 = 1
invariant :po1_3_1 + pol1_3_1 = 1
invariant :po2_1_1 + pol2_1_1 = 1
invariant :po2_4_1 + pol2_4_1 = 1
invariant :pi1_4_3 + pil1_4_3 = 1
invariant :pb1_3_5 + pb2_3_5 + pb3_3_5 + pbl_3_5 = 8
invariant :pi2_4_3 + pil2_4_3 = 1
invariant :pb1_2_2 + pb2_2_2 + pb3_2_2 + pbl_2_2 = 8
invariant :pi1_4_5 + pil1_4_5 = 1
invariant :pb1_4_6 + pb2_4_6 + pb3_4_6 + pbl_4_6 = 8
invariant :po2_4_7 + pol2_4_7 = 1
invariant :pi1_3_3 + pil1_3_3 = 1
invariant :po3_2_3 + pol3_2_3 = 1
invariant :pi3_3_3 + pil3_3_3 = 1
invariant :pi3_3_5 + pil3_3_5 = 1
invariant :po1_2_1 + pol1_2_1 = 1
invariant :pb1_3_4 + pb2_3_4 + pb3_3_4 + pbl_3_4 = 8
invariant :po1_1_1 + pol1_1_1 = 1
invariant :pi3_2_1 + pil3_2_1 = 1
invariant :po3_3_1 + pol3_3_1 = 1
invariant :pb1_2_1 + pb2_2_1 + pb3_2_1 + -1'pbl_1_1 + -1'pbl_2_2 + -1'pbl_2_3 + -1'pbl_3_1 + -1'pbl_3_2 + -1'pbl_3_3 + -1'pbl_3_4 + -1'pbl_3_5 + -1'pbl_4_1 + -1'pbl_4_2 + -1'pbl_4_3 + -1'pbl_4_4 + -1'pbl_4_5 + -1'pbl_4_6 + -1'pbl_4_7 + -1'pil1_1_1 + -1'pil1_2_1 + -1'pil1_2_3 + -1'pil1_3_1 + -1'pil1_3_3 + -1'pil1_3_5 + -1'pil1_4_1 + -1'pil1_4_3 + -1'pil1_4_5 + -1'pil1_4_7 + -1'pil2_1_1 + -1'pil2_2_1 + -1'pil2_2_3 + -1'pil2_3_1 + -1'pil2_3_3 + -1'pil2_3_5 + -1'pil2_4_1 + -1'pil2_4_3 + -1'pil2_4_5 + -1'pil2_4_7 + -1'pil3_1_1 + -1'pil3_2_1 + -1'pil3_2_3 + -1'pil3_3_1 + -1'pil3_3_3 + -1'pil3_3_5 + -1'pil3_4_1 + -1'pil3_4_3 + -1'pil3_4_5 + -1'pil3_4_7 + -1'pol1_1_1 + -1'pol1_2_1 + -1'pol1_2_3 + -1'pol1_3_1 + -1'pol1_3_3 + -1'pol1_3_5 + -1'pol1_4_1 + -1'pol1_4_3 + -1'pol1_4_5 + -1'pol1_4_7 + -1'pol2_1_1 + -1'pol2_2_1 + -1'pol2_2_3 + -1'pol2_3_1 + -1'pol2_3_3 + -1'pol2_3_5 + -1'pol2_4_1 + -1'pol2_4_3 + -1'pol2_4_5 + -1'pol2_4_7 + -1'pol3_1_1 + -1'pol3_2_1 + -1'pol3_2_3 + -1'pol3_3_1 + -1'pol3_3_3 + -1'pol3_3_5 + -1'pol3_4_1 + -1'pol3_4_3 + -1'pol3_4_5 + -1'pol3_4_7 = -84
invariant :pb1_3_2 + pb2_3_2 + pb3_3_2 + pbl_3_2 = 8
invariant :pi3_4_1 + pil3_4_1 = 1
invariant :po3_4_1 + pol3_4_1 = 1
invariant :po1_4_1 + pol1_4_1 = 1
invariant :po1_4_7 + pol1_4_7 = 1
invariant :po2_3_1 + pol2_3_1 = 1
invariant :po2_4_5 + pol2_4_5 = 1
invariant :pb1_3_3 + pb2_3_3 + pb3_3_3 + pbl_3_3 = 8
invariant :po2_3_3 + pol2_3_3 = 1
invariant :po2_4_3 + pol2_4_3 = 1
invariant :pb1_4_5 + pb2_4_5 + pb3_4_5 + pbl_4_5 = 8
invariant :pbl_1_1 + pbl_2_1 + pbl_2_2 + pbl_2_3 + pbl_3_1 + pbl_3_2 + pbl_3_3 + pbl_3_4 + pbl_3_5 + pbl_4_1 + pbl_4_2 + pbl_4_3 + pbl_4_4 + pbl_4_5 + pbl_4_6 + pbl_4_7 + pil1_1_1 + pil1_2_1 + pil1_2_3 + pil1_3_1 + pil1_3_3 + pil1_3_5 + pil1_4_1 + pil1_4_3 + pil1_4_5 + pil1_4_7 + pil2_1_1 + pil2_2_1 + pil2_2_3 + pil2_3_1 + pil2_3_3 + pil2_3_5 + pil2_4_1 + pil2_4_3 + pil2_4_5 + pil2_4_7 + pil3_1_1 + pil3_2_1 + pil3_2_3 + pil3_3_1 + pil3_3_3 + pil3_3_5 + pil3_4_1 + pil3_4_3 + pil3_4_5 + pil3_4_7 + pol1_1_1 + pol1_2_1 + pol1_2_3 + pol1_3_1 + pol1_3_3 + pol1_3_5 + pol1_4_1 + pol1_4_3 + pol1_4_5 + pol1_4_7 + pol2_1_1 + pol2_2_1 + pol2_2_3 + pol2_3_1 + pol2_3_3 + pol2_3_5 + pol2_4_1 + pol2_4_3 + pol2_4_5 + pol2_4_7 + pol3_1_1 + pol3_2_1 + pol3_2_3 + pol3_3_1 + pol3_3_3 + pol3_3_5 + pol3_4_1 + pol3_4_3 + pol3_4_5 + pol3_4_7 = 92
invariant :pi3_1_1 + pil3_1_1 = 1
invariant :pb1_4_2 + pb2_4_2 + pb3_4_2 + pbl_4_2 = 8
invariant :pb1_4_4 + pb2_4_4 + pb3_4_4 + pbl_4_4 = 8
invariant :po3_1_1 + pol3_1_1 = 1
invariant :pi1_2_1 + pil1_2_1 = 1
invariant :pi3_4_5 + pil3_4_5 = 1
invariant :pi1_1_1 + pil1_1_1 = 1
invariant :po1_4_5 + pol1_4_5 = 1
invariant :po2_2_3 + pol2_2_3 = 1
invariant :po3_4_7 + pol3_4_7 = 1
invariant :po3_3_5 + pol3_3_5 = 1
invariant :po1_4_3 + pol1_4_3 = 1
invariant :pi3_3_1 + pil3_3_1 = 1
invariant :pb1_4_1 + pb2_4_1 + pb3_4_1 + pbl_4_1 = 8
invariant :pb1_1_1 + pb2_1_1 + pb3_1_1 + pbl_1_1 = 8
invariant :po2_3_5 + pol2_3_5 = 1
invariant :po1_2_3 + pol1_2_3 = 1
invariant :pi2_3_1 + pil2_3_1 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3135 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 42 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255

BK_STOP 1527375450238

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 26, 2018 10:27:44 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 26, 2018 10:27:44 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 26, 2018 10:27:44 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 95 ms
May 26, 2018 10:27:44 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 184 places.
May 26, 2018 10:27:44 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 156 transitions.
May 26, 2018 10:27:44 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 17 ms
May 26, 2018 10:27:45 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 105 ms
May 26, 2018 10:27:45 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 6 ms
May 26, 2018 10:27:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 156 transitions.
May 26, 2018 10:27:45 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 3 ms
May 26, 2018 10:27:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 156 transitions.
May 26, 2018 10:27:45 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 77 place invariants in 29 ms
May 26, 2018 10:27:46 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 184 variables to be positive in 801 ms
May 26, 2018 10:27:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 156 transitions.
May 26, 2018 10:27:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/156 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:27:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:27:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 156 transitions.
May 26, 2018 10:27:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 9 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:27:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 156 transitions.
May 26, 2018 10:27:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/156) took 3597 ms. Total solver calls (SAT/UNSAT): 765(750/15)
May 26, 2018 10:27:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/156) took 10080 ms. Total solver calls (SAT/UNSAT): 1359(1332/27)
May 26, 2018 10:28:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/156) took 15646 ms. Total solver calls (SAT/UNSAT): 2079(2043/36)
May 26, 2018 10:28:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/156) took 19120 ms. Total solver calls (SAT/UNSAT): 2360(2322/38)
May 26, 2018 10:28:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/156) took 22437 ms. Total solver calls (SAT/UNSAT): 3045(3003/42)
May 26, 2018 10:28:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/156) took 26343 ms. Total solver calls (SAT/UNSAT): 3312(3269/43)
May 26, 2018 10:28:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/156) took 30502 ms. Total solver calls (SAT/UNSAT): 3575(3530/45)
May 26, 2018 10:28:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/156) took 34148 ms. Total solver calls (SAT/UNSAT): 3834(3787/47)
May 26, 2018 10:28:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/156) took 38076 ms. Total solver calls (SAT/UNSAT): 4215(4167/48)
May 26, 2018 10:28:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/156) took 41448 ms. Total solver calls (SAT/UNSAT): 4464(4414/50)
May 26, 2018 10:28:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/156) took 44829 ms. Total solver calls (SAT/UNSAT): 5187(5133/54)
May 26, 2018 10:28:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/156) took 48298 ms. Total solver calls (SAT/UNSAT): 5304(5249/55)
May 26, 2018 10:28:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/156) took 51846 ms. Total solver calls (SAT/UNSAT): 5535(5478/57)
May 26, 2018 10:28:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/156) took 55134 ms. Total solver calls (SAT/UNSAT): 5874(5814/60)
May 26, 2018 10:28:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/156) took 60510 ms. Total solver calls (SAT/UNSAT): 6419(6356/63)
May 26, 2018 10:28:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/156) took 63876 ms. Total solver calls (SAT/UNSAT): 6525(6461/64)
May 26, 2018 10:28:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/156) took 67280 ms. Total solver calls (SAT/UNSAT): 6837(6771/66)
May 26, 2018 10:28:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/156) took 71297 ms. Total solver calls (SAT/UNSAT): 7239(7169/70)
May 26, 2018 10:29:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/156) took 74400 ms. Total solver calls (SAT/UNSAT): 7625(7553/72)
May 26, 2018 10:29:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/156) took 78926 ms. Total solver calls (SAT/UNSAT): 7995(7920/75)
May 26, 2018 10:29:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/156) took 83813 ms. Total solver calls (SAT/UNSAT): 8262(8184/78)
May 26, 2018 10:29:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/156) took 87811 ms. Total solver calls (SAT/UNSAT): 8687(8605/82)
May 26, 2018 10:29:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/156) took 91088 ms. Total solver calls (SAT/UNSAT): 9087(9001/86)
May 26, 2018 10:29:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/156) took 94991 ms. Total solver calls (SAT/UNSAT): 9315(9226/89)
May 26, 2018 10:29:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/156) took 98270 ms. Total solver calls (SAT/UNSAT): 9744(9650/94)
May 26, 2018 10:29:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/156) took 102192 ms. Total solver calls (SAT/UNSAT): 10010(9914/96)
May 26, 2018 10:29:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/156) took 106541 ms. Total solver calls (SAT/UNSAT): 10379(10278/101)
May 26, 2018 10:29:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/156) took 109754 ms. Total solver calls (SAT/UNSAT): 10815(10708/107)
May 26, 2018 10:29:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/156) took 112877 ms. Total solver calls (SAT/UNSAT): 11055(10947/108)
May 26, 2018 10:29:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/156) took 116062 ms. Total solver calls (SAT/UNSAT): 11424(11316/108)
May 26, 2018 10:29:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/156) took 119508 ms. Total solver calls (SAT/UNSAT): 11594(11486/108)
May 26, 2018 10:29:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/156) took 122968 ms. Total solver calls (SAT/UNSAT): 11837(11729/108)
May 26, 2018 10:29:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(148/156) took 126133 ms. Total solver calls (SAT/UNSAT): 12069(11961/108)
May 26, 2018 10:29:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 126652 ms. Total solver calls (SAT/UNSAT): 12090(11982/108)
May 26, 2018 10:29:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 156 transitions.
May 26, 2018 10:30:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 12574 ms. Total solver calls (SAT/UNSAT): 336(0/336)
May 26, 2018 10:30:05 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 140407ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 134
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.001: completed loading model GAL
pins2lts-mc, 0.002: Initializing POR dependencies: labels 156, guards 156
pins2lts-mc, 0.029: There are 156 state labels and 1 edge labels
pins2lts-mc, 0.029: State length is 184, there are 156 groups
pins2lts-mc, 0.029: Running bfs using 1 core (sequential)
pins2lts-mc, 0.029: Using a non-indexing tree table with 2^27 elements
pins2lts-mc, 0.029: Successor permutation: none
pins2lts-mc, 0.029: Visible groups: 0 / 156, labels: 0 / 156
pins2lts-mc, 0.029: POR cycle proviso: none
pins2lts-mc, 0.029: Global bits: 0, count bits: 0, local bits: 0
pins2lts-mc, 0.116: 80 levels 1000 states 2385 transitions
pins2lts-mc, 0.207: 81 levels 2000 states 5875 transitions
pins2lts-mc, 0.360: 82 levels 4000 states 10335 transitions
pins2lts-mc, 0.649: 83 levels 8000 states 18300 transitions
pins2lts-mc, 1.323: 84 levels 16000 states 41655 transitions
pins2lts-mc, 2.533: 84 levels 32000 states 80745 transitions
pins2lts-mc, 4.936: 85 levels 64000 states 153370 transitions
pins2lts-mc, 9.758: 86 levels 128000 states 323945 transitions
pins2lts-mc, 18.957: 87 levels 256000 states 644020 transitions
pins2lts-mc, 36.867: 88 levels 512000 states 1277250 transitions
pins2lts-mc, 72.350: 89 levels 1024000 states 2590370 transitions
pins2lts-mc, 145.108: 90 levels 2048000 states 5178630 transitions
pins2lts-mc, 292.471: 91 levels 4096000 states 10287990 transitions
pins2lts-mc, 563.475: 92 levels 8192000 states 20331240 transitions
pins2lts-mc, 1138.671: 92 levels 16384000 states 42794970 transitions
pins2lts-mc, 1639.209: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 1639.306:
pins2lts-mc, 1639.306:
pins2lts-mc, 1639.306: Explored 24023490 states 60131415 transitions, fanout: 2.503
pins2lts-mc, 1639.306: Total exploration time 1639.270 sec (1639.270 sec minimum, 1639.270 sec on average)
pins2lts-mc, 1639.306: States per second: 14655, Transitions per second: 36682
pins2lts-mc, 1639.306:
pins2lts-mc, 1639.306: Queue width: 8B, total height: 29080249, memory: 221.86MB
pins2lts-mc, 1639.306: Tree memory: 661.1MB, 13.1 B/state, compr.: 1.8%
pins2lts-mc, 1639.306: Tree fill ratio (roots/leafs): 39.0%/99.0%
pins2lts-mc, 1639.306: Stored 156 string chucks using 0MB
pins2lts-mc, 1639.306: Total memory used for chunk indexing: 0MB
pins2lts-mc, 1639.306: Est. total memory use: 883.0MB (~1245.9MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TriangularGrid-PT-4022"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/TriangularGrid-PT-4022.tgz
mv TriangularGrid-PT-4022 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is TriangularGrid-PT-4022, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r176-smll-152708747200398"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;