Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 700K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 530K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SimpleLoadBal-PT-10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r176-smll-152708746900159
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-00
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-01
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-02
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-03
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-04
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-05
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-06
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-07
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-08
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-09
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-10
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-11
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-12
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-13
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-14
FORMULA_NAME SimpleLoadBal-PT-10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527228621673

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-00 with value :((((P_server_notification_1<=P_lb_load_2_0)&&(P_server_request_3_1>=1))&&((P_lb_load_1_10>=3)||(P_lb_routing_1_10>=3)))&&((!(P_lb_load_2_7>=2))&&((P_lb_routing_1_4>=3)||(P_client_idle_4<=P_client_idle_8))))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-01 with value :(!(((P_lb_routing_1_9>=3)&&(P_server_request_10_1<=P_client_idle_9))||(!(P_client_request_4>=2))))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-02 with value :((P_client_waiting_10>=2)&&(P_lb_routing_1_3>=1))
Read [invariant] property : SimpleLoadBal-PT-10-ReachabilityCardinality-03 with value :(((P_server_request_5_2<=P_lb_balancing_1)||((P_client_waiting_5<=P_server_request_2_1)||(P_lb_load_2_8<=P_lb_load_1_8)))||(P_lb_load_2_10>=3))
Read [invariant] property : SimpleLoadBal-PT-10-ReachabilityCardinality-04 with value :((((P_lb_load_2_4<=P_client_idle_3)&&(P_server_request_5_2<=P_client_waiting_7))||((P_client_ack_3>=3)&&(P_lb_load_1_1<=P_client_idle_2)))||(!(P_client_idle_8<=P_lb_routing_1_3)))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-05 with value :(!(((P_server_request_10_2<=P_server_request_2_1)||(P_server_request_8_2<=P_client_ack_8))&&(P_server_request_5_2<=P_client_ack_9)))
Read [invariant] property : SimpleLoadBal-PT-10-ReachabilityCardinality-06 with value :((P_server_notification_ack_2>=2)||((!(P_client_request_3>=1))||((P_lb_load_1_6<=P_lb_routing_1_7)&&(P_client_ack_6<=P_lb_routing_1_1))))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-07 with value :(P_server_request_4_2>=3)
Read [invariant] property : SimpleLoadBal-PT-10-ReachabilityCardinality-08 with value :((((P_lb_load_2_4<=P_lb_routing_1_2)&&(P_lb_load_2_10>=3))&&((P_client_request_4<=P_server_request_10_2)&&(P_server_notification_2<=P_client_idle_4)))||(!((P_client_ack_5>=3)||(P_client_ack_1>=2))))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-09 with value :((P_client_ack_7>=2)&&(P_lb_routing_1_3<=P_server_request_1_1))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-10 with value :((P_client_ack_4>=2)&&(P_server_notification_2<=P_client_waiting_7))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-11 with value :(((P_client_request_5<=P_server_processed_1)&&((P_server_request_5_2>=2)||(P_lb_idle_1>=2)))&&(P_client_ack_7<=P_lb_load_2_10))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-12 with value :((P_lb_load_2_10>=2)||(P_client_request_7>=2))
Read [invariant] property : SimpleLoadBal-PT-10-ReachabilityCardinality-13 with value :((P_server_request_6_2>=1)||(((P_server_idle_1<=P_client_ack_7)||(P_lb_load_2_1<=P_server_notification_2))||((P_server_request_4_1<=P_server_processed_2)||(P_server_waiting_2>=1))))
Read [reachable] property : SimpleLoadBal-PT-10-ReachabilityCardinality-14 with value :((((P_server_idle_1>=1)&&(P_client_waiting_5>=2))||((P_client_ack_8>=1)&&(P_lb_idle_1<=P_server_request_3_1)))&&(!((P_client_ack_6>=1)&&(P_lb_load_1_8>=1))))
Read [invariant] property : SimpleLoadBal-PT-10-ReachabilityCardinality-15 with value :(!(((P_server_request_8_1>=2)&&(P_client_request_2<=P_lb_routing_1_5))&&(P_client_idle_1<=P_lb_load_1_1)))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 475
// Phase 1: matrix 475 rows 104 cols
invariant :P_client_idle_8 + P_client_waiting_8 = 1
invariant :P_server_idle_2 + P_server_waiting_2 + P_server_processed_2 = 1
invariant :-1'P_client_waiting_8 + P_client_request_8 + P_client_ack_8 + P_server_request_8_1 + P_server_request_8_2 + P_lb_routing_1_8 = 0
invariant :P_client_idle_6 + P_client_waiting_6 = 1
invariant :-1'P_server_waiting_1 + P_server_notification_1 + P_server_notification_ack_1 = 0
invariant :P_client_idle_1 + P_client_waiting_1 = 1
invariant :-1'P_client_waiting_5 + P_client_request_5 + P_client_ack_5 + P_server_request_5_1 + P_server_request_5_2 + P_lb_routing_1_5 = 0
invariant :P_client_idle_9 + P_client_waiting_9 = 1
invariant :-1'P_client_waiting_9 + P_client_request_9 + P_client_ack_9 + P_server_request_9_1 + P_server_request_9_2 + P_lb_routing_1_9 = 0
invariant :P_client_idle_2 + P_client_waiting_2 = 1
invariant :P_client_waiting_1 + P_client_waiting_2 + P_client_waiting_3 + P_client_waiting_4 + P_client_waiting_5 + P_client_waiting_6 + P_client_waiting_7 + P_client_waiting_8 + P_client_waiting_9 + P_client_waiting_10 + -1'P_client_request_1 + -1'P_client_request_2 + -1'P_client_request_3 + -1'P_client_request_4 + -1'P_client_request_5 + -1'P_client_request_6 + -1'P_client_request_7 + -1'P_client_request_8 + -1'P_client_request_9 + -1'P_client_request_10 + -1'P_client_ack_1 + -1'P_client_ack_2 + -1'P_client_ack_3 + -1'P_client_ack_4 + -1'P_client_ack_5 + -1'P_client_ack_6 + -1'P_client_ack_7 + -1'P_client_ack_8 + -1'P_client_ack_9 + -1'P_client_ack_10 + P_server_waiting_1 + P_server_processed_1 + -1'P_server_notification_ack_1 + -1'P_server_request_1_2 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + -1'P_server_request_4_2 + -1'P_server_request_5_2 + -1'P_server_request_6_2 + -1'P_server_request_7_2 + -1'P_server_request_8_2 + -1'P_server_request_9_2 + -1'P_server_request_10_2 + -1'P_lb_routing_1_1 + -1'P_lb_routing_1_2 + -1'P_lb_routing_1_3 + -1'P_lb_routing_1_4 + -1'P_lb_routing_1_5 + -1'P_lb_routing_1_6 + -1'P_lb_routing_1_7 + -1'P_lb_routing_1_8 + -1'P_lb_routing_1_9 + -1'P_lb_routing_1_10 + 4'P_lb_load_1_0 + 3'P_lb_load_1_1 + 2'P_lb_load_1_2 + P_lb_load_1_3 + -1'P_lb_load_1_5 + -2'P_lb_load_1_6 + -3'P_lb_load_1_7 + -4'P_lb_load_1_8 + -5'P_lb_load_1_9 + -6'P_lb_load_1_10 = 4
invariant :-1'P_client_waiting_10 + P_client_request_10 + P_client_ack_10 + P_server_request_10_1 + P_server_request_10_2 + P_lb_routing_1_10 = 0
invariant :-1'P_client_waiting_1 + P_client_request_1 + P_client_ack_1 + P_server_request_1_1 + P_server_request_1_2 + P_lb_routing_1_1 = 0
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_2 + -1'P_client_waiting_3 + -1'P_client_waiting_4 + -1'P_client_waiting_5 + -1'P_client_waiting_6 + -1'P_client_waiting_7 + -1'P_client_waiting_8 + -1'P_client_waiting_9 + -1'P_client_waiting_10 + P_client_request_1 + P_client_request_2 + P_client_request_3 + P_client_request_4 + P_client_request_5 + P_client_request_6 + P_client_request_7 + P_client_request_8 + P_client_request_9 + P_client_request_10 + P_client_ack_1 + P_client_ack_2 + P_client_ack_3 + P_client_ack_4 + P_client_ack_5 + P_client_ack_6 + P_client_ack_7 + P_client_ack_8 + P_client_ack_9 + P_client_ack_10 + -1'P_server_waiting_1 + -1'P_server_processed_1 + P_server_notification_ack_1 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + P_server_request_4_2 + P_server_request_5_2 + P_server_request_6_2 + P_server_request_7_2 + P_server_request_8_2 + P_server_request_9_2 + P_server_request_10_2 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_routing_1_6 + P_lb_routing_1_7 + P_lb_routing_1_8 + P_lb_routing_1_9 + P_lb_routing_1_10 + -3'P_lb_load_1_0 + -2'P_lb_load_1_1 + -1'P_lb_load_1_2 + P_lb_load_1_4 + 2'P_lb_load_1_5 + 3'P_lb_load_1_6 + 4'P_lb_load_1_7 + 5'P_lb_load_1_8 + 6'P_lb_load_1_9 + 7'P_lb_load_1_10 = -3
invariant :P_client_idle_7 + P_client_waiting_7 = 1
invariant :-1'P_client_waiting_4 + P_client_request_4 + P_client_ack_4 + P_server_request_4_1 + P_server_request_4_2 + P_lb_routing_1_4 = 0
invariant :P_lb_idle_1 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_routing_1_6 + P_lb_routing_1_7 + P_lb_routing_1_8 + P_lb_routing_1_9 + P_lb_routing_1_10 + P_lb_balancing_1 = 1
invariant :P_client_idle_3 + P_client_waiting_3 = 1
invariant :-1'P_client_waiting_7 + P_client_request_7 + P_client_ack_7 + P_server_request_7_1 + P_server_request_7_2 + P_lb_routing_1_7 = 0
invariant :P_server_idle_1 + P_server_waiting_1 + P_server_processed_1 = 1
invariant :P_server_waiting_2 + P_server_processed_2 + -1'P_server_notification_ack_2 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + P_server_request_4_2 + P_server_request_5_2 + P_server_request_6_2 + P_server_request_7_2 + P_server_request_8_2 + P_server_request_9_2 + P_server_request_10_2 + 9'P_lb_load_2_0 + 8'P_lb_load_2_1 + 7'P_lb_load_2_2 + 6'P_lb_load_2_3 + 5'P_lb_load_2_4 + 4'P_lb_load_2_5 + 3'P_lb_load_2_6 + 2'P_lb_load_2_7 + P_lb_load_2_8 + -1'P_lb_load_2_10 = 9
invariant :-1'P_server_waiting_2 + -1'P_server_processed_2 + P_server_notification_ack_2 + -1'P_server_request_1_2 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + -1'P_server_request_4_2 + -1'P_server_request_5_2 + -1'P_server_request_6_2 + -1'P_server_request_7_2 + -1'P_server_request_8_2 + -1'P_server_request_9_2 + -1'P_server_request_10_2 + -8'P_lb_load_2_0 + -7'P_lb_load_2_1 + -6'P_lb_load_2_2 + -5'P_lb_load_2_3 + -4'P_lb_load_2_4 + -3'P_lb_load_2_5 + -2'P_lb_load_2_6 + -1'P_lb_load_2_7 + P_lb_load_2_9 + 2'P_lb_load_2_10 = -8
invariant :-1'P_client_waiting_2 + P_client_request_2 + P_client_ack_2 + P_server_request_2_1 + P_server_request_2_2 + P_lb_routing_1_2 = 0
invariant :-1'P_server_waiting_2 + P_server_notification_2 + P_server_notification_ack_2 = 0
invariant :-1'P_client_waiting_3 + P_client_request_3 + P_client_ack_3 + P_server_request_3_1 + P_server_request_3_2 + P_lb_routing_1_3 = 0
invariant :-1'P_client_waiting_6 + P_client_request_6 + P_client_ack_6 + P_server_request_6_1 + P_server_request_6_2 + P_lb_routing_1_6 = 0
invariant :P_client_idle_10 + P_client_waiting_10 = 1
invariant :P_client_idle_5 + P_client_waiting_5 = 1
invariant :P_client_idle_4 + P_client_waiting_4 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 475
// Phase 1: matrix 475 rows 104 cols
invariant :P_client_idle_8 + P_client_waiting_8 = 1
invariant :P_server_idle_2 + P_server_waiting_2 + P_server_processed_2 = 1
invariant :-1'P_client_waiting_8 + P_client_request_8 + P_client_ack_8 + P_server_request_8_1 + P_server_request_8_2 + P_lb_routing_1_8 = 0
invariant :P_client_idle_6 + P_client_waiting_6 = 1
invariant :-1'P_server_waiting_1 + P_server_notification_1 + P_server_notification_ack_1 = 0
invariant :P_client_idle_1 + P_client_waiting_1 = 1
invariant :-1'P_client_waiting_5 + P_client_request_5 + P_client_ack_5 + P_server_request_5_1 + P_server_request_5_2 + P_lb_routing_1_5 = 0
invariant :P_client_idle_9 + P_client_waiting_9 = 1
invariant :-1'P_client_waiting_9 + P_client_request_9 + P_client_ack_9 + P_server_request_9_1 + P_server_request_9_2 + P_lb_routing_1_9 = 0
invariant :P_client_idle_2 + P_client_waiting_2 = 1
invariant :P_client_waiting_1 + P_client_waiting_2 + P_client_waiting_3 + P_client_waiting_4 + P_client_waiting_5 + P_client_waiting_6 + P_client_waiting_7 + P_client_waiting_8 + P_client_waiting_9 + P_client_waiting_10 + -1'P_client_request_1 + -1'P_client_request_2 + -1'P_client_request_3 + -1'P_client_request_4 + -1'P_client_request_5 + -1'P_client_request_6 + -1'P_client_request_7 + -1'P_client_request_8 + -1'P_client_request_9 + -1'P_client_request_10 + -1'P_client_ack_1 + -1'P_client_ack_2 + -1'P_client_ack_3 + -1'P_client_ack_4 + -1'P_client_ack_5 + -1'P_client_ack_6 + -1'P_client_ack_7 + -1'P_client_ack_8 + -1'P_client_ack_9 + -1'P_client_ack_10 + P_server_waiting_1 + P_server_processed_1 + -1'P_server_notification_ack_1 + -1'P_server_request_1_2 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + -1'P_server_request_4_2 + -1'P_server_request_5_2 + -1'P_server_request_6_2 + -1'P_server_request_7_2 + -1'P_server_request_8_2 + -1'P_server_request_9_2 + -1'P_server_request_10_2 + -1'P_lb_routing_1_1 + -1'P_lb_routing_1_2 + -1'P_lb_routing_1_3 + -1'P_lb_routing_1_4 + -1'P_lb_routing_1_5 + -1'P_lb_routing_1_6 + -1'P_lb_routing_1_7 + -1'P_lb_routing_1_8 + -1'P_lb_routing_1_9 + -1'P_lb_routing_1_10 + 4'P_lb_load_1_0 + 3'P_lb_load_1_1 + 2'P_lb_load_1_2 + P_lb_load_1_3 + -1'P_lb_load_1_5 + -2'P_lb_load_1_6 + -3'P_lb_load_1_7 + -4'P_lb_load_1_8 + -5'P_lb_load_1_9 + -6'P_lb_load_1_10 = 4
invariant :-1'P_client_waiting_10 + P_client_request_10 + P_client_ack_10 + P_server_request_10_1 + P_server_request_10_2 + P_lb_routing_1_10 = 0
invariant :-1'P_client_waiting_1 + P_client_request_1 + P_client_ack_1 + P_server_request_1_1 + P_server_request_1_2 + P_lb_routing_1_1 = 0
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_2 + -1'P_client_waiting_3 + -1'P_client_waiting_4 + -1'P_client_waiting_5 + -1'P_client_waiting_6 + -1'P_client_waiting_7 + -1'P_client_waiting_8 + -1'P_client_waiting_9 + -1'P_client_waiting_10 + P_client_request_1 + P_client_request_2 + P_client_request_3 + P_client_request_4 + P_client_request_5 + P_client_request_6 + P_client_request_7 + P_client_request_8 + P_client_request_9 + P_client_request_10 + P_client_ack_1 + P_client_ack_2 + P_client_ack_3 + P_client_ack_4 + P_client_ack_5 + P_client_ack_6 + P_client_ack_7 + P_client_ack_8 + P_client_ack_9 + P_client_ack_10 + -1'P_server_waiting_1 + -1'P_server_processed_1 + P_server_notification_ack_1 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + P_server_request_4_2 + P_server_request_5_2 + P_server_request_6_2 + P_server_request_7_2 + P_server_request_8_2 + P_server_request_9_2 + P_server_request_10_2 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_routing_1_6 + P_lb_routing_1_7 + P_lb_routing_1_8 + P_lb_routing_1_9 + P_lb_routing_1_10 + -3'P_lb_load_1_0 + -2'P_lb_load_1_1 + -1'P_lb_load_1_2 + P_lb_load_1_4 + 2'P_lb_load_1_5 + 3'P_lb_load_1_6 + 4'P_lb_load_1_7 + 5'P_lb_load_1_8 + 6'P_lb_load_1_9 + 7'P_lb_load_1_10 = -3
invariant :P_client_idle_7 + P_client_waiting_7 = 1
invariant :-1'P_client_waiting_4 + P_client_request_4 + P_client_ack_4 + P_server_request_4_1 + P_server_request_4_2 + P_lb_routing_1_4 = 0
invariant :P_lb_idle_1 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_routing_1_6 + P_lb_routing_1_7 + P_lb_routing_1_8 + P_lb_routing_1_9 + P_lb_routing_1_10 + P_lb_balancing_1 = 1
invariant :P_client_idle_3 + P_client_waiting_3 = 1
invariant :-1'P_client_waiting_7 + P_client_request_7 + P_client_ack_7 + P_server_request_7_1 + P_server_request_7_2 + P_lb_routing_1_7 = 0
invariant :P_server_idle_1 + P_server_waiting_1 + P_server_processed_1 = 1
invariant :P_server_waiting_2 + P_server_processed_2 + -1'P_server_notification_ack_2 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + P_server_request_4_2 + P_server_request_5_2 + P_server_request_6_2 + P_server_request_7_2 + P_server_request_8_2 + P_server_request_9_2 + P_server_request_10_2 + 9'P_lb_load_2_0 + 8'P_lb_load_2_1 + 7'P_lb_load_2_2 + 6'P_lb_load_2_3 + 5'P_lb_load_2_4 + 4'P_lb_load_2_5 + 3'P_lb_load_2_6 + 2'P_lb_load_2_7 + P_lb_load_2_8 + -1'P_lb_load_2_10 = 9
invariant :-1'P_server_waiting_2 + -1'P_server_processed_2 + P_server_notification_ack_2 + -1'P_server_request_1_2 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + -1'P_server_request_4_2 + -1'P_server_request_5_2 + -1'P_server_request_6_2 + -1'P_server_request_7_2 + -1'P_server_request_8_2 + -1'P_server_request_9_2 + -1'P_server_request_10_2 + -8'P_lb_load_2_0 + -7'P_lb_load_2_1 + -6'P_lb_load_2_2 + -5'P_lb_load_2_3 + -4'P_lb_load_2_4 + -3'P_lb_load_2_5 + -2'P_lb_load_2_6 + -1'P_lb_load_2_7 + P_lb_load_2_9 + 2'P_lb_load_2_10 = -8
invariant :-1'P_client_waiting_2 + P_client_request_2 + P_client_ack_2 + P_server_request_2_1 + P_server_request_2_2 + P_lb_routing_1_2 = 0
invariant :-1'P_server_waiting_2 + P_server_notification_2 + P_server_notification_ack_2 = 0
invariant :-1'P_client_waiting_3 + P_client_request_3 + P_client_ack_3 + P_server_request_3_1 + P_server_request_3_2 + P_lb_routing_1_3 = 0
invariant :-1'P_client_waiting_6 + P_client_request_6 + P_client_ack_6 + P_server_request_6_1 + P_server_request_6_2 + P_lb_routing_1_6 = 0
invariant :P_client_idle_10 + P_client_waiting_10 = 1
invariant :P_client_idle_5 + P_client_waiting_5 = 1
invariant :P_client_idle_4 + P_client_waiting_4 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-00 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-08 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Compilation finished in 10674 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 51 ms.
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SimpleLoadBalPT10ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-10 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-11 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-12 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-15 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal\_PT\_10\_flat\_flat,4.06034e+08,32.497,622132,2,39855,5,1.12051e+06,6,0,1024,964322,0
Total reachable state count : 406034376

Verifying 16 reachability properties.
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-00 does not hold.
No reachable states exhibit your property : SimpleLoadBal-PT-10-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-00,0,32.5092,622220,1,0,5,1.12051e+06,7,0,1040,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-01 does not hold.
No reachable states exhibit your property : SimpleLoadBal-PT-10-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-01,0,32.5265,622276,1,0,5,1.12051e+06,8,0,1051,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-02 does not hold.
No reachable states exhibit your property : SimpleLoadBal-PT-10-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-02,0,32.5268,622276,1,0,5,1.12051e+06,9,0,1053,964322,0
Invariant property SimpleLoadBal-PT-10-ReachabilityCardinality-03 is true.
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-03,0,32.5685,622276,1,0,5,1.12051e+06,10,0,1066,964322,0
Invariant property SimpleLoadBal-PT-10-ReachabilityCardinality-04 does not hold.
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-04,4,32.5752,622340,2,146,6,1.12051e+06,11,0,1084,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-05 is true.
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-05,16908,32.5797,622340,2,3455,7,1.12051e+06,12,0,1094,964322,0
Invariant property SimpleLoadBal-PT-10-ReachabilityCardinality-06 does not hold.
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-06,8112,32.5869,622340,2,3177,8,1.12051e+06,13,0,1113,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-07 does not hold.
No reachable states exhibit your property : SimpleLoadBal-PT-10-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-07,0,32.6107,622340,1,0,8,1.12051e+06,14,0,1114,964322,0
Invariant property SimpleLoadBal-PT-10-ReachabilityCardinality-08 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-08,0,32.6427,622340,1,0,8,1.12051e+06,15,0,1123,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-09 does not hold.
No reachable states exhibit your property : SimpleLoadBal-PT-10-ReachabilityCardinality-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-09,0,32.6462,622340,1,0,8,1.12051e+06,16,0,1126,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-10 does not hold.
No reachable states exhibit your property : SimpleLoadBal-PT-10-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-10,0,32.7365,622340,1,0,8,1.12051e+06,17,0,1135,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-11 does not hold.
No reachable states exhibit your property : SimpleLoadBal-PT-10-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-11,0,32.7581,622340,1,0,8,1.12051e+06,18,0,1141,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-12 does not hold.
No reachable states exhibit your property : SimpleLoadBal-PT-10-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-12,0,32.7604,622340,1,0,8,1.12051e+06,19,0,1144,964322,0
Invariant property SimpleLoadBal-PT-10-ReachabilityCardinality-13 does not hold.
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-13,188,32.7708,622340,2,545,9,1.12051e+06,20,0,1170,964322,0
Reachability property SimpleLoadBal-PT-10-ReachabilityCardinality-14 is true.
FORMULA SimpleLoadBal-PT-10-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-14,14080,32.7789,622340,2,3712,10,1.12051e+06,21,0,1186,964322,0
Invariant property SimpleLoadBal-PT-10-ReachabilityCardinality-15 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-10-ReachabilityCardinality-15,0,32.8681,622340,1,0,10,1.12051e+06,22,0,1199,964322,0
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527228660198

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 6:10:24 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 25, 2018 6:10:24 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 6:10:24 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 175 ms
May 25, 2018 6:10:24 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 104 places.
May 25, 2018 6:10:24 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 605 transitions.
May 25, 2018 6:10:24 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 57 ms
May 25, 2018 6:10:25 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 365 ms
May 25, 2018 6:10:25 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 474 ms
May 25, 2018 6:10:25 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 48 ms
May 25, 2018 6:10:25 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 25, 2018 6:10:25 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 565 ms
May 25, 2018 6:10:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 605 transitions.
May 25, 2018 6:10:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 605 transitions.
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 126 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 965 ms.
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-00(UNSAT) depth K=0 took 10 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-01(UNSAT) depth K=0 took 13 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-02(UNSAT) depth K=0 took 8 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-03(UNSAT) depth K=0 took 3 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-04(UNSAT) depth K=0 took 11 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-05(UNSAT) depth K=0 took 11 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-06(UNSAT) depth K=0 took 11 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-07(UNSAT) depth K=0 took 19 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-08(UNSAT) depth K=0 took 11 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-09(UNSAT) depth K=0 took 11 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-10(UNSAT) depth K=0 took 8 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-11(UNSAT) depth K=0 took 19 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-12(UNSAT) depth K=0 took 8 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-13(UNSAT) depth K=0 took 6 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-14(UNSAT) depth K=0 took 14 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-15(UNSAT) depth K=0 took 13 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-00(UNSAT) depth K=1 took 9 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-01(UNSAT) depth K=1 took 19 ms
May 25, 2018 6:10:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-02(UNSAT) depth K=1 took 11 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-03(UNSAT) depth K=1 took 20 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-04(UNSAT) depth K=1 took 19 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 605 transitions.
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-05(UNSAT) depth K=1 took 23 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-06(UNSAT) depth K=1 took 9 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-07(UNSAT) depth K=1 took 15 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-08(UNSAT) depth K=1 took 11 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-09(UNSAT) depth K=1 took 3 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-10(UNSAT) depth K=1 took 7 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-11(UNSAT) depth K=1 took 3 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-12(UNSAT) depth K=1 took 11 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-13(UNSAT) depth K=1 took 4 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-14(UNSAT) depth K=1 took 26 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-15(UNSAT) depth K=1 took 19 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 96 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-00(UNSAT) depth K=2 took 448 ms
May 25, 2018 6:10:27 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 6:10:28 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2871ms conformant to PINS in folder :/home/mcc/execution
May 25, 2018 6:10:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-01(UNSAT) depth K=2 took 851 ms
May 25, 2018 6:10:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-02(UNSAT) depth K=2 took 195 ms
May 25, 2018 6:10:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-03(UNSAT) depth K=2 took 527 ms
May 25, 2018 6:10:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-04(UNSAT) depth K=2 took 199 ms
May 25, 2018 6:10:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-05(UNSAT) depth K=2 took 266 ms
May 25, 2018 6:10:29 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 104 variables to be positive in 2206 ms
May 25, 2018 6:10:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-06(UNSAT) depth K=2 took 832 ms
May 25, 2018 6:10:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-07(UNSAT) depth K=2 took 123 ms
May 25, 2018 6:10:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-08(UNSAT) depth K=2 took 179 ms
May 25, 2018 6:10:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SimpleLoadBal-PT-10-ReachabilityCardinality-00
May 25, 2018 6:10:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-00
May 25, 2018 6:10:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-00(FALSE) depth K=0 took 1582 ms
May 25, 2018 6:10:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-09(UNSAT) depth K=2 took 990 ms
May 25, 2018 6:10:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SimpleLoadBal-PT-10-ReachabilityCardinality-01
May 25, 2018 6:10:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-01
May 25, 2018 6:10:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-01(FALSE) depth K=0 took 657 ms
May 25, 2018 6:10:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SimpleLoadBal-PT-10-ReachabilityCardinality-02
May 25, 2018 6:10:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-02
May 25, 2018 6:10:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-02(FALSE) depth K=0 took 683 ms
May 25, 2018 6:10:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-10(UNSAT) depth K=2 took 1015 ms
May 25, 2018 6:10:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-11(UNSAT) depth K=2 took 226 ms
May 25, 2018 6:10:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-12(UNSAT) depth K=2 took 258 ms
May 25, 2018 6:10:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-13(UNSAT) depth K=2 took 128 ms
May 25, 2018 6:10:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-14(UNSAT) depth K=2 took 263 ms
May 25, 2018 6:10:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-15(UNSAT) depth K=2 took 99 ms
May 25, 2018 6:10:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSimpleLoadBal-PT-10-ReachabilityCardinality-03
May 25, 2018 6:10:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-03(SAT) depth K=0 took 1929 ms
May 25, 2018 6:10:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSimpleLoadBal-PT-10-ReachabilityCardinality-04
May 25, 2018 6:10:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-04(SAT) depth K=0 took 753 ms
May 25, 2018 6:10:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSimpleLoadBal-PT-10-ReachabilityCardinality-05
May 25, 2018 6:10:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-05(SAT) depth K=0 took 459 ms
May 25, 2018 6:10:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSimpleLoadBal-PT-10-ReachabilityCardinality-06
May 25, 2018 6:10:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-06(SAT) depth K=0 took 884 ms
May 25, 2018 6:10:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SimpleLoadBal-PT-10-ReachabilityCardinality-07
May 25, 2018 6:10:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-07
May 25, 2018 6:10:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-07(FALSE) depth K=0 took 699 ms
May 25, 2018 6:10:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SimpleLoadBal-PT-10-ReachabilityCardinality-08
May 25, 2018 6:10:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-08
May 25, 2018 6:10:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-08(TRUE) depth K=0 took 1011 ms
May 25, 2018 6:10:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SimpleLoadBal-PT-10-ReachabilityCardinality-09
May 25, 2018 6:10:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-09
May 25, 2018 6:10:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-09(FALSE) depth K=0 took 558 ms
May 25, 2018 6:10:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SimpleLoadBal-PT-10-ReachabilityCardinality-10
May 25, 2018 6:10:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-10
May 25, 2018 6:10:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-10(FALSE) depth K=0 took 673 ms
May 25, 2018 6:10:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SimpleLoadBal-PT-10-ReachabilityCardinality-11
May 25, 2018 6:10:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-11
May 25, 2018 6:10:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-11(FALSE) depth K=0 took 1346 ms
May 25, 2018 6:10:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SimpleLoadBal-PT-10-ReachabilityCardinality-12
May 25, 2018 6:10:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-12
May 25, 2018 6:10:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-12(FALSE) depth K=0 took 1062 ms
May 25, 2018 6:10:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSimpleLoadBal-PT-10-ReachabilityCardinality-13
May 25, 2018 6:10:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-13(SAT) depth K=0 took 1485 ms
May 25, 2018 6:10:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSimpleLoadBal-PT-10-ReachabilityCardinality-14
May 25, 2018 6:10:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-14(SAT) depth K=0 took 1097 ms
May 25, 2018 6:10:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SimpleLoadBal-PT-10-ReachabilityCardinality-15
May 25, 2018 6:10:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SimpleLoadBal-PT-10-ReachabilityCardinality-15
May 25, 2018 6:10:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-15(TRUE) depth K=0 took 685 ms
May 25, 2018 6:10:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-03(UNSAT) depth K=3 took 15189 ms
May 25, 2018 6:10:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSimpleLoadBal-PT-10-ReachabilityCardinality-03
May 25, 2018 6:10:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SimpleLoadBal-PT-10-ReachabilityCardinality-03(SAT) depth K=1 took 5357 ms
May 25, 2018 6:10:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 6:10:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying SimpleLoadBal-PT-10-ReachabilityCardinality-04 SMT depth 3
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 25, 2018 6:10:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
May 25, 2018 6:10:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 6:10:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying SimpleLoadBal-PT-10-ReachabilityCardinality-04 K-induction depth 1
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 25, 2018 6:10:59 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 10/ 16 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-10.tgz
mv SimpleLoadBal-PT-10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SimpleLoadBal-PT-10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r176-smll-152708746900159"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;