fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r164-smll-152705515600181
Last Updated
June 26, 2018

About the Execution of ITS-Tools for SquareGrid-PT-020102

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.160 6547.00 12458.00 357.90 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 224K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.0K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 111 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 349 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 7 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rwxr-xr-x 1 mcc users 55K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SquareGrid-PT-020102, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r164-smll-152705515600181
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SquareGrid-PT-020102-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527169042232

Flatten gal took : 79 ms
Applied a total of 0 rules in 7 ms. Remains 68 /68 variables (removed 0) and now considering 72/72 (removed 0) transitions.
// Phase 1: matrix 72 rows 68 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 72 rows 68 cols
invariant :p1i_2_1 + p1il_2_1 = 1
invariant :pb1_1_1 + pb2_1_1 + pb3_1_1 + pb4_1_1 + pbl_1_1 = 6
invariant :p1i_2_2 + p1il_2_2 = 1
invariant :p1il_0 + p1il_1_2 + p1il_2_1 + p1il_2_2 + p1ol_1_1 + p1ol_1_2 + p1ol_2_1 + p1ol_2_2 + p2il_1_2 + p2il_2_2 + p2ol_1_2 + p2ol_2_2 + p3il_2_1 + p3il_2_2 + p3ol_2_1 + p3ol_2_2 + p4il_1_1 + p4il_1_2 + p4il_2_1 + p4il_2_2 + p4ol_1_1 + p4ol_1_2 + p4ol_2_1 + p4ol_2_2 + pbl_1_1 + pbl_1_2 + pbl_2_1 + pbl_2_2 = 32
invariant :p4o_2_1 + p4ol_2_1 = 1
invariant :p4i_1_2 + p4il_1_2 = 1
invariant :pb1_2_2 + pb2_2_2 + pb3_2_2 + pb4_2_2 + pbl_2_2 = 6
invariant :p4o_1_2 + p4ol_1_2 = 1
invariant :p1o_1_2 + p1ol_1_2 = 1
invariant :p4o_2_2 + p4ol_2_2 = 1
invariant :p4o_1_1 + p4ol_1_1 = 1
invariant :p3i_2_1 + p3il_2_1 = 1
invariant :p1i_0 + p1il_0 = 1
invariant :p4i_2_1 + p4il_2_1 = 1
invariant :p1o_2_2 + p1ol_2_2 = 1
invariant :pb1_2_1 + pb2_2_1 + pb3_2_1 + pb4_2_1 + pbl_2_1 = 6
invariant :pb1_1_2 + pb2_1_2 + pb3_1_2 + pb4_1_2 + pbl_1_2 = 6
invariant :p1o_2_1 + p1ol_2_1 = 1
invariant :p2i_2_2 + p2il_2_2 = 1
invariant :p1i_1_2 + -1'p1il_0 + -1'p1il_2_1 + -1'p1il_2_2 + -1'p1ol_1_1 + -1'p1ol_1_2 + -1'p1ol_2_1 + -1'p1ol_2_2 + -1'p2il_1_2 + -1'p2il_2_2 + -1'p2ol_1_2 + -1'p2ol_2_2 + -1'p3il_2_1 + -1'p3il_2_2 + -1'p3ol_2_1 + -1'p3ol_2_2 + -1'p4il_1_1 + -1'p4il_1_2 + -1'p4il_2_1 + -1'p4il_2_2 + -1'p4ol_1_1 + -1'p4ol_1_2 + -1'p4ol_2_1 + -1'p4ol_2_2 + -1'pbl_1_1 + -1'pbl_1_2 + -1'pbl_2_1 + -1'pbl_2_2 = -31
invariant :p2i_1_2 + p2il_1_2 = 1
invariant :p2o_1_2 + p2ol_1_2 = 1
invariant :p2o_2_2 + p2ol_2_2 = 1
invariant :p3i_2_2 + p3il_2_2 = 1
invariant :p1o_1_1 + p1ol_1_1 = 1
invariant :p3o_2_2 + p3ol_2_2 = 1
invariant :p4i_2_2 + p4il_2_2 = 1
invariant :p3o_2_1 + p3ol_2_1 = 1
invariant :p4i_1_1 + p4il_1_1 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,2.08542e+12,0.983839,23216,2,3270,5,111992,6,0,347,116522,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,568,1.52494,27836,2,2638,7,145637,9,1,1770,116522,2

System contains 568 deadlocks (shown below if less than --print-limit option) !
FORMULA SquareGrid-PT-020102-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
[ 568 states ] showing 10 first states
[ p3o_2_2=1 p3i_2_2=1 p2il_2_2=1 pb4_2_2=6 p4i_2_2=1 p1il_2_2=1 p2ol_2_2=1 p1ol_2_2=1 p4il_1_2=1 pbl_1_2=6 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4o_2_2=1 p4ol_1_2=1 pb2_2_1=6 p4il_2_1=1 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb2_2_2=6 p2i_2_2=1 p4i_2_2=1 p1il_2_2=1 p2o_2_2=1 p1ol_2_2=1 p4il_1_2=1 pbl_1_2=6 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4ol_2_2=1 p4ol_1_2=1 pb2_2_1=5 p4il_2_1=1 pbl_2_1=1 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb2_2_2=6 p2i_2_2=1 p4i_2_2=1 p1i_2_2=1 p2o_2_2=1 p1ol_2_2=1 p4il_1_2=1 pbl_1_2=6 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4ol_2_2=1 p4ol_1_2=1 pb2_2_1=4 p4il_2_1=1 pbl_2_1=2 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb2_2_2=6 p2i_2_2=1 p4i_2_2=1 p1i_2_2=1 p2o_2_2=1 p1ol_2_2=1 pb3_1_2=1 p4il_1_2=1 pbl_1_2=5 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4ol_2_2=1 p4ol_1_2=1 pb2_2_1=3 p4il_2_1=1 pbl_2_1=3 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb2_2_2=6 p2i_2_2=1 p4i_2_2=1 p1i_2_2=1 p2o_2_2=1 p1ol_2_2=1 pb3_1_2=2 p4il_1_2=1 pbl_1_2=4 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4ol_2_2=1 p4ol_1_2=1 pb2_2_1=2 p4il_2_1=1 pbl_2_1=4 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb2_2_2=6 p2i_2_2=1 p4i_2_2=1 p1i_2_2=1 p2o_2_2=1 p1ol_2_2=1 pb3_1_2=3 p4il_1_2=1 pbl_1_2=3 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4ol_2_2=1 p4ol_1_2=1 pb2_2_1=1 p4il_2_1=1 pbl_2_1=5 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb2_2_2=6 p2i_2_2=1 p4i_2_2=1 p1i_2_2=1 p2o_2_2=1 p1ol_2_2=1 pb3_1_2=4 p4il_1_2=1 pbl_1_2=2 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4ol_2_2=1 p4ol_1_2=1 p4il_2_1=1 pbl_2_1=6 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb2_2_2=6 p2i_2_2=1 p4il_2_2=1 p1i_2_2=1 p2o_2_2=1 p1ol_2_2=1 pb3_1_2=5 p4il_1_2=1 pbl_1_2=1 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4ol_2_2=1 p4ol_1_2=1 p4il_2_1=1 pbl_2_1=6 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb3_2_2=1 p2il_2_2=1 pb4_2_2=5 p4i_2_2=1 p1il_2_2=1 p2ol_2_2=1 p1ol_2_2=1 p4il_1_2=1 pbl_1_2=6 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4o_2_2=1 p4ol_1_2=1 pb2_2_1=6 p4il_2_1=1 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
[ p3o_2_2=1 p3i_2_2=1 pb3_2_2=1 pb2_2_2=5 p2i_2_2=1 p4i_2_2=1 p1il_2_2=1 p2o_2_2=1 p1ol_2_2=1 p4il_1_2=1 pbl_1_2=6 p2il_1_2=1 p2ol_1_2=1 p1il_1_2=1 p1ol_1_2=1 p4ol_2_2=1 p4ol_1_2=1 pb2_2_1=5 p4il_2_1=1 pbl_2_1=1 p4ol_2_1=1 p1ol_2_1=1 pbl_1_1=6 p1il_2_1=1 p3il_2_1=1 p4il_1_1=1 p4ol_1_1=1 p3ol_2_1=1 p1il_0=1 p1ol_1_1=1 ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527169048779

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 1:37:25 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 1:37:25 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 1:37:25 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 62 ms
May 24, 2018 1:37:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 68 places.
May 24, 2018 1:37:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 72 transitions.
May 24, 2018 1:37:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 12 ms
May 24, 2018 1:37:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 75 ms
May 24, 2018 1:37:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 4 ms
May 24, 2018 1:37:25 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 72 transitions.
May 24, 2018 1:37:26 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 3 ms
May 24, 2018 1:37:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 72 transitions.
May 24, 2018 1:37:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 22 ms
May 24, 2018 1:37:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 68 variables to be positive in 320 ms
May 24, 2018 1:37:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 72 transitions.
May 24, 2018 1:37:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/72 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 1:37:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 1:37:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 72 transitions.
May 24, 2018 1:37:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 1:37:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 72 transitions.
SMT solver raised 'unknown', retrying with same input.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:490)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 1:37:27 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1591ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SquareGrid-PT-020102"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SquareGrid-PT-020102.tgz
mv SquareGrid-PT-020102 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SquareGrid-PT-020102, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r164-smll-152705515600181"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;