fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r164-smll-152705515600174
Last Updated
June 26, 2018

About the Execution of ITS-Tools for Solitaire-PT-SqrNC5x5

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15746.860 87603.00 176426.00 417.50 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 244K
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.0K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 66K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Solitaire-PT-SqrNC5x5, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r164-smll-152705515600174
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Solitaire-PT-SqrNC5x5-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527165152795

Flatten gal took : 91 ms
Applied a total of 0 rules in 6 ms. Remains 50 /50 variables (removed 0) and now considering 84/84 (removed 0) transitions.
// Phase 1: matrix 84 rows 50 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 84 rows 50 cols
invariant :T65 + F65 = 1
invariant :T62 + F62 = 1
invariant :T33 + F33 = 1
invariant :F25 + T25 = 1
invariant :T45 + F45 = 1
invariant :T63 + F63 = 1
invariant :F32 + T32 = 1
invariant :F44 + T44 = 1
invariant :F52 + T52 = 1
invariant :F55 + T55 = 1
invariant :T42 + F42 = 1
invariant :F24 + T24 = 1
invariant :F34 + T34 = 1
invariant :T22 + F22 = 1
invariant :F23 + T23 = 1
invariant :F64 + T64 = 1
invariant :T56 + F56 = 1
invariant :F66 + T66 = 1
invariant :T53 + F53 = 1
invariant :T36 + F36 = 1
invariant :F43 + T43 = 1
invariant :F26 + T26 = 1
invariant :F35 + T35 = 1
invariant :T54 + F54 = 1
invariant :F46 + T46 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2724 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 44 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1.60984e+07,73.7701,1246592,2,64870,5,3.12134e+06,6,0,287,1.06876e+07,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,504,82.6387,1246592,2,266,7,3.12134e+06,9,1,1821,1.06876e+07,2

System contains 504 deadlocks (shown below if less than --print-limit option) !
FORMULA Solitaire-PT-SqrNC5x5-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
[ 504 states ] showing 10 first states
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 F35=1 F34=1 F33=1 F32=1 F26=1 F25=1 F24=1 F23=1 F22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 F35=1 F34=1 F33=1 F32=1 T26=1 F25=1 F24=1 F23=1 T22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 F35=1 F34=1 T33=1 F32=1 F26=1 F25=1 F24=1 F23=1 T22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 F35=1 F34=1 T33=1 F32=1 T26=1 F25=1 F24=1 F23=1 F22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 F35=1 T34=1 F33=1 F32=1 F26=1 F25=1 F24=1 F23=1 F22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 F35=1 T34=1 F33=1 F32=1 T26=1 F25=1 F24=1 F23=1 T22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 T35=1 F34=1 F33=1 F32=1 F26=1 F25=1 F24=1 F23=1 T22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 T35=1 F34=1 F33=1 F32=1 T26=1 F25=1 F24=1 F23=1 F22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 T35=1 F34=1 T33=1 F32=1 F26=1 F25=1 F24=1 F23=1 F22=1 ]
[ F66=1 F65=1 F64=1 F63=1 F62=1 F56=1 F55=1 F54=1 F53=1 F52=1 F46=1 F45=1 F44=1 F43=1 F42=1 F36=1 T35=1 F34=1 T33=1 F32=1 T26=1 F25=1 F24=1 F23=1 T22=1 ]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527165240398

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 12:32:35 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 12:32:35 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 12:32:35 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 71 ms
May 24, 2018 12:32:35 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 50 places.
May 24, 2018 12:32:35 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 84 transitions.
May 24, 2018 12:32:35 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 12 ms
May 24, 2018 12:32:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 87 ms
May 24, 2018 12:32:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 5 ms
May 24, 2018 12:32:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 84 transitions.
May 24, 2018 12:32:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 3 ms
May 24, 2018 12:32:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 84 transitions.
May 24, 2018 12:32:36 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 25 place invariants in 12 ms
May 24, 2018 12:32:36 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 50 variables to be positive in 227 ms
May 24, 2018 12:32:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 84 transitions.
May 24, 2018 12:32:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/84 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:32:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 9 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:32:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 84 transitions.
May 24, 2018 12:32:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 10 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:32:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 84 transitions.
May 24, 2018 12:32:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 2763 ms. Total solver calls (SAT/UNSAT): 822(400/422)
May 24, 2018 12:32:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 84 transitions.
May 24, 2018 12:32:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:32:39 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3206ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Solitaire-PT-SqrNC5x5"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Solitaire-PT-SqrNC5x5.tgz
mv Solitaire-PT-SqrNC5x5 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Solitaire-PT-SqrNC5x5, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r164-smll-152705515600174"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;