fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r155-smll-152685553000180
Last Updated
June 26, 2018

About the Execution of M4M.struct for SafeBus-COL-03

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
744.900 55806.00 31600.00 835.20 FFTFTFFFFFTFFFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 220K
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.9K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool mcc4mcc-structural
Input is SafeBus-COL-03, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r155-smll-152685553000180
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-00
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-01
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-02
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-03
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-04
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-05
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-06
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-07
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-08
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-09
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-10
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-11
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-12
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-13
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-14
FORMULA_NAME SafeBus-COL-03-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1526995922503


BK_STOP 1526995978309

--------------------
content from stderr:

Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using SafeBus-COL-03 as instance name.
Using SafeBus as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'ReachabilityCardinality', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': True, 'Source Place': False, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': False, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': False, 'Safe': None, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 498, 'Memory': 111.08, 'Tool': 'lola'}, {'Time': 551, 'Memory': 110.94, 'Tool': 'lola'}, {'Time': 715, 'Memory': 100.93, 'Tool': 'gspn'}, {'Time': 2609, 'Memory': 168.18, 'Tool': 'gspn'}, {'Time': 4063, 'Memory': 2229.21, 'Tool': 'marcie'}, {'Time': 4494, 'Memory': 2229.56, 'Tool': 'marcie'}, {'Time': 4607, 'Memory': 353.47, 'Tool': 'itstools'}, {'Time': 4807, 'Memory': 348.57, 'Tool': 'itstools'}].
Learned tools are: [{'Tool': 'itstools'}].
Learned tool itstools is 9.251004016064257x far from the best tool lola.
ReachabilityCardinality itstools SafeBus-COL-03...
May 22, 2018 1:32:12 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-z3path, /usr/bin/z3, -yices2path, /usr/bin/yices, -ltsminpath, /usr/bin, -smt, -its, -pnfolder, /mcc-data, -examination, ReachabilityCardinality]
May 22, 2018 1:32:13 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /mcc-data/model.pnml
May 22, 2018 1:32:13 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
13:32:53.827 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
13:32:53.832 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
May 22, 2018 1:32:54 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 41365 ms
May 22, 2018 1:32:54 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 20 places.
May 22, 2018 1:32:54 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 22, 2018 1:32:54 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Dom->AMC,wait_ack,
Dot->cable_free,ACK,T_out,R_tout,S_tout,FMCb,
It->Cpt2,Cpt1,msgl,cable_used,FMC,wait_cable,listen,RMC,PMC,MSG,wait_msg,loop_em,

May 22, 2018 1:32:54 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 22, 2018 1:32:54 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 22, 2018 1:32:54 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/model.pnml.img.gal : 14 ms
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_refuse
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition C_free
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_provide
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec1
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_emit
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_refused
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec2
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 60 variables) in GAL type Document
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 3 constant array cells/variables (out of 60 variables) in type Document
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-2],
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 3.0 instantiations of transitions. Total transitions/syncs built is 112
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 60 variables) in GAL type Document
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 3 constant array cells/variables (out of 60 variables) in type Document
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-2],
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :msgl[]
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 18 expressions due to constant valuations.
May 22, 2018 1:32:54 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 180 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/mcc-data
May 22, 2018 1:32:55 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 95 ms
May 22, 2018 1:32:55 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/ReachabilityCardinality.pnml.gal : 40 ms
May 22, 2018 1:32:55 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 67 ms
May 22, 2018 1:32:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 22 transitions. Expanding to a total of 145 deterministic transitions.
May 22, 2018 1:32:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 14 ms.
May 22, 2018 1:32:55 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /mcc-data/ReachabilityCardinality.prop : 2 ms
Invoking ITS tools like this :CommandLine [args=[/usr/share/itscl/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201804131302/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /mcc-data/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/mcc-data]

its-reach command run as :

/usr/share/itscl/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201804131302/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /mcc-data/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-00 with value :(S_tout_0>=2)
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-01 with value :(((FMC_0+FMC_1)+FMC_2)>=3)
Read [invariant] property : SafeBus-COL-03-ReachabilityCardinality-02 with value :(true)
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-03 with value :(R_tout_0>=3)
Read [invariant] property : SafeBus-COL-03-ReachabilityCardinality-04 with value :(!(cable_free_0>=2))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-05 with value :((((((wait_cable_0+wait_cable_1)+wait_cable_2)<=((MSG_0+MSG_1)+MSG_2))&&(S_tout_0>=2))&&(((RMC_0+RMC_1)+RMC_2)>=2))&&(!((((cable_used_0+cable_used_1)+cable_used_2)<=((loop_em_0+loop_em_1)+loop_em_2))||(((wait_cable_0+wait_cable_1)+wait_cable_2)<=((cable_used_0+cable_used_1)+cable_used_2)))))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-06 with value :((((loop_em_0+loop_em_1)+loop_em_2)>=2)&&((FMCb_0<=((wait_cable_0+wait_cable_1)+wait_cable_2))&&(ACK_0>=2)))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-07 with value :((((((((((((AMC_0+AMC_1)+AMC_2)+AMC_3)+AMC_4)+AMC_5)+AMC_6)+AMC_7)+AMC_8)>=3)||(((Cpt2_0+Cpt2_1)+Cpt2_2)<=((((((((AMC_0+AMC_1)+AMC_2)+AMC_3)+AMC_4)+AMC_5)+AMC_6)+AMC_7)+AMC_8)))&&((((loop_em_0+loop_em_1)+loop_em_2)>=2)&&(((FMC_0+FMC_1)+FMC_2)>=3)))&&(cable_free_0<=((cable_used_0+cable_used_1)+cable_used_2)))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-08 with value :(!(((R_tout_0>=1)||(R_tout_0<=T_out_0))||(!(T_out_0>=1))))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-09 with value :(((cable_used_0+cable_used_1)+cable_used_2)>=2)
Read [invariant] property : SafeBus-COL-03-ReachabilityCardinality-10 with value :((!(((MSG_0+MSG_1)+MSG_2)>=1))||(T_out_0<=((PMC_0+PMC_1)+PMC_2)))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-11 with value :((((PMC_0+PMC_1)+PMC_2)>=2)&&((!(((((((((AMC_0+AMC_1)+AMC_2)+AMC_3)+AMC_4)+AMC_5)+AMC_6)+AMC_7)+AMC_8)<=3))||(R_tout_0<=((listen_0+listen_1)+listen_2))))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-12 with value :(((!(((Cpt2_0+Cpt2_1)+Cpt2_2)<=((MSG_0+MSG_1)+MSG_2)))&&((((Cpt1_0+Cpt1_1)+Cpt1_2)<=FMCb_0)&&(((PMC_0+PMC_1)+PMC_2)>=3)))||(((Cpt2_0+Cpt2_1)+Cpt2_2)>=3))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-13 with value :((!((((wait_cable_0+wait_cable_1)+wait_cable_2)<=3)||(((Cpt1_0+Cpt1_1)+Cpt1_2)>=2)))&&(!((ACK_0>=1)&&(((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)>=3))))
Read [reachable] property : SafeBus-COL-03-ReachabilityCardinality-14 with value :(!((ACK_0<=((FMC_0+FMC_1)+FMC_2))||(!(((loop_em_0+loop_em_1)+loop_em_2)>=2))))
Read [invariant] property : SafeBus-COL-03-ReachabilityCardinality-15 with value :(((Cpt2_0+Cpt2_1)+Cpt2_2)>=1)
May 22, 2018 1:32:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 22 transitions. Expanding to a total of 145 deterministic transitions.
May 22, 2018 1:32:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 7 ms.
FORMULA SafeBus-COL-03-ReachabilityCardinality-02 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable SafeBus-COL-03-ReachabilityCardinality-08
FORMULA SafeBus-COL-03-ReachabilityCardinality-08 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 71
// Phase 1: matrix 71 rows 57 cols
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 2 / 16 in 629 ms.
invariant :Cpt1_0 + Cpt1_1 + Cpt1_2 = 1
invariant :cable_free_0 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_7 + wait_ack_8 + PMC_0 + PMC_1 + PMC_2 + -1'FMCb_0 = 0
invariant :wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_cable_0 + listen_0 + wait_msg_0 + loop_em_0 = 1
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-00(UNSAT) depth K=0 took 9 ms
invariant :Cpt2_1 + -1'Cpt1_1 + -2'AMC_1 + -1'AMC_2 + -2'AMC_4 + -1'AMC_5 + -2'AMC_7 + -1'AMC_8 + -1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'listen_0 + -1'listen_1 + -1'listen_2 + -1'RMC_0 + -1'RMC_1 + -1'RMC_2 + -1'PMC_0 + -1'PMC_1 + -1'PMC_2 + -1'wait_msg_0 + -1'wait_msg_1 + -1'wait_msg_2 + -1'loop_em_0 + -1'loop_em_1 + -1'loop_em_2 = -3
invariant :Cpt2_0 + Cpt1_1 + Cpt1_2 + AMC_1 + 2'AMC_2 + AMC_4 + 2'AMC_5 + AMC_7 + 2'AMC_8 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_7 + wait_ack_8 + listen_0 + listen_1 + listen_2 + RMC_0 + RMC_1 + RMC_2 + PMC_0 + PMC_1 + PMC_2 + wait_msg_0 + wait_msg_1 + wait_msg_2 + loop_em_0 + loop_em_1 + loop_em_2 = 4
invariant :AMC_0 + AMC_1 + AMC_2 + wait_ack_0 + wait_ack_1 + wait_ack_2 + listen_0 + RMC_0 + PMC_0 + wait_msg_0 + loop_em_0 = 1
invariant :cable_used_1 + -1'FMC_1 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'PMC_1 = 0
invariant :FMC_0 + FMC_1 + FMC_2 + FMCb_0 = 1
invariant :wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_cable_1 + listen_1 + wait_msg_1 + loop_em_1 = 1
invariant :wait_ack_6 + wait_ack_7 + wait_ack_8 + wait_cable_2 + listen_2 + wait_msg_2 + loop_em_2 = 1
invariant :Cpt2_2 + -1'Cpt1_2 + AMC_1 + -1'AMC_2 + AMC_4 + -1'AMC_5 + AMC_7 + -1'AMC_8 = 0
invariant :AMC_3 + AMC_4 + AMC_5 + wait_ack_3 + wait_ack_4 + wait_ack_5 + listen_1 + RMC_1 + PMC_1 + wait_msg_1 + loop_em_1 = 1
invariant :R_tout_0 + S_tout_0 = 1
invariant :-1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + ACK_0 + MSG_0 + MSG_1 + MSG_2 + T_out_0 = 0
invariant :AMC_6 + AMC_7 + AMC_8 + wait_ack_6 + wait_ack_7 + wait_ack_8 + listen_2 + RMC_2 + PMC_2 + wait_msg_2 + loop_em_2 = 1
invariant :cable_used_0 + FMC_1 + FMC_2 + -1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'PMC_0 + FMCb_0 = 1
invariant :cable_used_2 + -1'FMC_2 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'PMC_2 = 0
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 17 place invariants in 65 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-01(UNSAT) depth K=0 took 15 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-03(UNSAT) depth K=0 took 6 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-04(UNSAT) depth K=0 took 8 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-05(UNSAT) depth K=0 took 9 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-06(UNSAT) depth K=0 took 10 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 22 transitions. Expanding to a total of 145 deterministic transitions.
May 22, 2018 1:32:56 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 1 ms.
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-07(UNSAT) depth K=0 took 9 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-09(UNSAT) depth K=0 took 1 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-10(UNSAT) depth K=0 took 1 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-11(UNSAT) depth K=0 took 3 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-12(UNSAT) depth K=0 took 2 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-13(UNSAT) depth K=0 took 3 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-14(UNSAT) depth K=0 took 2 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-15(UNSAT) depth K=0 took 7 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-00(UNSAT) depth K=1 took 9 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-01(UNSAT) depth K=1 took 4 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-03(UNSAT) depth K=1 took 6 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-04(UNSAT) depth K=1 took 19 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-05(UNSAT) depth K=1 took 19 ms
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 71
// Phase 1: matrix 71 rows 57 cols
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-06(UNSAT) depth K=1 took 14 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-07(UNSAT) depth K=1 took 8 ms
invariant :Cpt1_0 + Cpt1_1 + Cpt1_2 = 1
invariant :cable_free_0 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_7 + wait_ack_8 + PMC_0 + PMC_1 + PMC_2 + -1'FMCb_0 = 0
invariant :wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_cable_0 + listen_0 + wait_msg_0 + loop_em_0 = 1
invariant :Cpt2_1 + -1'Cpt1_1 + -2'AMC_1 + -1'AMC_2 + -2'AMC_4 + -1'AMC_5 + -2'AMC_7 + -1'AMC_8 + -1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'listen_0 + -1'listen_1 + -1'listen_2 + -1'RMC_0 + -1'RMC_1 + -1'RMC_2 + -1'PMC_0 + -1'PMC_1 + -1'PMC_2 + -1'wait_msg_0 + -1'wait_msg_1 + -1'wait_msg_2 + -1'loop_em_0 + -1'loop_em_1 + -1'loop_em_2 = -3
invariant :Cpt2_0 + Cpt1_1 + Cpt1_2 + AMC_1 + 2'AMC_2 + AMC_4 + 2'AMC_5 + AMC_7 + 2'AMC_8 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_7 + wait_ack_8 + listen_0 + listen_1 + listen_2 + RMC_0 + RMC_1 + RMC_2 + PMC_0 + PMC_1 + PMC_2 + wait_msg_0 + wait_msg_1 + wait_msg_2 + loop_em_0 + loop_em_1 + loop_em_2 = 4
invariant :AMC_0 + AMC_1 + AMC_2 + wait_ack_0 + wait_ack_1 + wait_ack_2 + listen_0 + RMC_0 + PMC_0 + wait_msg_0 + loop_em_0 = 1
invariant :cable_used_1 + -1'FMC_1 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'PMC_1 = 0
invariant :FMC_0 + FMC_1 + FMC_2 + FMCb_0 = 1
invariant :wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_cable_1 + listen_1 + wait_msg_1 + loop_em_1 = 1
invariant :wait_ack_6 + wait_ack_7 + wait_ack_8 + wait_cable_2 + listen_2 + wait_msg_2 + loop_em_2 = 1
invariant :Cpt2_2 + -1'Cpt1_2 + AMC_1 + -1'AMC_2 + AMC_4 + -1'AMC_5 + AMC_7 + -1'AMC_8 = 0
invariant :AMC_3 + AMC_4 + AMC_5 + wait_ack_3 + wait_ack_4 + wait_ack_5 + listen_1 + RMC_1 + PMC_1 + wait_msg_1 + loop_em_1 = 1
invariant :R_tout_0 + S_tout_0 = 1
invariant :-1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + ACK_0 + MSG_0 + MSG_1 + MSG_2 + T_out_0 = 0
invariant :AMC_6 + AMC_7 + AMC_8 + wait_ack_6 + wait_ack_7 + wait_ack_8 + listen_2 + RMC_2 + PMC_2 + wait_msg_2 + loop_em_2 = 1
invariant :cable_used_0 + FMC_1 + FMC_2 + -1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'PMC_0 + FMCb_0 = 1
invariant :cable_used_2 + -1'FMC_2 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'PMC_2 = 0
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 17 place invariants in 26 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-09(UNSAT) depth K=1 took 10 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-10(UNSAT) depth K=1 took 12 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-11(UNSAT) depth K=1 took 4 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-12(UNSAT) depth K=1 took 4 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-13(UNSAT) depth K=1 took 7 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-14(UNSAT) depth K=1 took 20 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-15(UNSAT) depth K=1 took 12 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-00(UNSAT) depth K=2 took 54 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-01(UNSAT) depth K=2 took 25 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 57 variables to be positive in 185 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-03(UNSAT) depth K=2 took 26 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-04(UNSAT) depth K=2 took 42 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-03-ReachabilityCardinality-00
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-03-ReachabilityCardinality-00
FORMULA SafeBus-COL-03-ReachabilityCardinality-00 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-03-ReachabilityCardinality-00(FALSE) depth K=0 took 81 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 57 variables to be positive in 546 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 97 transitions.
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/97 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 97 transitions.
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 18 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-05(UNSAT) depth K=2 took 86 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-03-ReachabilityCardinality-01
FORMULA SafeBus-COL-03-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-03-ReachabilityCardinality-01
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-03-ReachabilityCardinality-01(FALSE) depth K=0 took 72 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-06(UNSAT) depth K=2 took 46 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-03-ReachabilityCardinality-03
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-03-ReachabilityCardinality-03
FORMULA SafeBus-COL-03-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-03-ReachabilityCardinality-03(FALSE) depth K=0 took 40 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-07(UNSAT) depth K=2 took 34 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SafeBus-COL-03-ReachabilityCardinality-04
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-03-ReachabilityCardinality-04
FORMULA SafeBus-COL-03-ReachabilityCardinality-04 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-03-ReachabilityCardinality-04(TRUE) depth K=0 took 38 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-09(UNSAT) depth K=2 took 61 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-10(UNSAT) depth K=2 took 28 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-11(UNSAT) depth K=2 took 8 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-03-ReachabilityCardinality-05
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-03-ReachabilityCardinality-05
FORMULA SafeBus-COL-03-ReachabilityCardinality-05 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-03-ReachabilityCardinality-05(FALSE) depth K=0 took 105 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-12(UNSAT) depth K=2 took 47 ms
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-03-ReachabilityCardinality-06
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-13(UNSAT) depth K=2 took 19 ms
FORMULA SafeBus-COL-03-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
May 22, 2018 1:32:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-03-ReachabilityCardinality-06
May 22, 2018 1:32:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-03-ReachabilityCardinality-06(FALSE) depth K=0 took 51 ms
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Document\_flat\_flat,4650,0.799033,21032,2,1525,5,100827,6,0,347,62629,0
Total reachable state count : 4650

Verifying 16 reachability properties.
May 22, 2018 1:32:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-14(UNSAT) depth K=2 took 47 ms
Reachability property SafeBus-COL-03-ReachabilityCardinality-00 does not hold.
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-00,0,0.80073,21164,1,0,5,100827,7,0,349,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-01 does not hold.
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-01,0,0.802432,21364,1,0,5,100827,8,0,354,62629,0
Invariant property SafeBus-COL-03-ReachabilityCardinality-02 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-02,0,0.80263,21408,1,0,5,100827,8,0,354,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-03 does not hold.
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-03,0,0.804076,21472,1,0,5,100827,9,0,355,62629,0
Invariant property SafeBus-COL-03-ReachabilityCardinality-04 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-04,0,0.805195,21472,1,0,5,100827,10,0,356,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-05 does not hold.
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-05,0,0.807942,21472,1,0,5,100827,11,0,387,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-06 does not hold.
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-06,0,0.809136,21472,1,0,5,100827,12,0,391,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-07 does not hold.
FORMULA SafeBus-COL-03-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-07,0,0.81032,21472,1,0,5,100827,13,0,398,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-08 does not hold.
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-08,0,0.811527,21472,1,0,5,100827,14,0,404,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-09 does not hold.
FORMULA SafeBus-COL-03-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-09,0,0.812948,21472,1,0,5,100827,15,0,409,62629,0
Invariant property SafeBus-COL-03-ReachabilityCardinality-10 is true.
FORMULA SafeBus-COL-03-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

May 22, 2018 1:32:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-03-ReachabilityCardinality-15(UNSAT) depth K=2 took 24 ms
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-10,0,0.81586,21472,1,0,5,100827,16,0,425,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-11 does not hold.
FORMULA SafeBus-COL-03-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-11,0,0.822084,21472,1,0,5,100827,17,0,464,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-12 does not hold.
FORMULA SafeBus-COL-03-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-12,0,0.825296,21472,1,0,5,100827,18,0,486,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-13 does not hold.
FORMULA SafeBus-COL-03-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : SafeBus-COL-03-ReachabilityCardinality-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-13,0,0.828051,21472,1,0,5,100827,19,0,511,62629,0
Reachability property SafeBus-COL-03-ReachabilityCardinality-14 is true.
FORMULA SafeBus-COL-03-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-14,36,0.830762,21472,2,130,6,100827,20,0,528,62629,0
Invariant property SafeBus-COL-03-ReachabilityCardinality-15 is true.
FORMULA SafeBus-COL-03-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-03-ReachabilityCardinality-15,0,0.832046,21472,1,0,6,100827,21,0,533,62629,0
May 22, 2018 1:32:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-03"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="mcc4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-03.tgz
mv SafeBus-COL-03 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool mcc4mcc-structural"
echo " Input is SafeBus-COL-03, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r155-smll-152685553000180"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;