fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r152-smll-152685550400236
Last Updated
June 26, 2018

About the Execution of ITS-Tools for SafeBus-PT-06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.300 359028.00 1407190.00 568.00 TFTFFTTTFTFTTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 808K
-rw-r--r-- 1 mcc users 6.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 62K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 32K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 83K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 448K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SafeBus-PT-06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r152-smll-152685550400236
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-00
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-01
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-02
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-03
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-04
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-05
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-06
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-07
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-08
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-09
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-10
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-11
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-12
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-13
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-14
FORMULA_NAME SafeBus-PT-06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527059898430

FORMULA SafeBus-PT-06-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-00 with value :(!((((((wait_msg_1+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)+wait_msg_6)<=(((((Cpt1_1+Cpt1_2)+Cpt1_3)+Cpt1_4)+Cpt1_5)+Cpt1_6)))
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-01 with value :(((((((((Cpt1_1+Cpt1_2)+Cpt1_3)+Cpt1_4)+Cpt1_5)+Cpt1_6)<=(((((wait_msg_1+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)+wait_msg_6))&&((((((wait_msg_1+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)+wait_msg_6)>=1))||((((((RMC_1+RMC_2)+RMC_3)+RMC_4)+RMC_5)+RMC_6)>=1))&&(((FMCb<=(((((MSG_1+MSG_2)+MSG_3)+MSG_4)+MSG_5)+MSG_6))&&((((((listen_1+listen_2)+listen_3)+listen_4)+listen_5)+listen_6)<=(((((FMC_1+FMC_2)+FMC_3)+FMC_4)+FMC_5)+FMC_6)))&&((S_tout>=2)&&((((((loop_em_1+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)<=cable_free))))
Read [invariant] property : SafeBus-PT-06-ReachabilityCardinality-02 with value :(T_out<=(((((((((((((((((((((((((((((wait_ack_2_1+wait_ack_3_1)+wait_ack_4_1)+wait_ack_5_1)+wait_ack_6_1)+wait_ack_1_2)+wait_ack_3_2)+wait_ack_4_2)+wait_ack_5_2)+wait_ack_6_2)+wait_ack_1_3)+wait_ack_2_3)+wait_ack_4_3)+wait_ack_5_3)+wait_ack_6_3)+wait_ack_1_4)+wait_ack_2_4)+wait_ack_3_4)+wait_ack_5_4)+wait_ack_6_4)+wait_ack_1_5)+wait_ack_2_5)+wait_ack_3_5)+wait_ack_4_5)+wait_ack_6_5)+wait_ack_1_6)+wait_ack_2_6)+wait_ack_3_6)+wait_ack_4_6)+wait_ack_5_6))
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-03 with value :((ACK<=(((((wait_msg_1+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)+wait_msg_6))&&((((((((Cpt2_1+Cpt2_2)+Cpt2_3)+Cpt2_4)+Cpt2_5)+Cpt2_6)>=6)||(FMCb>=1))&&((((((FMC_1+FMC_2)+FMC_3)+FMC_4)+FMC_5)+FMC_6)>=3)))
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-04 with value :((((((((((((((((((((((((((((((wait_ack_2_1+wait_ack_3_1)+wait_ack_4_1)+wait_ack_5_1)+wait_ack_6_1)+wait_ack_1_2)+wait_ack_3_2)+wait_ack_4_2)+wait_ack_5_2)+wait_ack_6_2)+wait_ack_1_3)+wait_ack_2_3)+wait_ack_4_3)+wait_ack_5_3)+wait_ack_6_3)+wait_ack_1_4)+wait_ack_2_4)+wait_ack_3_4)+wait_ack_5_4)+wait_ack_6_4)+wait_ack_1_5)+wait_ack_2_5)+wait_ack_3_5)+wait_ack_4_5)+wait_ack_6_5)+wait_ack_1_6)+wait_ack_2_6)+wait_ack_3_6)+wait_ack_4_6)+wait_ack_5_6)>=2)
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-05 with value :(((((((((((((((((((((((((((((((((wait_ack_2_1+wait_ack_3_1)+wait_ack_4_1)+wait_ack_5_1)+wait_ack_6_1)+wait_ack_1_2)+wait_ack_3_2)+wait_ack_4_2)+wait_ack_5_2)+wait_ack_6_2)+wait_ack_1_3)+wait_ack_2_3)+wait_ack_4_3)+wait_ack_5_3)+wait_ack_6_3)+wait_ack_1_4)+wait_ack_2_4)+wait_ack_3_4)+wait_ack_5_4)+wait_ack_6_4)+wait_ack_1_5)+wait_ack_2_5)+wait_ack_3_5)+wait_ack_4_5)+wait_ack_6_5)+wait_ack_1_6)+wait_ack_2_6)+wait_ack_3_6)+wait_ack_4_6)+wait_ack_5_6)<=(((((FMC_1+FMC_2)+FMC_3)+FMC_4)+FMC_5)+FMC_6))||(T_out<=(((((wait_msg_1+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)+wait_msg_6)))||(((((((wait_cable_1+wait_cable_2)+wait_cable_3)+wait_cable_4)+wait_cable_5)+wait_cable_6)>=3)&&((((((loop_em_1+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)<=(((((cable_used_1+cable_used_2)+cable_used_3)+cable_used_4)+cable_used_5)+cable_used_6))))&&((!((((((FMC_1+FMC_2)+FMC_3)+FMC_4)+FMC_5)+FMC_6)>=2))&&(((((((loop_em_1+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)>=2)&&((((((listen_1+listen_2)+listen_3)+listen_4)+listen_5)+listen_6)>=3))))
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-06 with value :(((((((loop_em_1+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)<=R_tout)&&((((((((RMC_1+RMC_2)+RMC_3)+RMC_4)+RMC_5)+RMC_6)>=3)||(FMCb>=3))||(((((((wait_msg_1+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)+wait_msg_6)<=T_out)&&((((((((((((((((((((((((((((((wait_ack_2_1+wait_ack_3_1)+wait_ack_4_1)+wait_ack_5_1)+wait_ack_6_1)+wait_ack_1_2)+wait_ack_3_2)+wait_ack_4_2)+wait_ack_5_2)+wait_ack_6_2)+wait_ack_1_3)+wait_ack_2_3)+wait_ack_4_3)+wait_ack_5_3)+wait_ack_6_3)+wait_ack_1_4)+wait_ack_2_4)+wait_ack_3_4)+wait_ack_5_4)+wait_ack_6_4)+wait_ack_1_5)+wait_ack_2_5)+wait_ack_3_5)+wait_ack_4_5)+wait_ack_6_5)+wait_ack_1_6)+wait_ack_2_6)+wait_ack_3_6)+wait_ack_4_6)+wait_ack_5_6)>=2))))
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-08 with value :(((AMC_2_5>=1)&&((AMC_5_1<=PMC_4)&&(AMC_2_6>=1)))&&(((AMC_5_3>=1)&&(wait_ack_2_5<=cable_used_1))||((wait_msg_5>=1)||(AMC_2_1>=2))))
Read [invariant] property : SafeBus-PT-06-ReachabilityCardinality-09 with value :(wait_cable_1<=1)
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-10 with value :((((wait_ack_1_6<=ACK)&&(MSG_4<=wait_cable_3))&&(AMC_6_2>=1))&&(wait_ack_6_4>=1))
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-11 with value :(((!(RMC_4<=cable_free))&&(Cpt2_6>=1))&&(AMC_1_2<=wait_ack_4_1))
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-12 with value :(!((!(AMC_6_1>=1))||((wait_cable_6>=1)&&(RMC_1<=AMC_6_2))))
Read [invariant] property : SafeBus-PT-06-ReachabilityCardinality-13 with value :((AMC_3_6<=AMC_3_5)||(AMC_3_2<=wait_cable_3))
Read [reachable] property : SafeBus-PT-06-ReachabilityCardinality-14 with value :(wait_cable_2>=3)
Read [invariant] property : SafeBus-PT-06-ReachabilityCardinality-15 with value :((loop_em_5<=wait_ack_6_5)||((!(loop_em_5>=1))||(!(wait_ack_6_3<=wait_msg_6))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 242
// Phase 1: matrix 242 rows 138 cols
invariant :Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 + Cpt1_6 = 1
invariant :Cpt2_2 + AMC_1_1 + AMC_2_1 + AMC_3_1 + AMC_4_1 + AMC_5_1 + AMC_6_1 + -1'AMC_1_2 + -1'AMC_2_2 + -1'AMC_3_2 + -1'AMC_4_2 + -1'AMC_5_2 + -1'AMC_6_2 + -1'Cpt1_2 = 0
invariant :Cpt2_4 + AMC_1_3 + AMC_2_3 + AMC_3_3 + AMC_4_3 + AMC_5_3 + AMC_6_3 + -1'AMC_1_4 + -1'AMC_2_4 + -1'AMC_3_4 + -1'AMC_4_4 + -1'AMC_5_4 + -1'AMC_6_4 + -1'Cpt1_4 = 0
invariant :AMC_3_1 + AMC_3_2 + AMC_3_3 + AMC_3_4 + AMC_3_5 + AMC_3_6 + RMC_3 + PMC_3 + -1'wait_cable_3 = 0
invariant :wait_ack_5_1 + wait_ack_5_2 + wait_ack_5_3 + wait_ack_5_4 + wait_ack_5_6 + AMC_5_1 + AMC_5_2 + AMC_5_3 + AMC_5_4 + AMC_5_5 + AMC_5_6 + RMC_5 + PMC_5 + listen_5 + wait_msg_5 + loop_em_5 = 1
invariant :-1'wait_ack_1_2 + -1'wait_ack_1_3 + -1'wait_ack_1_4 + -1'wait_ack_1_5 + -1'wait_ack_1_6 + cable_used_1 + -1'FMC_1 + -1'PMC_1 = 0
invariant :AMC_2_1 + AMC_2_2 + AMC_2_3 + AMC_2_4 + AMC_2_5 + AMC_2_6 + RMC_2 + PMC_2 + -1'wait_cable_2 = 0
invariant :wait_ack_2_1 + wait_ack_2_3 + wait_ack_2_4 + wait_ack_2_5 + wait_ack_2_6 + listen_2 + wait_cable_2 + wait_msg_2 + loop_em_2 = 1
invariant :-1'wait_ack_6_1 + -1'wait_ack_6_2 + -1'wait_ack_6_3 + -1'wait_ack_6_4 + -1'wait_ack_6_5 + cable_used_6 + -1'FMC_6 + -1'PMC_6 = 0
invariant :wait_ack_4_1 + wait_ack_4_2 + wait_ack_4_3 + wait_ack_4_5 + wait_ack_4_6 + AMC_4_1 + AMC_4_2 + AMC_4_3 + AMC_4_4 + AMC_4_5 + AMC_4_6 + RMC_4 + PMC_4 + listen_4 + wait_msg_4 + loop_em_4 = 1
invariant :wait_ack_5_1 + wait_ack_5_2 + wait_ack_5_3 + wait_ack_5_4 + wait_ack_5_6 + listen_5 + wait_cable_5 + wait_msg_5 + loop_em_5 = 1
invariant :wait_ack_2_1 + wait_ack_3_1 + wait_ack_4_1 + wait_ack_5_1 + wait_ack_6_1 + wait_ack_1_2 + wait_ack_3_2 + wait_ack_4_2 + wait_ack_5_2 + wait_ack_6_2 + wait_ack_1_3 + wait_ack_2_3 + wait_ack_4_3 + wait_ack_5_3 + wait_ack_6_3 + wait_ack_1_4 + wait_ack_2_4 + wait_ack_3_4 + wait_ack_5_4 + wait_ack_6_4 + wait_ack_1_5 + wait_ack_2_5 + wait_ack_3_5 + wait_ack_4_5 + wait_ack_6_5 + wait_ack_1_6 + wait_ack_2_6 + wait_ack_3_6 + wait_ack_4_6 + wait_ack_5_6 + -1'AMC_3_1 + -1'AMC_3_2 + -1'AMC_3_3 + -1'AMC_3_4 + -1'AMC_3_5 + -1'AMC_3_6 + -1'RMC_3 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMC_6 + cable_free + PMC_1 + PMC_2 + PMC_4 + PMC_5 + PMC_6 + wait_cable_3 = 1
invariant :-1'wait_ack_2_1 + -1'wait_ack_2_3 + -1'wait_ack_2_4 + -1'wait_ack_2_5 + -1'wait_ack_2_6 + cable_used_2 + -1'FMC_2 + -1'PMC_2 = 0
invariant :wait_ack_3_1 + wait_ack_3_2 + wait_ack_3_4 + wait_ack_3_5 + wait_ack_3_6 + listen_3 + wait_cable_3 + wait_msg_3 + loop_em_3 = 1
invariant :-1'wait_ack_4_1 + -1'wait_ack_4_2 + -1'wait_ack_4_3 + -1'wait_ack_4_5 + -1'wait_ack_4_6 + cable_used_4 + -1'FMC_4 + -1'PMC_4 = 0
invariant :FMCb + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMC_6 = 1
invariant :wait_ack_1_2 + wait_ack_1_3 + wait_ack_1_4 + wait_ack_1_5 + wait_ack_1_6 + listen_1 + wait_cable_1 + wait_msg_1 + loop_em_1 = 1
invariant :Cpt2_6 + AMC_1_5 + AMC_2_5 + AMC_3_5 + AMC_4_5 + AMC_5_5 + AMC_6_5 + -1'AMC_1_6 + -1'AMC_2_6 + -1'AMC_3_6 + -1'AMC_4_6 + -1'AMC_5_6 + -1'AMC_6_6 + -1'Cpt1_6 = 0
invariant :AMC_6_1 + AMC_6_2 + AMC_6_3 + AMC_6_4 + AMC_6_5 + AMC_6_6 + RMC_6 + PMC_6 + -1'wait_cable_6 = 0
invariant :wait_ack_6_1 + wait_ack_6_2 + wait_ack_6_3 + wait_ack_6_4 + wait_ack_6_5 + listen_6 + wait_cable_6 + wait_msg_6 + loop_em_6 = 1
invariant :AMC_1_1 + AMC_1_2 + AMC_1_3 + AMC_1_4 + AMC_1_5 + AMC_1_6 + RMC_1 + PMC_1 + -1'wait_cable_1 = 0
invariant :Cpt2_5 + AMC_1_4 + AMC_2_4 + AMC_3_4 + AMC_4_4 + AMC_5_4 + AMC_6_4 + -1'AMC_1_5 + -1'AMC_2_5 + -1'AMC_3_5 + -1'AMC_4_5 + -1'AMC_5_5 + -1'AMC_6_5 + -1'Cpt1_5 = 0
invariant :-1'wait_ack_3_1 + -1'wait_ack_3_2 + -1'wait_ack_3_4 + -1'wait_ack_3_5 + -1'wait_ack_3_6 + AMC_3_1 + AMC_3_2 + AMC_3_3 + AMC_3_4 + AMC_3_5 + AMC_3_6 + cable_used_3 + RMC_3 + -1'FMC_3 + -1'wait_cable_3 = 0
invariant :ACK + T_out + -1'wait_ack_2_1 + -1'wait_ack_3_1 + -1'wait_ack_4_1 + -1'wait_ack_5_1 + -1'wait_ack_6_1 + -1'wait_ack_1_2 + -1'wait_ack_3_2 + -1'wait_ack_4_2 + -1'wait_ack_5_2 + -1'wait_ack_6_2 + -1'wait_ack_1_3 + -1'wait_ack_2_3 + -1'wait_ack_4_3 + -1'wait_ack_5_3 + -1'wait_ack_6_3 + -1'wait_ack_1_4 + -1'wait_ack_2_4 + -1'wait_ack_3_4 + -1'wait_ack_5_4 + -1'wait_ack_6_4 + -1'wait_ack_1_5 + -1'wait_ack_2_5 + -1'wait_ack_3_5 + -1'wait_ack_4_5 + -1'wait_ack_6_5 + -1'wait_ack_1_6 + -1'wait_ack_2_6 + -1'wait_ack_3_6 + -1'wait_ack_4_6 + -1'wait_ack_5_6 + MSG_1 + MSG_2 + MSG_3 + MSG_4 + MSG_5 + MSG_6 = 0
invariant :Cpt2_1 + -1'AMC_1_1 + -1'AMC_2_1 + -1'AMC_3_1 + -1'AMC_4_1 + -1'AMC_5_1 + -1'AMC_6_1 + AMC_1_6 + AMC_2_6 + AMC_3_6 + AMC_4_6 + AMC_5_6 + AMC_6_6 + -1'Cpt1_1 = 0
invariant :wait_ack_4_1 + wait_ack_4_2 + wait_ack_4_3 + wait_ack_4_5 + wait_ack_4_6 + listen_4 + wait_cable_4 + wait_msg_4 + loop_em_4 = 1
invariant :Cpt2_3 + AMC_1_2 + AMC_2_2 + AMC_3_2 + AMC_4_2 + AMC_5_2 + AMC_6_2 + -1'AMC_1_3 + -1'AMC_2_3 + -1'AMC_3_3 + -1'AMC_4_3 + -1'AMC_5_3 + -1'AMC_6_3 + Cpt1_1 + Cpt1_2 + Cpt1_4 + Cpt1_5 + Cpt1_6 = 1
invariant :R_tout + S_tout = 1
invariant :-1'wait_ack_5_1 + -1'wait_ack_5_2 + -1'wait_ack_5_3 + -1'wait_ack_5_4 + -1'wait_ack_5_6 + cable_used_5 + -1'FMC_5 + -1'PMC_5 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 242
// Phase 1: matrix 242 rows 138 cols
invariant :Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 + Cpt1_6 = 1
invariant :Cpt2_2 + AMC_1_1 + AMC_2_1 + AMC_3_1 + AMC_4_1 + AMC_5_1 + AMC_6_1 + -1'AMC_1_2 + -1'AMC_2_2 + -1'AMC_3_2 + -1'AMC_4_2 + -1'AMC_5_2 + -1'AMC_6_2 + -1'Cpt1_2 = 0
invariant :Cpt2_4 + AMC_1_3 + AMC_2_3 + AMC_3_3 + AMC_4_3 + AMC_5_3 + AMC_6_3 + -1'AMC_1_4 + -1'AMC_2_4 + -1'AMC_3_4 + -1'AMC_4_4 + -1'AMC_5_4 + -1'AMC_6_4 + -1'Cpt1_4 = 0
invariant :AMC_3_1 + AMC_3_2 + AMC_3_3 + AMC_3_4 + AMC_3_5 + AMC_3_6 + RMC_3 + PMC_3 + -1'wait_cable_3 = 0
invariant :wait_ack_5_1 + wait_ack_5_2 + wait_ack_5_3 + wait_ack_5_4 + wait_ack_5_6 + AMC_5_1 + AMC_5_2 + AMC_5_3 + AMC_5_4 + AMC_5_5 + AMC_5_6 + RMC_5 + PMC_5 + listen_5 + wait_msg_5 + loop_em_5 = 1
invariant :-1'wait_ack_1_2 + -1'wait_ack_1_3 + -1'wait_ack_1_4 + -1'wait_ack_1_5 + -1'wait_ack_1_6 + cable_used_1 + -1'FMC_1 + -1'PMC_1 = 0
invariant :AMC_2_1 + AMC_2_2 + AMC_2_3 + AMC_2_4 + AMC_2_5 + AMC_2_6 + RMC_2 + PMC_2 + -1'wait_cable_2 = 0
invariant :wait_ack_2_1 + wait_ack_2_3 + wait_ack_2_4 + wait_ack_2_5 + wait_ack_2_6 + listen_2 + wait_cable_2 + wait_msg_2 + loop_em_2 = 1
invariant :-1'wait_ack_6_1 + -1'wait_ack_6_2 + -1'wait_ack_6_3 + -1'wait_ack_6_4 + -1'wait_ack_6_5 + cable_used_6 + -1'FMC_6 + -1'PMC_6 = 0
invariant :wait_ack_4_1 + wait_ack_4_2 + wait_ack_4_3 + wait_ack_4_5 + wait_ack_4_6 + AMC_4_1 + AMC_4_2 + AMC_4_3 + AMC_4_4 + AMC_4_5 + AMC_4_6 + RMC_4 + PMC_4 + listen_4 + wait_msg_4 + loop_em_4 = 1
invariant :wait_ack_5_1 + wait_ack_5_2 + wait_ack_5_3 + wait_ack_5_4 + wait_ack_5_6 + listen_5 + wait_cable_5 + wait_msg_5 + loop_em_5 = 1
invariant :wait_ack_2_1 + wait_ack_3_1 + wait_ack_4_1 + wait_ack_5_1 + wait_ack_6_1 + wait_ack_1_2 + wait_ack_3_2 + wait_ack_4_2 + wait_ack_5_2 + wait_ack_6_2 + wait_ack_1_3 + wait_ack_2_3 + wait_ack_4_3 + wait_ack_5_3 + wait_ack_6_3 + wait_ack_1_4 + wait_ack_2_4 + wait_ack_3_4 + wait_ack_5_4 + wait_ack_6_4 + wait_ack_1_5 + wait_ack_2_5 + wait_ack_3_5 + wait_ack_4_5 + wait_ack_6_5 + wait_ack_1_6 + wait_ack_2_6 + wait_ack_3_6 + wait_ack_4_6 + wait_ack_5_6 + -1'AMC_3_1 + -1'AMC_3_2 + -1'AMC_3_3 + -1'AMC_3_4 + -1'AMC_3_5 + -1'AMC_3_6 + -1'RMC_3 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMC_6 + cable_free + PMC_1 + PMC_2 + PMC_4 + PMC_5 + PMC_6 + wait_cable_3 = 1
invariant :-1'wait_ack_2_1 + -1'wait_ack_2_3 + -1'wait_ack_2_4 + -1'wait_ack_2_5 + -1'wait_ack_2_6 + cable_used_2 + -1'FMC_2 + -1'PMC_2 = 0
invariant :wait_ack_3_1 + wait_ack_3_2 + wait_ack_3_4 + wait_ack_3_5 + wait_ack_3_6 + listen_3 + wait_cable_3 + wait_msg_3 + loop_em_3 = 1
invariant :-1'wait_ack_4_1 + -1'wait_ack_4_2 + -1'wait_ack_4_3 + -1'wait_ack_4_5 + -1'wait_ack_4_6 + cable_used_4 + -1'FMC_4 + -1'PMC_4 = 0
invariant :FMCb + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMC_6 = 1
invariant :wait_ack_1_2 + wait_ack_1_3 + wait_ack_1_4 + wait_ack_1_5 + wait_ack_1_6 + listen_1 + wait_cable_1 + wait_msg_1 + loop_em_1 = 1
invariant :Cpt2_6 + AMC_1_5 + AMC_2_5 + AMC_3_5 + AMC_4_5 + AMC_5_5 + AMC_6_5 + -1'AMC_1_6 + -1'AMC_2_6 + -1'AMC_3_6 + -1'AMC_4_6 + -1'AMC_5_6 + -1'AMC_6_6 + -1'Cpt1_6 = 0
invariant :AMC_6_1 + AMC_6_2 + AMC_6_3 + AMC_6_4 + AMC_6_5 + AMC_6_6 + RMC_6 + PMC_6 + -1'wait_cable_6 = 0
invariant :wait_ack_6_1 + wait_ack_6_2 + wait_ack_6_3 + wait_ack_6_4 + wait_ack_6_5 + listen_6 + wait_cable_6 + wait_msg_6 + loop_em_6 = 1
invariant :AMC_1_1 + AMC_1_2 + AMC_1_3 + AMC_1_4 + AMC_1_5 + AMC_1_6 + RMC_1 + PMC_1 + -1'wait_cable_1 = 0
invariant :Cpt2_5 + AMC_1_4 + AMC_2_4 + AMC_3_4 + AMC_4_4 + AMC_5_4 + AMC_6_4 + -1'AMC_1_5 + -1'AMC_2_5 + -1'AMC_3_5 + -1'AMC_4_5 + -1'AMC_5_5 + -1'AMC_6_5 + -1'Cpt1_5 = 0
invariant :-1'wait_ack_3_1 + -1'wait_ack_3_2 + -1'wait_ack_3_4 + -1'wait_ack_3_5 + -1'wait_ack_3_6 + AMC_3_1 + AMC_3_2 + AMC_3_3 + AMC_3_4 + AMC_3_5 + AMC_3_6 + cable_used_3 + RMC_3 + -1'FMC_3 + -1'wait_cable_3 = 0
invariant :ACK + T_out + -1'wait_ack_2_1 + -1'wait_ack_3_1 + -1'wait_ack_4_1 + -1'wait_ack_5_1 + -1'wait_ack_6_1 + -1'wait_ack_1_2 + -1'wait_ack_3_2 + -1'wait_ack_4_2 + -1'wait_ack_5_2 + -1'wait_ack_6_2 + -1'wait_ack_1_3 + -1'wait_ack_2_3 + -1'wait_ack_4_3 + -1'wait_ack_5_3 + -1'wait_ack_6_3 + -1'wait_ack_1_4 + -1'wait_ack_2_4 + -1'wait_ack_3_4 + -1'wait_ack_5_4 + -1'wait_ack_6_4 + -1'wait_ack_1_5 + -1'wait_ack_2_5 + -1'wait_ack_3_5 + -1'wait_ack_4_5 + -1'wait_ack_6_5 + -1'wait_ack_1_6 + -1'wait_ack_2_6 + -1'wait_ack_3_6 + -1'wait_ack_4_6 + -1'wait_ack_5_6 + MSG_1 + MSG_2 + MSG_3 + MSG_4 + MSG_5 + MSG_6 = 0
invariant :Cpt2_1 + -1'AMC_1_1 + -1'AMC_2_1 + -1'AMC_3_1 + -1'AMC_4_1 + -1'AMC_5_1 + -1'AMC_6_1 + AMC_1_6 + AMC_2_6 + AMC_3_6 + AMC_4_6 + AMC_5_6 + AMC_6_6 + -1'Cpt1_1 = 0
invariant :wait_ack_4_1 + wait_ack_4_2 + wait_ack_4_3 + wait_ack_4_5 + wait_ack_4_6 + listen_4 + wait_cable_4 + wait_msg_4 + loop_em_4 = 1
invariant :Cpt2_3 + AMC_1_2 + AMC_2_2 + AMC_3_2 + AMC_4_2 + AMC_5_2 + AMC_6_2 + -1'AMC_1_3 + -1'AMC_2_3 + -1'AMC_3_3 + -1'AMC_4_3 + -1'AMC_5_3 + -1'AMC_6_3 + Cpt1_1 + Cpt1_2 + Cpt1_4 + Cpt1_5 + Cpt1_6 = 1
invariant :R_tout + S_tout = 1
invariant :-1'wait_ack_5_1 + -1'wait_ack_5_2 + -1'wait_ack_5_3 + -1'wait_ack_5_4 + -1'wait_ack_5_6 + cable_used_5 + -1'FMC_5 + -1'PMC_5 = 0
FORMULA SafeBus-PT-06-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-PT-06-ReachabilityCardinality-02 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-PT-06-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-PT-06-ReachabilityCardinality-04 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-PT-06-ReachabilityCardinality-08 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-PT-06-ReachabilityCardinality-09 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-PT-06-ReachabilityCardinality-10 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-PT-06-ReachabilityCardinality-13 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-PT-06-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus\_PT\_06\_flat\_flat,6.81676e+06,347.635,4460176,2,235604,5,5.0505e+06,6,0,1006,5.12376e+06,0
Total reachable state count : 6816756

Verifying 15 reachability properties.
Reachability property SafeBus-PT-06-ReachabilityCardinality-00 is true.
FORMULA SafeBus-PT-06-ReachabilityCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-00,1,347.666,4460204,2,139,6,5.0505e+06,7,0,1032,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-01 does not hold.
No reachable states exhibit your property : SafeBus-PT-06-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-01,0,347.728,4460260,1,0,6,5.0505e+06,8,0,1050,5.12376e+06,0
Invariant property SafeBus-PT-06-ReachabilityCardinality-02 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-02,0,347.76,4460260,1,0,6,5.0505e+06,9,0,1377,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-03 does not hold.
No reachable states exhibit your property : SafeBus-PT-06-ReachabilityCardinality-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-03,0,347.789,4460324,1,0,6,5.0505e+06,10,0,1414,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-04 does not hold.
No reachable states exhibit your property : SafeBus-PT-06-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-04,0,347.806,4460324,1,0,6,5.0505e+06,11,0,1577,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-05 is true.
FORMULA SafeBus-PT-06-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-05,1,347.813,4460324,2,139,7,5.0505e+06,12,0,1609,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-06 is true.
FORMULA SafeBus-PT-06-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-06,97410,348.493,4460324,2,72273,8,5.0505e+06,13,0,1661,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-08 does not hold.
No reachable states exhibit your property : SafeBus-PT-06-ReachabilityCardinality-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-08,0,348.985,4460324,1,0,8,5.0505e+06,14,0,1680,5.12376e+06,0
Invariant property SafeBus-PT-06-ReachabilityCardinality-09 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-09,0,349.292,4460324,1,0,8,5.0505e+06,15,0,1681,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-10 does not hold.
No reachable states exhibit your property : SafeBus-PT-06-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-10,0,349.779,4460324,1,0,8,5.0505e+06,16,0,1698,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-11 is true.
FORMULA SafeBus-PT-06-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-11,21,350.046,4460324,2,457,9,5.0505e+06,17,0,1710,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-12 is true.
FORMULA SafeBus-PT-06-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-12,1464,350.145,4460324,2,8562,10,5.0505e+06,18,0,1719,5.12376e+06,0
Invariant property SafeBus-PT-06-ReachabilityCardinality-13 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-13,0,350.481,4460324,1,0,10,5.0505e+06,19,0,1726,5.12376e+06,0
Reachability property SafeBus-PT-06-ReachabilityCardinality-14 does not hold.
No reachable states exhibit your property : SafeBus-PT-06-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-14,0,350.932,4460324,1,0,10,5.0505e+06,20,0,1727,5.12376e+06,0
Invariant property SafeBus-PT-06-ReachabilityCardinality-15 does not hold.
FORMULA SafeBus-PT-06-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-PT-06-ReachabilityCardinality-15,1212,350.975,4460324,2,8645,11,5.0505e+06,21,0,1737,5.12376e+06,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527060257458

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 23, 2018 7:18:21 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 23, 2018 7:18:21 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 23, 2018 7:18:21 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 185 ms
May 23, 2018 7:18:21 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 144 places.
May 23, 2018 7:18:22 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 451 transitions.
May 23, 2018 7:18:22 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 48 ms
May 23, 2018 7:18:22 AM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 6 fixed domain variables (out of 144 variables) in GAL type SafeBus_PT_06
May 23, 2018 7:18:22 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 6 constant array cells/variables (out of 144 variables) in type SafeBus_PT_06
May 23, 2018 7:18:22 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl_2,msgl_4,msgl_3,msgl_5,msgl_1,msgl_6,
May 23, 2018 7:18:22 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 6 constant variables :msgl_2=1, msgl_4=1, msgl_3=1, msgl_5=1, msgl_1=1, msgl_6=1
May 23, 2018 7:18:22 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 43 expressions due to constant valuations.
May 23, 2018 7:18:22 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 334 ms
May 23, 2018 7:18:22 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 343 ms
May 23, 2018 7:18:22 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 381 ms
May 23, 2018 7:18:22 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 21 ms
May 23, 2018 7:18:23 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 451 transitions.
May 23, 2018 7:18:23 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 451 transitions.
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 15 in 801 ms.
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 112 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-00(UNSAT) depth K=0 took 17 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-01(UNSAT) depth K=0 took 1 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-02(UNSAT) depth K=0 took 7 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-03(UNSAT) depth K=0 took 4 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-04(UNSAT) depth K=0 took 17 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-05(UNSAT) depth K=0 took 2 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-06(UNSAT) depth K=0 took 3 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-08(UNSAT) depth K=0 took 0 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-09(UNSAT) depth K=0 took 11 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-10(UNSAT) depth K=0 took 21 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-11(UNSAT) depth K=0 took 0 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-12(UNSAT) depth K=0 took 0 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-13(UNSAT) depth K=0 took 16 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-14(UNSAT) depth K=0 took 1 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-15(UNSAT) depth K=0 took 14 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-00(UNSAT) depth K=1 took 11 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-01(UNSAT) depth K=1 took 15 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 451 transitions.
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-02(UNSAT) depth K=1 took 16 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-03(UNSAT) depth K=1 took 15 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-04(UNSAT) depth K=1 took 11 ms
May 23, 2018 7:18:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-05(UNSAT) depth K=1 took 8 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-06(UNSAT) depth K=1 took 42 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-08(UNSAT) depth K=1 took 17 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-09(UNSAT) depth K=1 took 11 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-10(UNSAT) depth K=1 took 10 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-11(UNSAT) depth K=1 took 10 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-12(UNSAT) depth K=1 took 11 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-13(UNSAT) depth K=1 took 11 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-14(UNSAT) depth K=1 took 11 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-15(UNSAT) depth K=1 took 10 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 77 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-00(UNSAT) depth K=2 took 214 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-01(UNSAT) depth K=2 took 396 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-02(UNSAT) depth K=2 took 141 ms
May 23, 2018 7:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-03(UNSAT) depth K=2 took 93 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-04(UNSAT) depth K=2 took 156 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-05(UNSAT) depth K=2 took 85 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-06(UNSAT) depth K=2 took 180 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-08(UNSAT) depth K=2 took 106 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 138 variables to be positive in 1897 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 451 transitions.
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/451 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-09(UNSAT) depth K=2 took 85 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 119 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 451 transitions.
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-10(UNSAT) depth K=2 took 94 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 34 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-11(UNSAT) depth K=2 took 97 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-12(UNSAT) depth K=2 took 84 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-13(UNSAT) depth K=2 took 87 ms
May 23, 2018 7:18:25 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 138 variables to be positive in 1772 ms
May 23, 2018 7:18:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-14(UNSAT) depth K=2 took 227 ms
May 23, 2018 7:18:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-15(UNSAT) depth K=2 took 242 ms
May 23, 2018 7:18:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-00
May 23, 2018 7:18:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-00(SAT) depth K=0 took 1033 ms
May 23, 2018 7:18:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-PT-06-ReachabilityCardinality-01
May 23, 2018 7:18:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-01
May 23, 2018 7:18:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-01(FALSE) depth K=0 took 830 ms
May 23, 2018 7:18:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-00(UNSAT) depth K=3 took 2459 ms
May 23, 2018 7:18:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-01(UNSAT) depth K=3 took 1498 ms
May 23, 2018 7:18:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SafeBus-PT-06-ReachabilityCardinality-02
May 23, 2018 7:18:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-02
May 23, 2018 7:18:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-02(TRUE) depth K=0 took 5471 ms
May 23, 2018 7:18:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-PT-06-ReachabilityCardinality-03
May 23, 2018 7:18:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-03
May 23, 2018 7:18:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-03(FALSE) depth K=0 took 1674 ms
May 23, 2018 7:18:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-02(UNSAT) depth K=3 took 4779 ms
May 23, 2018 7:18:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-03(UNSAT) depth K=3 took 7458 ms
May 23, 2018 7:18:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-PT-06-ReachabilityCardinality-04
May 23, 2018 7:18:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-04
May 23, 2018 7:18:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-04(FALSE) depth K=0 took 9817 ms
May 23, 2018 7:18:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-04(UNSAT) depth K=3 took 2437 ms
May 23, 2018 7:18:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-05
May 23, 2018 7:18:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-05(SAT) depth K=0 took 263 ms
May 23, 2018 7:18:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-06
May 23, 2018 7:18:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-06(SAT) depth K=0 took 1565 ms
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-PT-06-ReachabilityCardinality-08
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-08
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-08(FALSE) depth K=0 took 407 ms
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SafeBus-PT-06-ReachabilityCardinality-09
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-09
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-09(TRUE) depth K=0 took 255 ms
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-PT-06-ReachabilityCardinality-10
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-10
May 23, 2018 7:18:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-10(FALSE) depth K=0 took 303 ms
May 23, 2018 7:18:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-05(UNSAT) depth K=3 took 3001 ms
May 23, 2018 7:18:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-11
May 23, 2018 7:18:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-11(SAT) depth K=0 took 800 ms
May 23, 2018 7:18:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-12
May 23, 2018 7:18:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-12(SAT) depth K=0 took 316 ms
May 23, 2018 7:18:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SafeBus-PT-06-ReachabilityCardinality-13
May 23, 2018 7:18:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-13
May 23, 2018 7:18:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-13(TRUE) depth K=0 took 625 ms
May 23, 2018 7:18:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-PT-06-ReachabilityCardinality-14
May 23, 2018 7:18:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-PT-06-ReachabilityCardinality-14
May 23, 2018 7:18:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-14(FALSE) depth K=0 took 258 ms
May 23, 2018 7:18:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-15
May 23, 2018 7:18:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-15(SAT) depth K=0 took 433 ms
May 23, 2018 7:18:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-06(UNSAT) depth K=3 took 5767 ms
May 23, 2018 7:18:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-00
May 23, 2018 7:18:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-00(SAT) depth K=1 took 5046 ms
May 23, 2018 7:18:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-08(UNSAT) depth K=3 took 3100 ms
May 23, 2018 7:18:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-09(UNSAT) depth K=3 took 2580 ms
May 23, 2018 7:19:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-10(UNSAT) depth K=3 took 1198 ms
May 23, 2018 7:19:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 451 transitions.
May 23, 2018 7:19:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-11(UNSAT) depth K=3 took 2634 ms
May 23, 2018 7:19:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/451) took 725 ms. Total solver calls (SAT/UNSAT): 84(78/6)
May 23, 2018 7:19:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-05
May 23, 2018 7:19:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-05(SAT) depth K=1 took 10219 ms
May 23, 2018 7:19:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-12(UNSAT) depth K=3 took 2164 ms
May 23, 2018 7:19:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-06
May 23, 2018 7:19:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-06(SAT) depth K=1 took 2392 ms
May 23, 2018 7:19:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/451) took 5652 ms. Total solver calls (SAT/UNSAT): 552(490/62)
May 23, 2018 7:19:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-13(UNSAT) depth K=3 took 4310 ms
May 23, 2018 7:19:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-14(UNSAT) depth K=3 took 1188 ms
May 23, 2018 7:19:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-15(UNSAT) depth K=3 took 2437 ms
May 23, 2018 7:19:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/451) took 10508 ms. Total solver calls (SAT/UNSAT): 1077(875/202)
May 23, 2018 7:19:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-11
May 23, 2018 7:19:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-11(SAT) depth K=1 took 6980 ms
May 23, 2018 7:19:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-12
May 23, 2018 7:19:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-12(SAT) depth K=1 took 990 ms
May 23, 2018 7:19:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/451) took 14592 ms. Total solver calls (SAT/UNSAT): 1538(1280/258)
May 23, 2018 7:19:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-15
May 23, 2018 7:19:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-15(SAT) depth K=1 took 5532 ms
May 23, 2018 7:19:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/451) took 19824 ms. Total solver calls (SAT/UNSAT): 2024(1670/354)
May 23, 2018 7:19:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/451) took 24301 ms. Total solver calls (SAT/UNSAT): 2507(2057/450)
May 23, 2018 7:19:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/451) took 28645 ms. Total solver calls (SAT/UNSAT): 2956(2452/504)
May 23, 2018 7:19:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/451) took 33288 ms. Total solver calls (SAT/UNSAT): 3461(2821/640)
May 23, 2018 7:19:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-00
May 23, 2018 7:19:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-00(SAT) depth K=2 took 17045 ms
May 23, 2018 7:19:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/451) took 37204 ms. Total solver calls (SAT/UNSAT): 3902(3210/692)
May 23, 2018 7:19:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-00(UNSAT) depth K=4 took 30170 ms
May 23, 2018 7:19:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/451) took 43433 ms. Total solver calls (SAT/UNSAT): 4338(3594/744)
May 23, 2018 7:19:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/451) took 47828 ms. Total solver calls (SAT/UNSAT): 4801(3965/836)
May 23, 2018 7:19:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/451) took 51949 ms. Total solver calls (SAT/UNSAT): 5230(4344/886)
May 23, 2018 7:19:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/451) took 56872 ms. Total solver calls (SAT/UNSAT): 5684(4706/978)
May 23, 2018 7:20:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/451) took 60896 ms. Total solver calls (SAT/UNSAT): 6105(5079/1026)
May 23, 2018 7:20:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-05(UNSAT) depth K=4 took 23536 ms
May 23, 2018 7:20:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/451) took 65721 ms. Total solver calls (SAT/UNSAT): 6521(5447/1074)
May 23, 2018 7:20:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-05
May 23, 2018 7:20:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-05(SAT) depth K=2 took 32185 ms
May 23, 2018 7:20:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/451) took 70180 ms. Total solver calls (SAT/UNSAT): 6994(5788/1206)
May 23, 2018 7:20:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/451) took 73316 ms. Total solver calls (SAT/UNSAT): 7317(6099/1218)
May 23, 2018 7:20:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/451) took 76452 ms. Total solver calls (SAT/UNSAT): 7644(6414/1230)
May 23, 2018 7:20:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/451) took 79566 ms. Total solver calls (SAT/UNSAT): 7990(6626/1364)
May 23, 2018 7:20:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/451) took 82581 ms. Total solver calls (SAT/UNSAT): 8325(6889/1436)
May 23, 2018 7:20:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/451) took 88444 ms. Total solver calls (SAT/UNSAT): 8982(7462/1520)
May 23, 2018 7:20:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-06(UNSAT) depth K=4 took 24613 ms
May 23, 2018 7:20:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/451) took 94397 ms. Total solver calls (SAT/UNSAT): 9620(8076/1544)
May 23, 2018 7:20:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-11(UNSAT) depth K=4 took 7173 ms
May 23, 2018 7:20:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/451) took 100228 ms. Total solver calls (SAT/UNSAT): 9960(8282/1678)
May 23, 2018 7:20:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/451) took 103288 ms. Total solver calls (SAT/UNSAT): 10289(8539/1750)
May 23, 2018 7:20:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/451) took 106340 ms. Total solver calls (SAT/UNSAT): 10617(8795/1822)
May 23, 2018 7:20:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/451) took 109360 ms. Total solver calls (SAT/UNSAT): 10934(9100/1834)
May 23, 2018 7:20:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/451) took 112424 ms. Total solver calls (SAT/UNSAT): 11251(9405/1846)
May 23, 2018 7:20:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-12(UNSAT) depth K=4 took 17321 ms
May 23, 2018 7:20:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/451) took 115505 ms. Total solver calls (SAT/UNSAT): 11567(9709/1858)
May 23, 2018 7:21:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/451) took 120135 ms. Total solver calls (SAT/UNSAT): 11901(9945/1956)
May 23, 2018 7:21:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/451) took 123328 ms. Total solver calls (SAT/UNSAT): 12225(10197/2028)
May 23, 2018 7:21:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-15(UNSAT) depth K=4 took 10145 ms
May 23, 2018 7:21:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/451) took 126360 ms. Total solver calls (SAT/UNSAT): 12548(10448/2100)
May 23, 2018 7:21:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-06
May 23, 2018 7:21:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-06(SAT) depth K=2 took 64381 ms
May 23, 2018 7:21:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/451) took 131984 ms. Total solver calls (SAT/UNSAT): 13170(11046/2124)
May 23, 2018 7:21:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/451) took 139216 ms. Total solver calls (SAT/UNSAT): 13807(11543/2264)
May 23, 2018 7:21:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/451) took 144688 ms. Total solver calls (SAT/UNSAT): 14435(11787/2648)
May 23, 2018 7:21:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/451) took 150009 ms. Total solver calls (SAT/UNSAT): 15044(12372/2672)
May 23, 2018 7:21:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-11
May 23, 2018 7:21:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-11(SAT) depth K=2 took 19438 ms
May 23, 2018 7:21:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/451) took 156165 ms. Total solver calls (SAT/UNSAT): 15669(12857/2812)
May 23, 2018 7:21:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/451) took 161484 ms. Total solver calls (SAT/UNSAT): 16285(13096/3189)
May 23, 2018 7:21:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/451) took 167092 ms. Total solver calls (SAT/UNSAT): 16882(13669/3213)
May 23, 2018 7:21:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/451) took 172393 ms. Total solver calls (SAT/UNSAT): 17495(14142/3353)
May 23, 2018 7:22:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/451) took 177691 ms. Total solver calls (SAT/UNSAT): 18104(14607/3497)
May 23, 2018 7:22:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-12
May 23, 2018 7:22:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-12(SAT) depth K=2 took 27211 ms
May 23, 2018 7:22:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/451) took 182801 ms. Total solver calls (SAT/UNSAT): 18715(15194/3521)
May 23, 2018 7:22:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/451) took 188545 ms. Total solver calls (SAT/UNSAT): 19388(15727/3661)
May 23, 2018 7:22:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/451) took 194132 ms. Total solver calls (SAT/UNSAT): 20045(16252/3793)
May 23, 2018 7:22:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/451) took 199705 ms. Total solver calls (SAT/UNSAT): 20690(16873/3817)
May 23, 2018 7:22:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-15
May 23, 2018 7:22:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-15(SAT) depth K=2 took 25244 ms
May 23, 2018 7:22:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/451) took 205864 ms. Total solver calls (SAT/UNSAT): 21346(17389/3957)
May 23, 2018 7:22:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-PT-06-ReachabilityCardinality-00
May 23, 2018 7:22:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-PT-06-ReachabilityCardinality-00(SAT) depth K=3 took 2682 ms
May 23, 2018 7:22:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/451) took 211556 ms. Total solver calls (SAT/UNSAT): 21991(17902/4089)
May 23, 2018 7:22:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/451) took 214562 ms. Total solver calls (SAT/UNSAT): 22308(18207/4101)
May 23, 2018 7:22:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/451) took 220469 ms. Total solver calls (SAT/UNSAT): 22941(18816/4125)
May 23, 2018 7:22:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/451) took 224508 ms. Total solver calls (SAT/UNSAT): 23275(19052/4223)
May 23, 2018 7:22:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/451) took 230160 ms. Total solver calls (SAT/UNSAT): 23910(19555/4355)
May 23, 2018 7:22:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-00(UNSAT) depth K=5 took 111003 ms
May 23, 2018 7:22:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/451) took 235569 ms. Total solver calls (SAT/UNSAT): 24532(20153/4379)
May 23, 2018 7:23:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/451) took 238700 ms. Total solver calls (SAT/UNSAT): 24841(20450/4391)
May 23, 2018 7:23:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/451) took 243795 ms. Total solver calls (SAT/UNSAT): 25169(20656/4513)
May 23, 2018 7:23:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/451) took 249228 ms. Total solver calls (SAT/UNSAT): 25785(20900/4885)
May 23, 2018 7:23:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/451) took 254700 ms. Total solver calls (SAT/UNSAT): 26394(21485/4909)
May 23, 2018 7:23:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/451) took 261989 ms. Total solver calls (SAT/UNSAT): 27019(21976/5043)
May 23, 2018 7:23:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/451) took 267493 ms. Total solver calls (SAT/UNSAT): 27623(22215/5408)
May 23, 2018 7:23:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/451) took 272813 ms. Total solver calls (SAT/UNSAT): 28220(22788/5432)
May 23, 2018 7:23:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/451) took 278345 ms. Total solver calls (SAT/UNSAT): 28833(23267/5566)
May 23, 2018 7:23:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/451) took 283830 ms. Total solver calls (SAT/UNSAT): 29430(23732/5698)
May 23, 2018 7:23:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/451) took 289160 ms. Total solver calls (SAT/UNSAT): 30005(24283/5722)
May 23, 2018 7:23:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/451) took 294354 ms. Total solver calls (SAT/UNSAT): 30606(24750/5856)
May 23, 2018 7:24:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/451) took 299578 ms. Total solver calls (SAT/UNSAT): 31191(25215/5976)
May 23, 2018 7:24:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-PT-06-ReachabilityCardinality-05(UNSAT) depth K=5 took 70161 ms
May 23, 2018 7:24:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/451) took 304669 ms. Total solver calls (SAT/UNSAT): 31764(25764/6000)
May 23, 2018 7:24:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/451) took 311565 ms. Total solver calls (SAT/UNSAT): 32348(26214/6134)
May 23, 2018 7:24:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 23, 2018 7:24:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying SafeBus-PT-06-ReachabilityCardinality-06 SMT depth 5
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 23, 2018 7:24:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 5
May 23, 2018 7:24:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 5
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 23, 2018 7:24:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying SafeBus-PT-06-ReachabilityCardinality-05 K-induction depth 3
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 23, 2018 7:24:16 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 9/ 15 properties. Interrupting other analysis methods.
May 23, 2018 7:24:16 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 353543ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-PT-06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-PT-06.tgz
mv SafeBus-PT-06 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SafeBus-PT-06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r152-smll-152685550400236"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;