fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r152-smll-152685550300152
Last Updated
June 26, 2018

About the Execution of ITS-Tools for RwMutex-PT-r0100w0010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15753.070 770698.00 3066317.00 461.80 FFFFTFFFFFTTFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 376K
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 11 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 195K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is RwMutex-PT-r0100w0010, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r152-smll-152685550300152
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-00
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-01
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-02
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-03
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-04
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-05
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-06
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-07
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-08
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-09
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-10
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-11
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-12
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-13
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-14
FORMULA_NAME RwMutex-PT-r0100w0010-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1526998816541

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-00 with value :((p251<=p305)||(p109<=p236))
Read [invariant] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-01 with value :((p49<=p288)||(((p198<=p11)&&(p153<=p315))||((p46>=3)||(p93>=3))))
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-02 with value :(p193>=2)
Read [invariant] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-03 with value :(((p71<=p252)||(!(p134>=1)))||(p30>=3))
Read [invariant] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-04 with value :((!((p113>=2)||(p242>=2)))&&(!((p312>=3)&&(p242>=1))))
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-05 with value :(p303>=3)
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-06 with value :((p280>=3)||((!(p282>=2))&&(p57>=2)))
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-07 with value :(((p137>=2)&&((p131<=p186)||(p181<=p164)))&&(!(p246>=3)))
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-08 with value :((p89>=3)&&(p98>=1))
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-09 with value :((p295>=3)||(((p15>=3)&&(p290<=p197))||(p167>=2)))
Read [invariant] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-10 with value :(!(p288>=2))
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-11 with value :((((p61>=2)||(p167<=p268))||((p104<=p139)&&(p189>=1)))&&((!(p189<=p30))&&(!(p36>=3))))
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-12 with value :(((!(p155>=2))&&((p53>=2)||(p8<=p139)))&&(!((p312<=p22)||(p156<=p25))))
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-13 with value :(p262>=2)
Read [reachable] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-14 with value :(((p201>=3)&&((p63<=p267)||(p158<=p71)))&&(!((p84<=p237)||(p109<=p7))))
Read [invariant] property : RwMutex-PT-r0100w0010-ReachabilityCardinality-15 with value :(((!(p95<=p54))||((p59<=p21)&&(p70>=1)))||(((p17<=p24)||(p314>=2))||((p117<=p19)||(p85<=p136))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 220 rows 320 cols
invariant :p12 + -1'p222 + p309 + -1'p99 = 0
invariant :p17 + -1'p227 + p309 + -1'p99 = 0
invariant :p185 + p75 = 1
invariant :p107 + p317 = 1
invariant :p19 + -1'p229 + p309 + -1'p99 = 0
invariant :p144 + p34 = 1
invariant :p293 + -1'p309 + -1'p83 + p99 = 0
invariant :p282 + -1'p309 + -1'p72 + p99 = 0
invariant :p127 + p227 + -1'p309 + p99 = 1
invariant :p137 + p27 = 1
invariant :p259 + -1'p309 + -1'p49 + p99 = 0
invariant :p267 + -1'p309 + -1'p57 + p99 = 0
invariant :p116 + p6 = 1
invariant :p188 + p78 = 1
invariant :p146 + p36 = 1
invariant :p291 + -1'p309 + -1'p81 + p99 = 0
invariant :p104 + p314 = 1
invariant :p142 + p32 = 1
invariant :p202 + p92 = 1
invariant :p106 + p316 = 1
invariant :p296 + -1'p309 + -1'p86 + p99 = 0
invariant :p22 + -1'p232 + p309 + -1'p99 = 0
invariant :p269 + -1'p309 + -1'p59 + p99 = 0
invariant :p190 + p80 = 1
invariant :p1 + p309 + p312 + p313 + p314 + p315 + p316 + p317 + p318 + p319 + p320 + -1'p99 = 0
invariant :p247 + -1'p309 + -1'p37 + p99 = 0
invariant :p265 + -1'p309 + -1'p55 + p99 = 0
invariant :p113 + p3 = 1
invariant :p284 + -1'p309 + -1'p74 + p99 = 0
invariant :p129 + p229 + -1'p309 + p99 = 1
invariant :p236 + -1'p26 + -1'p309 + p99 = 0
invariant :p125 + p225 + -1'p309 + p99 = 1
invariant :p153 + p43 = 1
invariant :p14 + -1'p224 + p309 + -1'p99 = 0
invariant :p241 + -1'p309 + -1'p31 + p99 = 0
invariant :p170 + p60 = 1
invariant :p162 + p52 = 1
invariant :p145 + p35 = 1
invariant :p147 + p37 = 1
invariant :p211 + -1'p309 + p311 + p99 = 1
invariant :p298 + -1'p309 + -1'p88 + p99 = 0
invariant :p199 + p89 = 1
invariant :p173 + p63 = 1
invariant :p133 + p233 + -1'p309 + p99 = 1
invariant :p292 + -1'p309 + -1'p82 + p99 = 0
invariant :p244 + -1'p309 + -1'p34 + p99 = 0
invariant :p280 + -1'p309 + -1'p70 + p99 = 0
invariant :p148 + p38 = 1
invariant :p187 + p77 = 1
invariant :p175 + p65 = 1
invariant :p138 + p28 = 1
invariant :p115 + p5 = 1
invariant :p15 + -1'p225 + p309 + -1'p99 = 0
invariant :p154 + p44 = 1
invariant :p219 + -1'p309 + -1'p9 + p99 = 0
invariant :p114 + p4 = 1
invariant :p111 + -1'p309 + -1'p312 + -1'p313 + -1'p314 + -1'p315 + -1'p316 + -1'p317 + -1'p318 + -1'p319 + -1'p320 + p99 = 1
invariant :p273 + -1'p309 + -1'p63 + p99 = 0
invariant :p171 + p61 = 1
invariant :p256 + -1'p309 + -1'p46 + p99 = 0
invariant :p308 + -1'p309 + -1'p98 + p99 = 0
invariant :p161 + p51 = 1
invariant :p194 + p84 = 1
invariant :p192 + p82 = 1
invariant :p299 + -1'p309 + -1'p89 + p99 = 0
invariant :p110 + p320 = 1
invariant :p157 + p47 = 1
invariant :p249 + -1'p309 + -1'p39 + p99 = 0
invariant :p135 + p25 = 1
invariant :p140 + p30 = 1
invariant :p258 + -1'p309 + -1'p48 + p99 = 0
invariant :p295 + -1'p309 + -1'p85 + p99 = 0
invariant :p152 + p42 = 1
invariant :p201 + p91 = 1
invariant :p216 + -1'p309 + -1'p6 + p99 = 0
invariant :p248 + -1'p309 + -1'p38 + p99 = 0
invariant :p268 + -1'p309 + -1'p58 + p99 = 0
invariant :p156 + p46 = 1
invariant :p159 + p49 = 1
invariant :p271 + -1'p309 + -1'p61 + p99 = 0
invariant :p262 + -1'p309 + -1'p52 + p99 = 0
invariant :p301 + -1'p309 + -1'p91 + p99 = 0
invariant :p252 + -1'p309 + -1'p42 + p99 = 0
invariant :p264 + -1'p309 + -1'p54 + p99 = 0
invariant :p237 + -1'p27 + -1'p309 + p99 = 0
invariant :p16 + -1'p226 + p309 + -1'p99 = 0
invariant :p246 + -1'p309 + -1'p36 + p99 = 0
invariant :p266 + -1'p309 + -1'p56 + p99 = 0
invariant :p163 + p53 = 1
invariant :p160 + p50 = 1
invariant :p254 + -1'p309 + -1'p44 + p99 = 0
invariant :p105 + p315 = 1
invariant :p132 + p232 + -1'p309 + p99 = 1
invariant :p136 + p26 = 1
invariant :p101 + p309 + -1'p311 + -1'p99 = 0
invariant :p167 + p57 = 1
invariant :p234 + -1'p24 + -1'p309 + p99 = 0
invariant :p208 + p98 = 1
invariant :p130 + p230 + -1'p309 + p99 = 1
invariant :p305 + -1'p309 + -1'p95 + p99 = 0
invariant :p121 + p221 + -1'p309 + p99 = 1
invariant :p158 + p48 = 1
invariant :p278 + -1'p309 + -1'p68 + p99 = 0
invariant :p242 + -1'p309 + -1'p32 + p99 = 0
invariant :p193 + p83 = 1
invariant :p126 + p226 + -1'p309 + p99 = 1
invariant :p203 + p93 = 1
invariant :p21 + -1'p231 + p309 + -1'p99 = 0
invariant :p141 + p31 = 1
invariant :p197 + p87 = 1
invariant :p103 + p313 = 1
invariant :p294 + -1'p309 + -1'p84 + p99 = 0
invariant :p178 + p68 = 1
invariant :p238 + -1'p28 + -1'p309 + p99 = 0
invariant :p128 + p228 + -1'p309 + p99 = 1
invariant :p250 + -1'p309 + -1'p40 + p99 = 0
invariant :p117 + p7 = 1
invariant :p164 + p54 = 1
invariant :p275 + -1'p309 + -1'p65 + p99 = 0
invariant :p151 + p41 = 1
invariant :p139 + p29 = 1
invariant :p155 + p45 = 1
invariant :p245 + -1'p309 + -1'p35 + p99 = 0
invariant :p277 + -1'p309 + -1'p67 + p99 = 0
invariant :p287 + -1'p309 + -1'p77 + p99 = 0
invariant :p285 + -1'p309 + -1'p75 + p99 = 0
invariant :p302 + -1'p309 + -1'p92 + p99 = 0
invariant :p209 + p99 = 1
invariant :p255 + -1'p309 + -1'p45 + p99 = 0
invariant :p149 + p39 = 1
invariant :p174 + p64 = 1
invariant :p172 + p62 = 1
invariant :p213 + -1'p3 + -1'p309 + p99 = 0
invariant :p261 + -1'p309 + -1'p51 + p99 = 0
invariant :p306 + -1'p309 + -1'p96 + p99 = 0
invariant :p166 + p56 = 1
invariant :p13 + -1'p223 + p309 + -1'p99 = 0
invariant :p102 + p312 = 1
invariant :p272 + -1'p309 + -1'p62 + p99 = 0
invariant :p207 + p97 = 1
invariant :p100 + p309 + -1'p310 + -1'p99 = 0
invariant :p150 + p40 = 1
invariant :p109 + p319 = 1
invariant :p191 + p81 = 1
invariant :p297 + -1'p309 + -1'p87 + p99 = 0
invariant :p177 + p67 = 1
invariant :p118 + p8 = 1
invariant :p189 + p79 = 1
invariant :p251 + -1'p309 + -1'p41 + p99 = 0
invariant :p253 + -1'p309 + -1'p43 + p99 = 0
invariant :p260 + -1'p309 + -1'p50 + p99 = 0
invariant :p240 + -1'p30 + -1'p309 + p99 = 0
invariant :p180 + p70 = 1
invariant :p11 + -1'p221 + p309 + -1'p99 = 0
invariant :p179 + p69 = 1
invariant :p200 + p90 = 1
invariant :p300 + -1'p309 + -1'p90 + p99 = 0
invariant :p165 + p55 = 1
invariant :p168 + p58 = 1
invariant :p303 + -1'p309 + -1'p93 + p99 = 0
invariant :p181 + p71 = 1
invariant :p279 + -1'p309 + -1'p69 + p99 = 0
invariant :p134 + p24 = 1
invariant :p186 + p76 = 1
invariant :p10 + -1'p220 + p309 + -1'p99 = 0
invariant :p235 + -1'p25 + -1'p309 + p99 = 0
invariant :p183 + p73 = 1
invariant :p210 + -1'p309 + p310 + p99 = 1
invariant :p214 + -1'p309 + -1'p4 + p99 = 0
invariant :p18 + -1'p228 + p309 + -1'p99 = 0
invariant :p270 + -1'p309 + -1'p60 + p99 = 0
invariant :p204 + p94 = 1
invariant :p122 + p222 + -1'p309 + p99 = 1
invariant :p195 + p85 = 1
invariant :p143 + p33 = 1
invariant :p239 + -1'p29 + -1'p309 + p99 = 0
invariant :p120 + p220 + -1'p309 + p99 = 1
invariant :p263 + -1'p309 + -1'p53 + p99 = 0
invariant :p243 + -1'p309 + -1'p33 + p99 = 0
invariant :p304 + -1'p309 + -1'p94 + p99 = 0
invariant :p124 + p224 + -1'p309 + p99 = 1
invariant :p112 + p212 + -1'p309 + p99 = 1
invariant :p182 + p72 = 1
invariant :p196 + p86 = 1
invariant :p108 + p318 = 1
invariant :p131 + p231 + -1'p309 + p99 = 1
invariant :p169 + p59 = 1
invariant :p288 + -1'p309 + -1'p78 + p99 = 0
invariant :p307 + -1'p309 + -1'p97 + p99 = 0
invariant :p119 + p9 = 1
invariant :p23 + -1'p233 + p309 + -1'p99 = 0
invariant :p217 + -1'p309 + -1'p7 + p99 = 0
invariant :p290 + -1'p309 + -1'p80 + p99 = 0
invariant :p276 + -1'p309 + -1'p66 + p99 = 0
invariant :p198 + p88 = 1
invariant :p218 + -1'p309 + -1'p8 + p99 = 0
invariant :p123 + p223 + -1'p309 + p99 = 1
invariant :p176 + p66 = 1
invariant :p289 + -1'p309 + -1'p79 + p99 = 0
invariant :p184 + p74 = 1
invariant :p283 + -1'p309 + -1'p73 + p99 = 0
invariant :p205 + p95 = 1
invariant :p2 + -1'p212 + p309 + -1'p99 = 0
invariant :p215 + -1'p309 + -1'p5 + p99 = 0
invariant :p257 + -1'p309 + -1'p47 + p99 = 0
invariant :p286 + -1'p309 + -1'p76 + p99 = 0
invariant :p274 + -1'p309 + -1'p64 + p99 = 0
invariant :p206 + p96 = 1
invariant :p281 + -1'p309 + -1'p71 + p99 = 0
invariant :p20 + -1'p230 + p309 + -1'p99 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 220 rows 320 cols
invariant :p12 + -1'p222 + p309 + -1'p99 = 0
invariant :p17 + -1'p227 + p309 + -1'p99 = 0
invariant :p185 + p75 = 1
invariant :p107 + p317 = 1
invariant :p19 + -1'p229 + p309 + -1'p99 = 0
invariant :p144 + p34 = 1
invariant :p293 + -1'p309 + -1'p83 + p99 = 0
invariant :p282 + -1'p309 + -1'p72 + p99 = 0
invariant :p127 + p227 + -1'p309 + p99 = 1
invariant :p137 + p27 = 1
invariant :p259 + -1'p309 + -1'p49 + p99 = 0
invariant :p267 + -1'p309 + -1'p57 + p99 = 0
invariant :p116 + p6 = 1
invariant :p188 + p78 = 1
invariant :p146 + p36 = 1
invariant :p291 + -1'p309 + -1'p81 + p99 = 0
invariant :p104 + p314 = 1
invariant :p142 + p32 = 1
invariant :p202 + p92 = 1
invariant :p106 + p316 = 1
invariant :p296 + -1'p309 + -1'p86 + p99 = 0
invariant :p22 + -1'p232 + p309 + -1'p99 = 0
invariant :p269 + -1'p309 + -1'p59 + p99 = 0
invariant :p190 + p80 = 1
invariant :p1 + p309 + p312 + p313 + p314 + p315 + p316 + p317 + p318 + p319 + p320 + -1'p99 = 0
invariant :p247 + -1'p309 + -1'p37 + p99 = 0
invariant :p265 + -1'p309 + -1'p55 + p99 = 0
invariant :p113 + p3 = 1
invariant :p284 + -1'p309 + -1'p74 + p99 = 0
invariant :p129 + p229 + -1'p309 + p99 = 1
invariant :p236 + -1'p26 + -1'p309 + p99 = 0
invariant :p125 + p225 + -1'p309 + p99 = 1
invariant :p153 + p43 = 1
invariant :p14 + -1'p224 + p309 + -1'p99 = 0
invariant :p241 + -1'p309 + -1'p31 + p99 = 0
invariant :p170 + p60 = 1
invariant :p162 + p52 = 1
invariant :p145 + p35 = 1
invariant :p147 + p37 = 1
invariant :p211 + -1'p309 + p311 + p99 = 1
invariant :p298 + -1'p309 + -1'p88 + p99 = 0
invariant :p199 + p89 = 1
invariant :p173 + p63 = 1
invariant :p133 + p233 + -1'p309 + p99 = 1
invariant :p292 + -1'p309 + -1'p82 + p99 = 0
invariant :p244 + -1'p309 + -1'p34 + p99 = 0
invariant :p280 + -1'p309 + -1'p70 + p99 = 0
invariant :p148 + p38 = 1
invariant :p187 + p77 = 1
invariant :p175 + p65 = 1
invariant :p138 + p28 = 1
invariant :p115 + p5 = 1
invariant :p15 + -1'p225 + p309 + -1'p99 = 0
invariant :p154 + p44 = 1
invariant :p219 + -1'p309 + -1'p9 + p99 = 0
invariant :p114 + p4 = 1
invariant :p111 + -1'p309 + -1'p312 + -1'p313 + -1'p314 + -1'p315 + -1'p316 + -1'p317 + -1'p318 + -1'p319 + -1'p320 + p99 = 1
invariant :p273 + -1'p309 + -1'p63 + p99 = 0
invariant :p171 + p61 = 1
invariant :p256 + -1'p309 + -1'p46 + p99 = 0
invariant :p308 + -1'p309 + -1'p98 + p99 = 0
invariant :p161 + p51 = 1
invariant :p194 + p84 = 1
invariant :p192 + p82 = 1
invariant :p299 + -1'p309 + -1'p89 + p99 = 0
invariant :p110 + p320 = 1
invariant :p157 + p47 = 1
invariant :p249 + -1'p309 + -1'p39 + p99 = 0
invariant :p135 + p25 = 1
invariant :p140 + p30 = 1
invariant :p258 + -1'p309 + -1'p48 + p99 = 0
invariant :p295 + -1'p309 + -1'p85 + p99 = 0
invariant :p152 + p42 = 1
invariant :p201 + p91 = 1
invariant :p216 + -1'p309 + -1'p6 + p99 = 0
invariant :p248 + -1'p309 + -1'p38 + p99 = 0
invariant :p268 + -1'p309 + -1'p58 + p99 = 0
invariant :p156 + p46 = 1
invariant :p159 + p49 = 1
invariant :p271 + -1'p309 + -1'p61 + p99 = 0
invariant :p262 + -1'p309 + -1'p52 + p99 = 0
invariant :p301 + -1'p309 + -1'p91 + p99 = 0
invariant :p252 + -1'p309 + -1'p42 + p99 = 0
invariant :p264 + -1'p309 + -1'p54 + p99 = 0
invariant :p237 + -1'p27 + -1'p309 + p99 = 0
invariant :p16 + -1'p226 + p309 + -1'p99 = 0
invariant :p246 + -1'p309 + -1'p36 + p99 = 0
invariant :p266 + -1'p309 + -1'p56 + p99 = 0
invariant :p163 + p53 = 1
invariant :p160 + p50 = 1
invariant :p254 + -1'p309 + -1'p44 + p99 = 0
invariant :p105 + p315 = 1
invariant :p132 + p232 + -1'p309 + p99 = 1
invariant :p136 + p26 = 1
invariant :p101 + p309 + -1'p311 + -1'p99 = 0
invariant :p167 + p57 = 1
invariant :p234 + -1'p24 + -1'p309 + p99 = 0
invariant :p208 + p98 = 1
invariant :p130 + p230 + -1'p309 + p99 = 1
invariant :p305 + -1'p309 + -1'p95 + p99 = 0
invariant :p121 + p221 + -1'p309 + p99 = 1
invariant :p158 + p48 = 1
invariant :p278 + -1'p309 + -1'p68 + p99 = 0
invariant :p242 + -1'p309 + -1'p32 + p99 = 0
invariant :p193 + p83 = 1
invariant :p126 + p226 + -1'p309 + p99 = 1
invariant :p203 + p93 = 1
invariant :p21 + -1'p231 + p309 + -1'p99 = 0
invariant :p141 + p31 = 1
invariant :p197 + p87 = 1
invariant :p103 + p313 = 1
invariant :p294 + -1'p309 + -1'p84 + p99 = 0
invariant :p178 + p68 = 1
invariant :p238 + -1'p28 + -1'p309 + p99 = 0
invariant :p128 + p228 + -1'p309 + p99 = 1
invariant :p250 + -1'p309 + -1'p40 + p99 = 0
invariant :p117 + p7 = 1
invariant :p164 + p54 = 1
invariant :p275 + -1'p309 + -1'p65 + p99 = 0
invariant :p151 + p41 = 1
invariant :p139 + p29 = 1
invariant :p155 + p45 = 1
invariant :p245 + -1'p309 + -1'p35 + p99 = 0
invariant :p277 + -1'p309 + -1'p67 + p99 = 0
invariant :p287 + -1'p309 + -1'p77 + p99 = 0
invariant :p285 + -1'p309 + -1'p75 + p99 = 0
invariant :p302 + -1'p309 + -1'p92 + p99 = 0
invariant :p209 + p99 = 1
invariant :p255 + -1'p309 + -1'p45 + p99 = 0
invariant :p149 + p39 = 1
invariant :p174 + p64 = 1
invariant :p172 + p62 = 1
invariant :p213 + -1'p3 + -1'p309 + p99 = 0
invariant :p261 + -1'p309 + -1'p51 + p99 = 0
invariant :p306 + -1'p309 + -1'p96 + p99 = 0
invariant :p166 + p56 = 1
invariant :p13 + -1'p223 + p309 + -1'p99 = 0
invariant :p102 + p312 = 1
invariant :p272 + -1'p309 + -1'p62 + p99 = 0
invariant :p207 + p97 = 1
invariant :p100 + p309 + -1'p310 + -1'p99 = 0
invariant :p150 + p40 = 1
invariant :p109 + p319 = 1
invariant :p191 + p81 = 1
invariant :p297 + -1'p309 + -1'p87 + p99 = 0
invariant :p177 + p67 = 1
invariant :p118 + p8 = 1
invariant :p189 + p79 = 1
invariant :p251 + -1'p309 + -1'p41 + p99 = 0
invariant :p253 + -1'p309 + -1'p43 + p99 = 0
invariant :p260 + -1'p309 + -1'p50 + p99 = 0
invariant :p240 + -1'p30 + -1'p309 + p99 = 0
invariant :p180 + p70 = 1
invariant :p11 + -1'p221 + p309 + -1'p99 = 0
invariant :p179 + p69 = 1
invariant :p200 + p90 = 1
invariant :p300 + -1'p309 + -1'p90 + p99 = 0
invariant :p165 + p55 = 1
invariant :p168 + p58 = 1
invariant :p303 + -1'p309 + -1'p93 + p99 = 0
invariant :p181 + p71 = 1
invariant :p279 + -1'p309 + -1'p69 + p99 = 0
invariant :p134 + p24 = 1
invariant :p186 + p76 = 1
invariant :p10 + -1'p220 + p309 + -1'p99 = 0
invariant :p235 + -1'p25 + -1'p309 + p99 = 0
invariant :p183 + p73 = 1
invariant :p210 + -1'p309 + p310 + p99 = 1
invariant :p214 + -1'p309 + -1'p4 + p99 = 0
invariant :p18 + -1'p228 + p309 + -1'p99 = 0
invariant :p270 + -1'p309 + -1'p60 + p99 = 0
invariant :p204 + p94 = 1
invariant :p122 + p222 + -1'p309 + p99 = 1
invariant :p195 + p85 = 1
invariant :p143 + p33 = 1
invariant :p239 + -1'p29 + -1'p309 + p99 = 0
invariant :p120 + p220 + -1'p309 + p99 = 1
invariant :p263 + -1'p309 + -1'p53 + p99 = 0
invariant :p243 + -1'p309 + -1'p33 + p99 = 0
invariant :p304 + -1'p309 + -1'p94 + p99 = 0
invariant :p124 + p224 + -1'p309 + p99 = 1
invariant :p112 + p212 + -1'p309 + p99 = 1
invariant :p182 + p72 = 1
invariant :p196 + p86 = 1
invariant :p108 + p318 = 1
invariant :p131 + p231 + -1'p309 + p99 = 1
invariant :p169 + p59 = 1
invariant :p288 + -1'p309 + -1'p78 + p99 = 0
invariant :p307 + -1'p309 + -1'p97 + p99 = 0
invariant :p119 + p9 = 1
invariant :p23 + -1'p233 + p309 + -1'p99 = 0
invariant :p217 + -1'p309 + -1'p7 + p99 = 0
invariant :p290 + -1'p309 + -1'p80 + p99 = 0
invariant :p276 + -1'p309 + -1'p66 + p99 = 0
invariant :p198 + p88 = 1
invariant :p218 + -1'p309 + -1'p8 + p99 = 0
invariant :p123 + p223 + -1'p309 + p99 = 1
invariant :p176 + p66 = 1
invariant :p289 + -1'p309 + -1'p79 + p99 = 0
invariant :p184 + p74 = 1
invariant :p283 + -1'p309 + -1'p73 + p99 = 0
invariant :p205 + p95 = 1
invariant :p2 + -1'p212 + p309 + -1'p99 = 0
invariant :p215 + -1'p309 + -1'p5 + p99 = 0
invariant :p257 + -1'p309 + -1'p47 + p99 = 0
invariant :p286 + -1'p309 + -1'p76 + p99 = 0
invariant :p274 + -1'p309 + -1'p64 + p99 = 0
invariant :p206 + p96 = 1
invariant :p281 + -1'p309 + -1'p71 + p99 = 0
invariant :p20 + -1'p230 + p309 + -1'p99 = 0
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-04 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-05 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-08 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-10 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-12 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-13 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-00 FALSE TECHNIQUES SAT_SMT BMC(2)
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT BMC(2)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6528 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 40 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, RwMutexPTr0100w0010ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
LTSmin run took 2042 ms.
Found Violation
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, RwMutexPTr0100w0010ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 9556 ms.
Found Violation
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, RwMutexPTr0100w0010ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT BMC(2)
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, RwMutexPTr0100w0010ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, RwMutexPTr0100w0010ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-11 TRUE TECHNIQUES SAT_SMT BMC(2)
LTSmin run took 450311 ms.
Found Violation
FORMULA RwMutex-PT-r0100w0010-ReachabilityCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1526999587239

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 22, 2018 2:20:19 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 22, 2018 2:20:19 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 22, 2018 2:20:19 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 134 ms
May 22, 2018 2:20:19 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 320 places.
May 22, 2018 2:20:19 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 220 transitions.
May 22, 2018 2:20:20 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 33 ms
May 22, 2018 2:20:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 348 ms
May 22, 2018 2:20:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 171 ms
May 22, 2018 2:20:20 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 7 ms
May 22, 2018 2:20:20 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 22, 2018 2:20:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 260 ms
May 22, 2018 2:20:20 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 220 transitions.
May 22, 2018 2:20:21 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 220 transitions.
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 906 ms.
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 210 place invariants in 245 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-00(UNSAT) depth K=0 took 17 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-01(UNSAT) depth K=0 took 14 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-02(UNSAT) depth K=0 took 6 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-03(UNSAT) depth K=0 took 10 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-04(UNSAT) depth K=0 took 8 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-05(UNSAT) depth K=0 took 8 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-06(UNSAT) depth K=0 took 12 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-07(UNSAT) depth K=0 took 12 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-08(UNSAT) depth K=0 took 14 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-09(UNSAT) depth K=0 took 9 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-10(UNSAT) depth K=0 took 14 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-11(UNSAT) depth K=0 took 12 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-12(UNSAT) depth K=0 took 23 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-13(UNSAT) depth K=0 took 11 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-14(UNSAT) depth K=0 took 17 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-15(UNSAT) depth K=0 took 20 ms
May 22, 2018 2:20:21 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 220 transitions.
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-00(UNSAT) depth K=1 took 189 ms
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-01(UNSAT) depth K=1 took 178 ms
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 210 place invariants in 141 ms
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-02(UNSAT) depth K=1 took 74 ms
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-03(UNSAT) depth K=1 took 97 ms
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-04(UNSAT) depth K=1 took 232 ms
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-05(UNSAT) depth K=1 took 65 ms
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-06(UNSAT) depth K=1 took 140 ms
May 22, 2018 2:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-07(UNSAT) depth K=1 took 48 ms
May 22, 2018 2:20:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-08(UNSAT) depth K=1 took 48 ms
May 22, 2018 2:20:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-09(UNSAT) depth K=1 took 144 ms
May 22, 2018 2:20:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-10(UNSAT) depth K=1 took 38 ms
May 22, 2018 2:20:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-11(UNSAT) depth K=1 took 98 ms
May 22, 2018 2:20:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-12(UNSAT) depth K=1 took 71 ms
May 22, 2018 2:20:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-13(UNSAT) depth K=1 took 39 ms
May 22, 2018 2:20:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-14(UNSAT) depth K=1 took 59 ms
May 22, 2018 2:20:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-15(UNSAT) depth K=1 took 95 ms
May 22, 2018 2:20:27 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 320 variables to be positive in 5514 ms
May 22, 2018 2:20:27 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 320 variables to be positive in 6321 ms
May 22, 2018 2:20:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 220 transitions.
May 22, 2018 2:20:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/220 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 2:20:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 74 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 2:20:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 220 transitions.
May 22, 2018 2:20:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 25 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 2:20:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-00
May 22, 2018 2:20:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-00(SAT) depth K=0 took 3237 ms
May 22, 2018 2:20:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-01
May 22, 2018 2:20:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-01(SAT) depth K=0 took 2702 ms
May 22, 2018 2:20:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-02
May 22, 2018 2:20:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-02
May 22, 2018 2:20:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-02(FALSE) depth K=0 took 218 ms
May 22, 2018 2:20:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-03
May 22, 2018 2:20:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-03(SAT) depth K=0 took 2701 ms
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant RwMutex-PT-r0100w0010-ReachabilityCardinality-04
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-04
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-04(TRUE) depth K=0 took 521 ms
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-05
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-05
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-05(FALSE) depth K=0 took 216 ms
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-06
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-06
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-06(FALSE) depth K=0 took 297 ms
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-07
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-07
May 22, 2018 2:20:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-07(FALSE) depth K=0 took 247 ms
May 22, 2018 2:20:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-08
May 22, 2018 2:20:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-08
May 22, 2018 2:20:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-08(FALSE) depth K=0 took 275 ms
May 22, 2018 2:20:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-09
May 22, 2018 2:20:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-09
May 22, 2018 2:20:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-09(FALSE) depth K=0 took 568 ms
May 22, 2018 2:20:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant RwMutex-PT-r0100w0010-ReachabilityCardinality-10
May 22, 2018 2:20:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-10
May 22, 2018 2:20:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-10(TRUE) depth K=0 took 402 ms
May 22, 2018 2:20:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 220 transitions.
May 22, 2018 2:20:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/220) took 143 ms. Total solver calls (SAT/UNSAT): 12(11/1)
May 22, 2018 2:20:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-11
May 22, 2018 2:20:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-11(SAT) depth K=0 took 3076 ms
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-12
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-12
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-12(FALSE) depth K=0 took 820 ms
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-13
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-13
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-13(FALSE) depth K=0 took 210 ms
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-14
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0100w0010-ReachabilityCardinality-14
May 22, 2018 2:20:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-14(FALSE) depth K=0 took 273 ms
May 22, 2018 2:20:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/220) took 4010 ms. Total solver calls (SAT/UNSAT): 301(244/57)
May 22, 2018 2:20:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-15
May 22, 2018 2:20:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-15(SAT) depth K=0 took 2490 ms
May 22, 2018 2:20:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/220) took 7464 ms. Total solver calls (SAT/UNSAT): 562(451/111)
May 22, 2018 2:20:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: Result is SAT, found a counter-example trace to a state that contradicts invariant/never predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-00
May 22, 2018 2:20:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-00(FALSE) depth K=2 took 24336 ms
May 22, 2018 2:20:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/220) took 11354 ms. Total solver calls (SAT/UNSAT): 819(654/165)
May 22, 2018 2:20:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/220) took 14487 ms. Total solver calls (SAT/UNSAT): 1072(853/219)
May 22, 2018 2:20:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/220) took 17610 ms. Total solver calls (SAT/UNSAT): 1323(1049/274)
May 22, 2018 2:21:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/220) took 20623 ms. Total solver calls (SAT/UNSAT): 1521(1165/356)
May 22, 2018 2:21:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 21767 ms. Total solver calls (SAT/UNSAT): 1586(1230/356)
May 22, 2018 2:21:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 220 transitions.
May 22, 2018 2:21:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-00
May 22, 2018 2:21:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-00(SAT) depth K=1 took 30157 ms
May 22, 2018 2:21:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-01
May 22, 2018 2:21:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-01(SAT) depth K=1 took 10762 ms
May 22, 2018 2:21:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: Result is SAT, found a counter-example trace to a state that contradicts invariant/never predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-01
May 22, 2018 2:21:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-01(FALSE) depth K=2 took 39049 ms
May 22, 2018 2:21:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 29761 ms. Total solver calls (SAT/UNSAT): 2889(0/2889)
May 22, 2018 2:21:31 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 71136ms conformant to PINS in folder :/home/mcc/execution
May 22, 2018 2:21:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-03
May 22, 2018 2:21:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-03(SAT) depth K=1 took 9259 ms
May 22, 2018 2:21:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-02(UNSAT) depth K=2 took 24479 ms
May 22, 2018 2:21:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-11
May 22, 2018 2:21:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-11(SAT) depth K=1 took 15615 ms
May 22, 2018 2:22:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-15
May 22, 2018 2:22:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-15(SAT) depth K=1 took 13698 ms
May 22, 2018 2:22:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: Result is SAT, found a counter-example trace to a state that contradicts invariant/never predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-03
May 22, 2018 2:22:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-03(FALSE) depth K=2 took 38628 ms
May 22, 2018 2:22:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-15
May 22, 2018 2:22:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-15(SAT) depth K=2 took 47219 ms
May 22, 2018 2:23:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-04(UNSAT) depth K=2 took 42866 ms
May 22, 2018 2:23:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-05(UNSAT) depth K=2 took 13995 ms
May 22, 2018 2:24:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-06(UNSAT) depth K=2 took 62069 ms
May 22, 2018 2:24:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-07(UNSAT) depth K=2 took 17801 ms
May 22, 2018 2:25:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-08(UNSAT) depth K=2 took 21531 ms
May 22, 2018 2:25:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-09(UNSAT) depth K=2 took 48711 ms
May 22, 2018 2:26:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-10(UNSAT) depth K=2 took 18427 ms
May 22, 2018 2:26:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: Result is SAT, found a trace to state matching reachability predicate RwMutex-PT-r0100w0010-ReachabilityCardinality-11
May 22, 2018 2:26:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-11(TRUE) depth K=2 took 29990 ms
May 22, 2018 2:27:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-12(UNSAT) depth K=2 took 42551 ms
May 22, 2018 2:27:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-13(UNSAT) depth K=2 took 27775 ms
May 22, 2018 2:28:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-14(UNSAT) depth K=2 took 6828 ms
May 22, 2018 2:28:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-15(UNSAT) depth K=2 took 33402 ms
May 22, 2018 2:29:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesRwMutex-PT-r0100w0010-ReachabilityCardinality-15
May 22, 2018 2:29:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-15(SAT) depth K=3 took 374535 ms
May 22, 2018 2:31:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0100w0010-ReachabilityCardinality-15(UNSAT) depth K=3 took 163995 ms
May 22, 2018 2:33:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 22, 2018 2:33:05 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 22, 2018 2:33:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying RwMutex-PT-r0100w0010-ReachabilityCardinality-15 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 22, 2018 2:33:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
May 22, 2018 2:33:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
May 22, 2018 2:33:05 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 22, 2018 2:33:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying RwMutex-PT-r0100w0010-ReachabilityCardinality-15 K-induction depth 4
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 22, 2018 2:33:05 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 15/ 16 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0100w0010"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0100w0010.tgz
mv RwMutex-PT-r0100w0010 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is RwMutex-PT-r0100w0010, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r152-smll-152685550300152"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;