fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r141-qhx2-152673583000363
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for ResAllocation-PT-R003C020

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15757.870 5304.00 25499.00 7495.70 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................................
/home/mcc/execution
total 304K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 7.5K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 138K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ResAllocation-PT-R003C020, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r141-qhx2-152673583000363
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527927975096

Flatten gal took : 109 ms
Performed 20 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 20 rules applied. Total rules applied 20 place count 120 transition count 60
Constant places removed 21 places and 0 transitions.
Iterating post reduction 1 with 21 rules applied. Total rules applied 41 place count 99 transition count 60
Applied a total of 41 rules in 19 ms. Remains 99 /120 variables (removed 21) and now considering 60/80 (removed 20) transitions.
// Phase 1: matrix 60 rows 99 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph4546576517067220173.txt, -o, /tmp/graph4546576517067220173.bin, -w, /tmp/graph4546576517067220173.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph4546576517067220173.bin, -l, -1, -v, -w, /tmp/graph4546576517067220173.weights, -q, 0, -e, 0.001], workingDir=null]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 60 rows 99 cols
invariant :r_2_2 + -1'r_3_2 = 0
invariant :p_17_2 + r_17_2 = 1
invariant :p_4_0 + r_4_0 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_18_0 + r_18_0 = 1
invariant :r_10_2 + -1'r_11_2 = 0
invariant :r_5_0 + -1'r_6_0 = 0
invariant :p_8_0 + r_8_0 = 1
invariant :p_7_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_12_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_14_0 + r_14_0 = 1
invariant :r_3_0 + -1'r_4_0 = 0
invariant :r_17_0 + -1'r_18_0 = 0
invariant :p_1_2 + r_1_2 = 1
invariant :r_14_2 + -1'r_15_2 = 0
invariant :p_13_2 + r_13_2 = 1
invariant :r_7_0 + -1'r_8_0 = 0
invariant :r_16_2 + -1'r_17_2 = 0
invariant :p_5_2 + r_5_2 = 1
invariant :p_1_1 + r_1_1 + -1'r_2_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_8_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :r_8_2 + -1'r_9_2 = 0
invariant :p_14_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_7_2 + r_7_2 = 1
invariant :r_11_0 + -1'r_12_0 = 0
invariant :r_12_2 + -1'r_13_2 = 0
invariant :p_4_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :r_9_0 + -1'r_10_0 = 0
invariant :r_13_0 + -1'r_14_0 = 0
invariant :r_18_2 + -1'r_19_2 = 0
invariant :p_3_2 + r_3_2 = 1
invariant :p_0_0 + r_0_0 = 1
invariant :r_6_2 + -1'r_7_2 = 0
invariant :p_13_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_15_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_2_0 + r_2_0 = 1
invariant :p_2_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_6_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_18_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_11_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :r_4_2 + -1'r_5_2 = 0
invariant :p_10_0 + r_10_0 = 1
invariant :p_12_0 + r_12_0 = 1
invariant :r_0_2 + -1'r_1_2 = 0
invariant :r_15_0 + -1'r_16_0 = 0
invariant :p_5_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_17_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :r_1_0 + -1'r_2_0 = 0
invariant :p_10_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_19_1 + r_19_1 = 1
invariant :p_6_0 + r_6_0 = 1
invariant :p_19_2 + r_19_2 = 1
invariant :p_3_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_11_2 + r_11_2 = 1
invariant :p_16_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_16_0 + r_16_0 = 1
invariant :p_9_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_15_2 + r_15_2 = 1
invariant :p_9_2 + r_9_2 = 1
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 14 ordering constraints for composite.
built 7 ordering constraints for composite.
built 6 ordering constraints for composite.
built 8 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 9 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1.85713e+10,0.072868,5388,92,62,572,245,259,464,69,378,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,265,0.083283,5388,103,41,1070,372,555,1657,308,596,1081

System contains 265 deadlocks (shown below if less than --print-limit option) !
FORMULA ResAllocation-PT-R003C020-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 265 states ] showing 10 first states
[ i7={[ u23={[ p_19_2=1 ]
} u22={[ p_19_1=1 ]
} u20={[ p_18_0=1 ]
} u21={[ p_17_2=1 p_17_1=1 ]
} u19={[ p_16_0=1 ]
} ]
} i6={[ u18={[ p_15_2=1 p_15_1=1 ]
} u16={[ p_14_0=1 ]
} ]
} i5={[ u17={[ p_13_2=1 p_13_1=1 ]
} u15={[ p_12_0=1 ]
} ]
} i4={[ u14={[ p_11_2=1 r_11_1=1 ]
} u13={[ p_10_1=1 p_10_0=1 ]
} ]
} i3={[ u12={[ p_9_2=1 ]
} u11={[ p_8_1=1 p_8_0=1 ]
} ]
} i2={[ u10={[ p_7_2=1 ]
} u9={[ p_6_1=1 ]
} u8={[ p_6_0=1 ]
} u7={[ p_5_2=1 r_4_1=1 ]
} ]
} i1={[ u6={[ p_4_0=1 ]
} u5={[ p_3_2=1 p_3_1=1 ]
} ]
} i0={[ u4={[ p_2_0=1 ]
} u2={[ p_1_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ ]
} u0={[ p_0_0=1 ]
} ]
[ u4={[ p_2_0=1 ]
} u2={[ r_1_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ p_0_1=1 ]
} u0={[ p_0_0=1 ]
} ]
} ]
[ i7={[ u23={[ p_19_2=1 ]
} u22={[ p_19_1=1 ]
} u20={[ p_18_0=1 ]
} u21={[ p_17_2=1 p_17_1=1 ]
} u19={[ p_16_0=1 ]
} ]
} i6={[ u18={[ p_15_2=1 p_15_1=1 ]
} u16={[ p_14_0=1 ]
} ]
} i5={[ u17={[ p_13_2=1 p_13_1=1 ]
} u15={[ p_12_0=1 ]
} ]
} i4={[ u14={[ p_11_2=1 r_11_1=1 ]
} u13={[ p_10_1=1 p_10_0=1 ]
} ]
} i3={[ u12={[ p_9_2=1 ]
} u11={[ p_8_1=1 p_8_0=1 ]
} ]
} i2={[ u10={[ p_7_2=1 ]
} u9={[ p_6_1=1 ]
} u8={[ p_6_0=1 ]
} u7={[ p_5_2=1 ]
} ]
} i1={[ u6={[ p_4_0=1 ]
} u5={[ p_3_2=1 p_4_1=1 ]
} ]
} i0={[ u4={[ p_2_0=1 ]
} u2={[ p_2_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ p_0_1=1 ]
} u0={[ p_0_0=1 ]
} ]
} ]
[ i7={[ u23={[ p_19_2=1 ]
} u22={[ p_19_1=1 ]
} u20={[ p_18_0=1 ]
} u21={[ p_17_2=1 p_17_1=1 ]
} u19={[ p_16_0=1 ]
} ]
} i6={[ u18={[ p_15_2=1 p_15_1=1 ]
} u16={[ p_14_0=1 ]
} ]
} i5={[ u17={[ p_13_2=1 p_13_1=1 ]
} u15={[ p_12_0=1 ]
} ]
} i4={[ u14={[ p_11_2=1 r_11_1=1 ]
} u13={[ p_10_1=1 p_10_0=1 ]
} ]
} i3={[ u12={[ p_9_2=1 ]
} u11={[ p_8_1=1 p_8_0=1 ]
} ]
} i2={[ u10={[ p_7_2=1 ]
} u9={[ p_6_1=1 ]
} u8={[ p_6_0=1 ]
} u7={[ p_5_2=1 ]
} ]
} i1={[ u6={[ p_4_0=1 ]
} u5={[ p_3_2=1 r_2_1=1 p_4_1=1 ]
} ]
} i0={[ u4={[ p_2_0=1 ]
} u2={[ p_1_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ ]
} u0={[ p_0_0=1 ]
} ]
} ]
[ i7={[ u23={[ p_19_2=1 ]
} u22={[ p_19_1=1 ]
} u20={[ p_18_0=1 ]
} u21={[ p_17_2=1 p_17_1=1 ]
} u19={[ p_16_0=1 ]
} ]
} i6={[ u18={[ p_15_2=1 p_15_1=1 ]
} u16={[ p_14_0=1 ]
} ]
} i5={[ u17={[ p_13_2=1 p_13_1=1 ]
} u15={[ p_12_0=1 ]
} ]
} i4={[ u14={[ p_11_2=1 r_11_1=1 ]
} u13={[ p_10_1=1 p_10_0=1 ]
} ]
} i3={[ u12={[ p_9_2=1 ]
} u11={[ p_8_1=1 p_8_0=1 ]
} ]
} i2={[ u10={[ p_7_2=1 ]
} u9={[ r_6_1=1 ]
} u8={[ p_6_0=1 ]
} u7={[ p_5_2=1 p_5_1=1 ]
} ]
} i1={[ u6={[ p_4_0=1 ]
} u5={[ p_3_2=1 r_3_1=1 ]
} ]
} i0={[ u4={[ p_2_0=1 ]
} u2={[ p_2_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ p_0_1=1 ]
} u0={[ p_0_0=1 ]
} ]
} ]
[ i7={[ u23={[ p_19_2=1 ]
} u22={[ p_19_1=1 ]
} u20={[ p_18_0=1 ]
} u21={[ p_17_2=1 p_17_1=1 ]
} u19={[ p_16_0=1 ]
} ]
} i6={[ u18={[ p_15_2=1 p_15_1=1 ]
} u16={[ p_14_0=1 ]
} ]
} i5={[ u17={[ p_13_2=1 p_13_1=1 ]
} u15={[ p_12_0=1 ]
} ]
} i4={[ u14={[ p_11_2=1 r_11_1=1 ]
} u13={[ p_10_1=1 p_10_0=1 ]
} ]
} i3={[ u12={[ p_9_2=1 ]
} u11={[ p_8_1=1 p_8_0=1 ]
} ]
} i2={[ u10={[ p_7_2=1 ]
} u9={[ r_6_1=1 ]
} u8={[ p_6_0=1 ]
} u7={[ p_5_2=1 p_5_1=1 ]
} ]
} i1={[ u6={[ p_4_0=1 ]
} u5={[ p_3_2=1 p_3_1=1 ]
} ]
} i0={[ u4={[ p_2_0=1 ]
} u2={[ p_1_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ ]
} u0={[ p_0_0=1 ]
} ]
[ u4={[ p_2_0=1 ]
} u2={[ r_1_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ p_0_1=1 ]
} u0={[ p_0_0=1 ]
} ]
} ]
[ i7={[ u23={[ p_19_2=1 ]
} u22={[ p_19_1=1 ]
} u20={[ p_18_0=1 ]
} u21={[ p_17_2=1 p_17_1=1 ]
} u19={[ p_16_0=1 ]
} ]
} i6={[ u18={[ p_15_2=1 p_15_1=1 ]
} u16={[ p_14_0=1 ]
} ]
} i5={[ u17={[ p_13_2=1 p_13_1=1 ]
} u15={[ p_12_0=1 ]
} ]
} i4={[ u14={[ p_11_2=1 r_11_1=1 ]
} u13={[ p_10_1=1 p_10_0=1 ]
} ]
} i3={[ u12={[ p_9_2=1 r_8_1=1 ]
} u11={[ p_8_0=1 ]
} ]
} i2={[ u10={[ p_7_2=1 ]
} u9={[ p_7_1=1 ]
} u8={[ p_6_0=1 ]
} u7={[ p_5_2=1 p_5_1=1 ]
} ]
} i1={[ u6={[ p_4_0=1 ]
} u5={[ p_3_2=1 r_3_1=1 ]
} ]
} i0={[ u4={[ p_2_0=1 ]
} u2={[ p_2_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ p_0_1=1 ]
} u0={[ p_0_0=1 ]
} ]
} ]
[ i7={[ u23={[ p_19_2=1 ]
} u22={[ p_19_1=1 ]
} u20={[ p_18_0=1 ]
} u21={[ p_17_2=1 p_17_1=1 ]
} u19={[ p_16_0=1 ]
} ]
} i6={[ u18={[ p_15_2=1 p_15_1=1 ]
} u16={[ p_14_0=1 ]
} ]
} i5={[ u17={[ p_13_2=1 p_13_1=1 ]
} u15={[ p_12_0=1 ]
} ]
} i4={[ u14={[ p_11_2=1 r_11_1=1 ]
} u13={[ p_10_1=1 p_10_0=1 ]
} ]
} i3={[ u12={[ p_9_2=1 r_8_1=1 ]
} u11={[ p_8_0=1 ]
} ]
} i2={[ u10={[ p_7_2=1 ]
} u9={[ p_7_1=1 ]
} u8={[ p_6_0=1 ]
} u7={[ p_5_2=1 p_5_1=1 ]
} ]
} i1={[ u6={[ p_4_0=1 ]
} u5={[ p_3_2=1 p_3_1=1 ]
} ]
} i0={[ u4={[ p_2_0=1 ]
} u2={[ p_1_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ ]
} u0={[ p_0_0=1 ]
} ]
[ u4={[ p_2_0=1 ]
} u2={[ r_1_1=1 ]
} u3={[ p_1_2=1 ]
} u1={[ p_0_1=1 ]
} u0={[ p_0_0=1 ]
} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527927980400

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 8:26:17 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 8:26:17 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 8:26:17 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 90 ms
Jun 02, 2018 8:26:17 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 120 places.
Jun 02, 2018 8:26:18 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 80 transitions.
Jun 02, 2018 8:26:18 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 15 ms
Jun 02, 2018 8:26:18 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 103 ms
Jun 02, 2018 8:26:18 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 7 ms
Jun 02, 2018 8:26:18 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 80 transitions.
Jun 02, 2018 8:26:18 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 8:26:18 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 56 ms
Jun 02, 2018 8:26:18 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 40 ms
Jun 02, 2018 8:26:18 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 60 transitions.
Begin: Sat Jun 2 08:26:18 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Sat Jun 2 08:26:18 2018
network size: 99 nodes, 424 links, 120 weight
quality increased from -0.0109105 to 0.606138
end computation: Sat Jun 2 08:26:18 2018
level 1:
start computation: Sat Jun 2 08:26:18 2018
network size: 24 nodes, 112 links, 120 weight
quality increased from 0.606138 to 0.72985
end computation: Sat Jun 2 08:26:18 2018
level 2:
start computation: Sat Jun 2 08:26:18 2018
network size: 9 nodes, 25 links, 120 weight
quality increased from 0.72985 to 0.730683
end computation: Sat Jun 2 08:26:18 2018
level 3:
start computation: Sat Jun 2 08:26:18 2018
network size: 8 nodes, 22 links, 120 weight
quality increased from 0.730683 to 0.730683
end computation: Sat Jun 2 08:26:18 2018
End: Sat Jun 2 08:26:18 2018
Total duration: 0 sec
0.730683
Jun 02, 2018 8:26:18 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 59 place invariants in 16 ms
Jun 02, 2018 8:26:19 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 8:26:19 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 23 ms
Jun 02, 2018 8:26:19 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 8:26:19 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 5 ms
Jun 02, 2018 8:26:19 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 02, 2018 8:26:19 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 652ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C020"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C020.tgz
mv ResAllocation-PT-R003C020 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ResAllocation-PT-R003C020, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r141-qhx2-152673583000363"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;