Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................................................................................
/home/mcc/execution
total 400K
-rw-r--r-- 1 mcc users 5.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 30K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 31K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 33K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.3K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 153K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is QuasiCertifProtocol-PT-06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r141-qhx2-152673582600068
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-00
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-01
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-02
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-03
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-04
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-05
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-06
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-08
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-09
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-10
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-11
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-12
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-13
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-14
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527894092088

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 with value :((((((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6)>=2)&&(((((((n4_5+n4_6)+n4_3)+n4_4)+n4_1)+n4_2)+n4_0)<=((((((n1_0+n1_1)+n1_6)+n1_5)+n1_4)+n1_3)+n1_2)))||(AstopOK<=SstopAbort))||(((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=2)||(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)<=((((((n5_4+n5_5)+n5_2)+n5_3)+n5_0)+n5_1)+n5_6)))||(!(((((((n2_6+n2_5)+n2_4)+n2_3)+n2_2)+n2_1)+n2_0)<=((((((s3_0+s3_1)+s3_4)+s3_5)+s3_2)+s3_3)+s3_6)))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 with value :((AstopOK<=((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6))&&(((((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)<=((((((((((((((((((((((((((((((((((((((((((((((((n9_2_0+n9_1_0)+n9_0_0)+n9_0_1)+n9_1_1)+n9_2_1)+n9_3_1)+n9_3_0)+n9_4_0)+n9_5_0)+n9_6_0)+n9_1_2)+n9_2_2)+n9_3_2)+n9_4_2)+n9_4_1)+n9_5_1)+n9_6_1)+n9_0_2)+n9_3_3)+n9_2_3)+n9_5_3)+n9_4_3)+n9_6_2)+n9_5_2)+n9_1_3)+n9_0_3)+n9_4_4)+n9_3_4)+n9_6_4)+n9_5_4)+n9_0_4)+n9_6_3)+n9_2_4)+n9_1_4)+n9_6_5)+n9_0_6)+n9_4_5)+n9_5_5)+n9_2_5)+n9_3_5)+n9_0_5)+n9_1_5)+n9_5_6)+n9_6_6)+n9_3_6)+n9_4_6)+n9_1_6)+n9_2_6))&&(AstopOK<=((((((n4_5+n4_6)+n4_3)+n4_4)+n4_1)+n4_2)+n4_0)))||((((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6)>=2)&&(((((((s3_0+s3_1)+s3_4)+s3_5)+s3_2)+s3_3)+s3_6)>=2))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 with value :(((!(((((((Sstart_3+Sstart_2)+Sstart_1)+Sstart_0)+Sstart_6)+Sstart_5)+Sstart_4)<=((((((n2_6+n2_5)+n2_4)+n2_3)+n2_2)+n2_1)+n2_0)))||(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=1))&&(((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)>=1))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 with value :(((!(a5<=malicious_reservoir))||(!(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=1)))||(!((((((((n3_3+n3_2)+n3_1)+n3_0)+n3_6)+n3_4)+n3_5)<=a3)||(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)<=AstopOK))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 with value :((((((((((n1_0+n1_1)+n1_6)+n1_5)+n1_4)+n1_3)+n1_2)>=3)&&(malicious_reservoir<=a3))||((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=3)&&(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=2)))&&(!((((((((Sstart_3+Sstart_2)+Sstart_1)+Sstart_0)+Sstart_6)+Sstart_5)+Sstart_4)>=1)||(((((((n2_6+n2_5)+n2_4)+n2_3)+n2_2)+n2_1)+n2_0)<=AstopAbort))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 with value :(!(((((((n6_1+n6_2)+n6_0)+n6_5)+n6_6)+n6_3)+n6_4)<=((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 with value :(a5<=((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 with value :(((((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6)>=2)||((AstopOK<=SstopAbort)||(a1>=2)))&&(a3>=2))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 with value :(!((!(n9_1_2<=n8_1_5))||((n7_1_0>=2)||(n9_0_3>=3))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 with value :((!((CstopAbort<=n9_4_5)&&(n6_4>=3)))||((!(n1_5>=2))&&((malicious_reservoir<=s5_4)||(n2_6<=c1_4))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 with value :((!(n6_0<=n8_6_3))&&(n7_5_0>=2))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 with value :(((n9_0_4>=3)||((c1_4>=3)||(n7_0_2<=n8_1_2)))&&(n7_6_1<=n3_3))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 with value :((n9_0_2>=3)&&(n8_1_1>=2))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 with value :(n7_4_1<=n8_3_4)
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 with value :((!(s4_1<=n8_1_3))&&(!((n7_6_5>=2)&&(n7_2_6>=3))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 with value :(n3_2>=3)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n7_6_0 + -1'n7_6_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_5 + -1's6_4 + -1's6_6 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_5 + -1's5_4 + -1's4_0 + -1's5_6 + -1's4_2 + -1's4_1 + -1's4_4 + -1's4_3 + -1's3_0 + -1's3_1 + -1's4_5 + -1's4_6 + -1's3_4 + -1's3_5 + -1's3_2 + -1's3_3 + -1's2_1 + -1's2_2 + -1's3_6 + -1's2_0 + -1's2_5 + -1's2_6 + -1's2_3 + -1's2_4 + -1'Sstart_3 + -1'Sstart_2 + -1'Sstart_1 + -1'Sstart_0 + -1'Sstart_6 + -1'Sstart_5 + -1'Sstart_4 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_6 + -1'SstopOK_4 + -1'SstopOK_5 = -4
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n7_0_2 + -1'n7_0_4 + -1'n8_1_4 + n8_5_2 + -1'n8_5_5 + n8_1_5 = 0
invariant :n2_4 + -1'n2_2 + n1_4 + -1'n1_2 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n3_3 + n4_3 + -1'n4_4 + -1'n3_4 = 0
invariant :n7_4_2 + -1'n7_4_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_4_0 + -1'n7_4_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_3_1 + -1'n7_3_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n8_4_6 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n4_5 + -1'n4_4 + -1'n3_4 + n3_5 = 0
invariant :n7_5_3 + -1'n7_5_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n7_6_2 + -1'n7_6_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_2 + -1'n8_5_2 + n8_5_5 + -1'n8_6_5 = 0
invariant :n8_2_1 + -1'n8_1_1 + n8_1_5 + -1'n8_2_5 = 0
invariant :n7_6_1 + -1'n7_6_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_3 + -1'n5_6 + -1'n6_6 + n6_3 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :Cstart_1 + -1'Cstart_0 + -1'n8_4_0 + n8_1_1 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_4_4 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n3_0 + -1'n4_4 + n4_0 + -1'n3_4 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :Cstart_4 + -1'Cstart_0 + -1'n8_4_0 + n8_1_4 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_3_2 + -1'n8_5_2 + n8_5_5 + -1'n8_3_5 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n8_3_3 + -1'n8_0_3 + n8_0_5 + -1'n8_3_5 = 0
invariant :n7_3_2 + -1'n7_3_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_6 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_0 + -1'n8_4_0 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_1_3 + -1'n8_0_3 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n2_6 + -1'n2_2 + n1_6 + -1'n1_2 = 0
invariant :n7_6_5 + -1'n7_6_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_2 + -1'n8_5_2 + n8_5_5 + -1'n8_1_5 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n8_5_0 + -1'n8_4_0 + n8_4_5 + -1'n8_5_5 = 0
invariant :n7_0_6 + -1'n7_0_4 + -1'n8_1_4 + n8_0_6 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n8_0_0 + -1'n8_4_0 + n8_4_5 + -1'n8_0_5 = 0
invariant :n7_3_5 + -1'n7_3_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_4 + -1'n8_1_4 + n8_1_5 + -1'n8_2_5 = 0
invariant :n8_2_3 + -1'n8_0_3 + n8_0_5 + -1'n8_2_5 = 0
invariant :n7_2_3 + -1'n7_2_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_0 + -1'n8_4_0 + n8_4_5 + -1'n8_3_5 = 0
invariant :n7_5_1 + -1'n7_5_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_4_3 + -1'n7_4_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n5_5 + -1'n5_6 + n6_5 + -1'n6_6 = 0
invariant :n7_2_2 + -1'n7_2_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_2_4 + -1'n7_2_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_1_1 + -1'n7_1_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_6 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 + n8_0_6 + -1'n8_0_5 = 0
invariant :Cstart_2 + -1'Cstart_0 + -1'n8_4_0 + n8_5_2 + n8_4_5 + -1'n8_5_5 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n8_3_1 + -1'n8_1_1 + n8_1_5 + -1'n8_3_5 = 0
invariant :n7_5_5 + -1'n7_5_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_0_1 + -1'n7_0_4 + n8_1_1 + -1'n8_1_4 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_3_0 + -1'n7_3_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_6 + -1'n8_0_6 + n8_0_5 + -1'n8_2_5 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n7_0_5 + -1'n7_0_4 + -1'n8_1_4 + n8_1_5 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_0 + -1'n8_4_0 + n8_0_3 + n8_4_5 + -1'n8_0_5 = 0
invariant :n5_2 + n6_2 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_0_0 + -1'n7_0_4 + n8_4_0 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n8_5_1 + -1'n8_1_1 + -1'n8_5_5 + n8_1_5 = 0
invariant :n8_3_4 + -1'n8_1_4 + n8_1_5 + -1'n8_3_5 = 0
invariant :n8_1_6 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_4 + -1'n5_6 + -1'n6_6 + n6_4 = 0
invariant :n7_3_4 + -1'n7_3_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n8_0_4 + -1'n8_1_4 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :n2_3 + -1'n2_2 + n1_3 + -1'n1_2 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :n7_5_4 + -1'n7_5_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_2_1 + -1'n7_2_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n4_6 + -1'n4_4 + n3_6 + -1'n3_4 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + CstopAbort + CstopOK_0 + CstopOK_1 + CstopOK_6 + CstopOK_5 + CstopOK_4 + CstopOK_3 + CstopOK_2 + 7'Cstart_0 + 6'n8_4_0 + -1'n8_1_1 + -1'n8_1_4 + -1'n8_5_2 + -1'n8_0_3 + -6'n8_4_5 + n8_5_5 + -1'n8_0_6 + 2'n8_0_5 + 2'n8_1_5 = 7
invariant :n3_2 + -1'n4_4 + n4_2 + -1'n3_4 = 0
invariant :n5_1 + n6_1 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n7_1_4 + -1'n7_1_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_5 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n8_0_1 + -1'n8_1_1 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :a5 + a2 + a4 + a3 + AstopAbort + a1 + Astart + AstopOK = 1
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n5_0 + -1'n5_6 + n6_0 + -1'n6_6 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n7_1_2 + -1'n7_1_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_4 + -1'n8_1_4 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n8_6_1 + -1'n8_1_1 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n2_5 + -1'n2_2 + n1_5 + -1'n1_2 = 0
invariant :n8_2_0 + -1'n8_4_0 + n8_4_5 + -1'n8_2_5 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n7_2_5 + -1'n7_2_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_6_4 + -1'n7_6_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_6_3 + -1'n7_6_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_6 + -1'n8_0_6 + n8_0_5 + -1'n8_3_5 = 0
invariant :n8_6_6 + -1'n8_6_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_4 + -1'n8_1_4 + -1'n8_5_5 + n8_1_5 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_1_5 + -1'n7_1_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n8_5_3 + -1'n8_0_3 + -1'n8_5_5 + n8_0_5 = 0
invariant :n7_4_4 + -1'n7_4_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :n7_1_3 + -1'n7_1_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_6_3 + -1'n8_0_3 + -1'n8_6_5 + n8_0_5 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n8_2_2 + -1'n8_5_2 + n8_5_5 + -1'n8_2_5 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n8_4_3 + -1'n8_0_3 + -1'n8_4_5 + n8_0_5 = 0
invariant :n7_5_0 + -1'n7_5_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_1 + -1'n8_1_1 + -1'n8_4_5 + n8_1_5 = 0
invariant :n7_2_0 + -1'n7_2_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_5_2 + -1'n7_5_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n1_1 + -1'n2_2 + n2_1 + -1'n1_2 = 0
invariant :n3_1 + -1'n4_4 + n4_1 + -1'n3_4 = 0
invariant :n7_4_1 + -1'n7_4_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_5 + -1'n7_4_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_0_3 + -1'n7_0_4 + -1'n8_1_4 + n8_0_3 + -1'n8_0_5 + n8_1_5 = 0
invariant :n8_0_2 + -1'n8_5_2 + n8_5_5 + -1'n8_0_5 = 0
invariant :n1_0 + -1'n2_2 + n2_0 + -1'n1_2 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n8_6_0 + -1'n8_4_0 + n8_4_5 + -1'n8_6_5 = 0
invariant :s6_0 + s6_1 + s6_2 + s6_3 + s6_5 + s6_4 + SstopAbort + s6_6 + s5_1 + s5_0 + s5_3 + s5_2 + s5_5 + s5_4 + s4_0 + s5_6 + s4_2 + s4_1 + s4_4 + s4_3 + s3_0 + s3_1 + s4_5 + s4_6 + s3_4 + s3_5 + s3_2 + s3_3 + s2_1 + s2_2 + s3_6 + s2_0 + s2_5 + s2_6 + s2_3 + s2_4 + Sstart_3 + Sstart_2 + Sstart_1 + Sstart_0 + Sstart_6 + Sstart_5 + Sstart_4 + SstopOK_2 + SstopOK_3 + SstopOK_0 + SstopOK_1 + SstopOK_6 + SstopOK_4 + SstopOK_5 = 7
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n7_1_0 + -1'n7_1_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_2 + -1'n8_5_2 + -1'n8_4_5 + n8_5_5 = 0
invariant :n7_3_3 + -1'n7_3_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n7_6_0 + -1'n7_6_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_5 + -1's6_4 + -1's6_6 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_5 + -1's5_4 + -1's4_0 + -1's5_6 + -1's4_2 + -1's4_1 + -1's4_4 + -1's4_3 + -1's3_0 + -1's3_1 + -1's4_5 + -1's4_6 + -1's3_4 + -1's3_5 + -1's3_2 + -1's3_3 + -1's2_1 + -1's2_2 + -1's3_6 + -1's2_0 + -1's2_5 + -1's2_6 + -1's2_3 + -1's2_4 + -1'Sstart_3 + -1'Sstart_2 + -1'Sstart_1 + -1'Sstart_0 + -1'Sstart_6 + -1'Sstart_5 + -1'Sstart_4 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_6 + -1'SstopOK_4 + -1'SstopOK_5 = -4
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n7_0_2 + -1'n7_0_4 + -1'n8_1_4 + n8_5_2 + -1'n8_5_5 + n8_1_5 = 0
invariant :n2_4 + -1'n2_2 + n1_4 + -1'n1_2 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n3_3 + n4_3 + -1'n4_4 + -1'n3_4 = 0
invariant :n7_4_2 + -1'n7_4_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_4_0 + -1'n7_4_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_3_1 + -1'n7_3_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n8_4_6 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n4_5 + -1'n4_4 + -1'n3_4 + n3_5 = 0
invariant :n7_5_3 + -1'n7_5_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n7_6_2 + -1'n7_6_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_2 + -1'n8_5_2 + n8_5_5 + -1'n8_6_5 = 0
invariant :n8_2_1 + -1'n8_1_1 + n8_1_5 + -1'n8_2_5 = 0
invariant :n7_6_1 + -1'n7_6_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_3 + -1'n5_6 + -1'n6_6 + n6_3 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :Cstart_1 + -1'Cstart_0 + -1'n8_4_0 + n8_1_1 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_4_4 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n3_0 + -1'n4_4 + n4_0 + -1'n3_4 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :Cstart_4 + -1'Cstart_0 + -1'n8_4_0 + n8_1_4 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_3_2 + -1'n8_5_2 + n8_5_5 + -1'n8_3_5 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n8_3_3 + -1'n8_0_3 + n8_0_5 + -1'n8_3_5 = 0
invariant :n7_3_2 + -1'n7_3_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_6 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_0 + -1'n8_4_0 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_1_3 + -1'n8_0_3 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n2_6 + -1'n2_2 + n1_6 + -1'n1_2 = 0
invariant :n7_6_5 + -1'n7_6_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_2 + -1'n8_5_2 + n8_5_5 + -1'n8_1_5 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n8_5_0 + -1'n8_4_0 + n8_4_5 + -1'n8_5_5 = 0
invariant :n7_0_6 + -1'n7_0_4 + -1'n8_1_4 + n8_0_6 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n8_0_0 + -1'n8_4_0 + n8_4_5 + -1'n8_0_5 = 0
invariant :n7_3_5 + -1'n7_3_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_4 + -1'n8_1_4 + n8_1_5 + -1'n8_2_5 = 0
invariant :n8_2_3 + -1'n8_0_3 + n8_0_5 + -1'n8_2_5 = 0
invariant :n7_2_3 + -1'n7_2_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_0 + -1'n8_4_0 + n8_4_5 + -1'n8_3_5 = 0
invariant :n7_5_1 + -1'n7_5_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_4_3 + -1'n7_4_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n5_5 + -1'n5_6 + n6_5 + -1'n6_6 = 0
invariant :n7_2_2 + -1'n7_2_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_2_4 + -1'n7_2_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_1_1 + -1'n7_1_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_6 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 + n8_0_6 + -1'n8_0_5 = 0
invariant :Cstart_2 + -1'Cstart_0 + -1'n8_4_0 + n8_5_2 + n8_4_5 + -1'n8_5_5 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n8_3_1 + -1'n8_1_1 + n8_1_5 + -1'n8_3_5 = 0
invariant :n7_5_5 + -1'n7_5_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_0_1 + -1'n7_0_4 + n8_1_1 + -1'n8_1_4 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_3_0 + -1'n7_3_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_6 + -1'n8_0_6 + n8_0_5 + -1'n8_2_5 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n7_0_5 + -1'n7_0_4 + -1'n8_1_4 + n8_1_5 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_0 + -1'n8_4_0 + n8_0_3 + n8_4_5 + -1'n8_0_5 = 0
invariant :n5_2 + n6_2 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_0_0 + -1'n7_0_4 + n8_4_0 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n8_5_1 + -1'n8_1_1 + -1'n8_5_5 + n8_1_5 = 0
invariant :n8_3_4 + -1'n8_1_4 + n8_1_5 + -1'n8_3_5 = 0
invariant :n8_1_6 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_4 + -1'n5_6 + -1'n6_6 + n6_4 = 0
invariant :n7_3_4 + -1'n7_3_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n8_0_4 + -1'n8_1_4 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :n2_3 + -1'n2_2 + n1_3 + -1'n1_2 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :n7_5_4 + -1'n7_5_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_2_1 + -1'n7_2_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n4_6 + -1'n4_4 + n3_6 + -1'n3_4 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + CstopAbort + CstopOK_0 + CstopOK_1 + CstopOK_6 + CstopOK_5 + CstopOK_4 + CstopOK_3 + CstopOK_2 + 7'Cstart_0 + 6'n8_4_0 + -1'n8_1_1 + -1'n8_1_4 + -1'n8_5_2 + -1'n8_0_3 + -6'n8_4_5 + n8_5_5 + -1'n8_0_6 + 2'n8_0_5 + 2'n8_1_5 = 7
invariant :n3_2 + -1'n4_4 + n4_2 + -1'n3_4 = 0
invariant :n5_1 + n6_1 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n7_1_4 + -1'n7_1_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_5 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n8_0_1 + -1'n8_1_1 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :a5 + a2 + a4 + a3 + AstopAbort + a1 + Astart + AstopOK = 1
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n5_0 + -1'n5_6 + n6_0 + -1'n6_6 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n7_1_2 + -1'n7_1_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_4 + -1'n8_1_4 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n8_6_1 + -1'n8_1_1 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n2_5 + -1'n2_2 + n1_5 + -1'n1_2 = 0
invariant :n8_2_0 + -1'n8_4_0 + n8_4_5 + -1'n8_2_5 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n7_2_5 + -1'n7_2_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_6_4 + -1'n7_6_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_6_3 + -1'n7_6_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_6 + -1'n8_0_6 + n8_0_5 + -1'n8_3_5 = 0
invariant :n8_6_6 + -1'n8_6_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_4 + -1'n8_1_4 + -1'n8_5_5 + n8_1_5 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_1_5 + -1'n7_1_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n8_5_3 + -1'n8_0_3 + -1'n8_5_5 + n8_0_5 = 0
invariant :n7_4_4 + -1'n7_4_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :n7_1_3 + -1'n7_1_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_6_3 + -1'n8_0_3 + -1'n8_6_5 + n8_0_5 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n8_2_2 + -1'n8_5_2 + n8_5_5 + -1'n8_2_5 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n8_4_3 + -1'n8_0_3 + -1'n8_4_5 + n8_0_5 = 0
invariant :n7_5_0 + -1'n7_5_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_1 + -1'n8_1_1 + -1'n8_4_5 + n8_1_5 = 0
invariant :n7_2_0 + -1'n7_2_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_5_2 + -1'n7_5_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n1_1 + -1'n2_2 + n2_1 + -1'n1_2 = 0
invariant :n3_1 + -1'n4_4 + n4_1 + -1'n3_4 = 0
invariant :n7_4_1 + -1'n7_4_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_5 + -1'n7_4_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_0_3 + -1'n7_0_4 + -1'n8_1_4 + n8_0_3 + -1'n8_0_5 + n8_1_5 = 0
invariant :n8_0_2 + -1'n8_5_2 + n8_5_5 + -1'n8_0_5 = 0
invariant :n1_0 + -1'n2_2 + n2_0 + -1'n1_2 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n8_6_0 + -1'n8_4_0 + n8_4_5 + -1'n8_6_5 = 0
invariant :s6_0 + s6_1 + s6_2 + s6_3 + s6_5 + s6_4 + SstopAbort + s6_6 + s5_1 + s5_0 + s5_3 + s5_2 + s5_5 + s5_4 + s4_0 + s5_6 + s4_2 + s4_1 + s4_4 + s4_3 + s3_0 + s3_1 + s4_5 + s4_6 + s3_4 + s3_5 + s3_2 + s3_3 + s2_1 + s2_2 + s3_6 + s2_0 + s2_5 + s2_6 + s2_3 + s2_4 + Sstart_3 + Sstart_2 + Sstart_1 + Sstart_0 + Sstart_6 + Sstart_5 + Sstart_4 + SstopOK_2 + SstopOK_3 + SstopOK_0 + SstopOK_1 + SstopOK_6 + SstopOK_4 + SstopOK_5 = 7
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n7_1_0 + -1'n7_1_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_2 + -1'n8_5_2 + -1'n8_4_5 + n8_5_5 = 0
invariant :n7_3_3 + -1'n7_3_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol\_PT\_06\_flat\_flat,2.27196e+06,58.8827,487360,2,295765,5,2.80836e+06,6,0,1129,1.10607e+06,0
Total reachable state count : 2271960

Verifying 16 reachability properties.
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-00,358,61.1378,487540,2,2634,6,2.80836e+06,7,0,1518,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-01,658440,61.3695,487652,2,261173,7,2.80836e+06,8,0,1573,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-02,0,62.7895,487652,1,0,7,2.80836e+06,9,0,5144,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-03,1.27543e+06,64.0972,487652,2,191684,8,2.80836e+06,10,0,5273,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-04,1,64.1454,487652,2,271,9,2.80836e+06,11,0,5341,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-05,1,64.2361,487652,2,271,10,2.80836e+06,12,0,5480,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-06,1,65.053,487652,2,271,11,2.80836e+06,13,0,5516,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 does not hold.
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-07,0,65.0548,487652,1,0,11,2.80836e+06,14,0,5523,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-08,4,65.3372,487652,2,611,12,2.80836e+06,15,0,5533,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-09,0,65.6522,487652,1,0,12,2.80836e+06,16,0,5556,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-10,0,66.2413,487652,1,0,12,2.80836e+06,17,0,5559,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-11,1,66.2592,487652,2,271,13,2.80836e+06,18,0,5575,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-12,0,66.5084,487652,1,0,13,2.80836e+06,19,0,5578,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-13,1,66.5336,487652,2,271,14,2.80836e+06,20,0,5582,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-14,1,66.5464,487652,2,271,15,2.80836e+06,21,0,5593,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-15,0,66.55,487652,1,0,15,2.80836e+06,22,0,5594,1.10607e+06,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527894167073

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 11:01:35 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 11:01:35 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 11:01:35 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 110 ms
Jun 01, 2018 11:01:35 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 270 places.
Jun 01, 2018 11:01:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 116 transitions.
Jun 01, 2018 11:01:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 22 ms
Jun 01, 2018 11:01:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 167 ms
Jun 01, 2018 11:01:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 74 ms
Jun 01, 2018 11:01:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 8 ms
Jun 01, 2018 11:01:36 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 3 ms
Jun 01, 2018 11:01:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 217 ms
Jun 01, 2018 11:01:37 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Jun 01, 2018 11:01:37 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Jun 01, 2018 11:01:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 128 ms
Jun 01, 2018 11:01:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1104 ms.
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=0 took 50 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=0 took 17 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=0 took 17 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=0 took 7 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=0 took 16 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=0 took 5 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=0 took 12 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=0 took 22 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=0 took 15 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=0 took 12 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=0 took 11 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=0 took 19 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=0 took 10 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=0 took 19 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=0 took 17 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=0 took 14 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=1 took 86 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=1 took 110 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 80 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=1 took 65 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=1 took 8 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=1 took 12 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=1 took 52 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=1 took 16 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=1 took 9 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=1 took 9 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=1 took 15 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=1 took 5 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=1 took 4 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=1 took 9 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=1 took 32 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=1 took 23 ms
Jun 01, 2018 11:01:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=1 took 25 ms
Jun 01, 2018 11:01:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=2 took 344 ms
Jun 01, 2018 11:01:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=2 took 1497 ms
Jun 01, 2018 11:01:40 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 2978 ms
Jun 01, 2018 11:01:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 116 transitions.
Jun 01, 2018 11:01:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/116 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 11:01:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 11:01:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 116 transitions.
Jun 01, 2018 11:01:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 11 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 11:01:40 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 2540 ms
Jun 01, 2018 11:01:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=2 took 450 ms
Jun 01, 2018 11:01:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=2 took 376 ms
Jun 01, 2018 11:01:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=2 took 1280 ms
Jun 01, 2018 11:01:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=2 took 415 ms
Jun 01, 2018 11:01:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Jun 01, 2018 11:01:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=0 took 2530 ms
Jun 01, 2018 11:01:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=2 took 577 ms
Jun 01, 2018 11:01:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=2 took 206 ms
Jun 01, 2018 11:01:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=2 took 596 ms
Jun 01, 2018 11:01:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=2 took 514 ms
Jun 01, 2018 11:01:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=2 took 322 ms
Jun 01, 2018 11:01:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=2 took 789 ms
Jun 01, 2018 11:01:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=2 took 255 ms
Jun 01, 2018 11:01:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=2 took 301 ms
Jun 01, 2018 11:01:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=2 took 300 ms
Jun 01, 2018 11:01:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=2 took 311 ms
Jun 01, 2018 11:01:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-01
Jun 01, 2018 11:01:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(SAT) depth K=0 took 5515 ms
Jun 01, 2018 11:01:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-02
Jun 01, 2018 11:01:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(SAT) depth K=0 took 3036 ms
Jun 01, 2018 11:01:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-03
Jun 01, 2018 11:01:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(SAT) depth K=0 took 824 ms
Jun 01, 2018 11:01:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-04
Jun 01, 2018 11:01:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(SAT) depth K=0 took 698 ms
Jun 01, 2018 11:01:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-05
Jun 01, 2018 11:01:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(SAT) depth K=0 took 736 ms
Jun 01, 2018 11:01:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=3 took 7441 ms
Jun 01, 2018 11:01:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-06
Jun 01, 2018 11:01:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(SAT) depth K=0 took 1171 ms
Jun 01, 2018 11:01:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
Jun 01, 2018 11:01:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
Jun 01, 2018 11:01:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(FALSE) depth K=0 took 78 ms
Jun 01, 2018 11:01:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 116 transitions.
Jun 01, 2018 11:01:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/116) took 947 ms. Total solver calls (SAT/UNSAT): 98(98/0)
Jun 01, 2018 11:01:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-08
Jun 01, 2018 11:01:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(SAT) depth K=0 took 2227 ms
Jun 01, 2018 11:01:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/116) took 3986 ms. Total solver calls (SAT/UNSAT): 386(386/0)
Jun 01, 2018 11:02:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-09
Jun 01, 2018 11:02:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(SAT) depth K=0 took 2403 ms
Jun 01, 2018 11:02:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-10
Jun 01, 2018 11:02:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(SAT) depth K=0 took 784 ms
Jun 01, 2018 11:02:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-11
Jun 01, 2018 11:02:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(SAT) depth K=0 took 674 ms
Jun 01, 2018 11:02:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-12
Jun 01, 2018 11:02:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(SAT) depth K=0 took 1666 ms
Jun 01, 2018 11:02:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/116) took 7726 ms. Total solver calls (SAT/UNSAT): 748(748/0)
Jun 01, 2018 11:02:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-13
Jun 01, 2018 11:02:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(SAT) depth K=0 took 1140 ms
Jun 01, 2018 11:02:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-14
Jun 01, 2018 11:02:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(SAT) depth K=0 took 1380 ms
Jun 01, 2018 11:02:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-15
Jun 01, 2018 11:02:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(SAT) depth K=0 took 690 ms
Jun 01, 2018 11:02:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=3 took 12444 ms
Jun 01, 2018 11:02:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/116) took 11276 ms. Total solver calls (SAT/UNSAT): 1070(1070/0)
Jun 01, 2018 11:02:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/116) took 14371 ms. Total solver calls (SAT/UNSAT): 1349(1319/30)
Jun 01, 2018 11:02:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/116) took 17611 ms. Total solver calls (SAT/UNSAT): 1649(1613/36)
Jun 01, 2018 11:02:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/116) took 21327 ms. Total solver calls (SAT/UNSAT): 1994(1958/36)
Jun 01, 2018 11:02:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Jun 01, 2018 11:02:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=1 took 13355 ms
Jun 01, 2018 11:02:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/116) took 24924 ms. Total solver calls (SAT/UNSAT): 2314(2278/36)
Jun 01, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/116) took 28218 ms. Total solver calls (SAT/UNSAT): 2609(2573/36)
Jun 01, 2018 11:02:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=3 took 19353 ms
Jun 01, 2018 11:02:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/116) took 31691 ms. Total solver calls (SAT/UNSAT): 2930(2894/36)
Jun 01, 2018 11:02:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=3 took 3910 ms
Jun 01, 2018 11:02:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/116) took 34932 ms. Total solver calls (SAT/UNSAT): 3215(3179/36)
Jun 01, 2018 11:02:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/116) took 38276 ms. Total solver calls (SAT/UNSAT): 3496(3460/36)
Jun 01, 2018 11:02:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/116) took 41643 ms. Total solver calls (SAT/UNSAT): 3767(3717/50)
Jun 01, 2018 11:02:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/116) took 45009 ms. Total solver calls (SAT/UNSAT): 3965(3915/50)
Jun 01, 2018 11:02:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/116) took 48076 ms. Total solver calls (SAT/UNSAT): 4187(4137/50)
Jun 01, 2018 11:02:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Jun 01, 2018 11:02:45 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (declare-fun s0 () (Array Int Int)) with error
Jun 01, 2018 11:02:45 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (assert (= (+ (select s0 9) (select s0 10) (select s0 11) (select s0 12) (select s0 13) (select s0 14) (select s0 16) (select s0 17) (select s0 18) (select s0 19) (select s0 20) (select s0 21) (select s0 22) (select s0 23) (select s0 24) (select s0 25) (select s0 26) (select s0 27) (select s0 28) (select s0 29) (select s0 30) (select s0 31) (select s0 32) (select s0 33) (select s0 34) (select s0 35) (select s0 36) (select s0 37) (select s0 38) (select s0 39) (select s0 40) (select s0 41) (select s0 42) (select s0 43) (select s0 44) (select s0 45) (select s0 46) (select s0 47) (select s0 48) (select s0 50) (select s0 51) (select s0 52) (select s0 262) (select s0 263) (select s0 264) (select s0 265) (select s0 266) (select s0 268) (select s0 269) -4) (+ (select s0 0) (select s0 8)))) with error (error "Failed to assert expression: java.io.IOException: Stream closed (= (+ (select s0 9) (select s0 10) (select s0 11) (select s0 12) (select s0 13) (select s0 14) (select s0 16) (select s0 17) (select s0 18) (select s0 19) (select s0 20) (select s0 21) (select s0 22) (select s0 23) (select s0 24) (select s0 25) (select s0 26) (select s0 27) (select s0 28) (select s0 29) (select s0 30) (select s0 31) (select s0 32) (select s0 33) (select s0 34) (select s0 35) (select s0 36) (select s0 37) (select s0 38) (select s0 39) (select s0 40) (select s0 41) (select s0 42) (select s0 43) (select s0 44) (select s0 45) (select s0 46) (select s0 47) (select s0 48) (select s0 50) (select s0 51) (select s0 52) (select s0 262) (select s0 263) (select s0 264) (select s0 265) (select s0 266) (select s0 268) (select s0 269) -4) (+ (select s0 0) (select s0 8)))")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 11:02:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 SMT depth 3
Jun 01, 2018 11:02:45 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
[(declare-fun s0 () (Array Int Int)), (assert (= (+ (select s0 9) (select s0 10) (select s0 11) (select s0 12) (select s0 13) (select s0 14) (select s0 16) (select s0 17) (select s0 18) (select s0 19) (select s0 20) (select s0 21) (select s0 22) (select s0 23) (select s0 24) (select s0 25) (select s0 26) (select s0 27) (select s0 28) (select s0 29) (select s0 30) (select s0 31) (select s0 32) (select s0 33) (select s0 34) (select s0 35) (select s0 36) (select s0 37) (select s0 38) (select s0 39) (select s0 40) (select s0 41) (select s0 42) (select s0 43) (select s0 44) (select s0 45) (select s0 46) (select s0 47) (select s0 48) (select s0 50) (select s0 51) (select s0 52) (select s0 262) (select s0 263) (select s0 264) (select s0 265) (select s0 266) (select s0 268) (select s0 269) -4) (+ (select s0 0) (select s0 8)))), (assert (= 7 (+ (select s0 9) (select s0 10) (select s0 11) (select s0 12) (select s0 13) (select s0 14) (select s0 15) (select s0 16) (select s0 17) (select s0 18) (select s0 19) (select s0 20) (select s0 21) (select s0 22) (select s0 23) (select s0 24) (select s0 25) (select s0 26) (select s0 27) (select s0 28) (select s0 29) (select s0 30) (select s0 31) (select s0 32) (select s0 33) (select s0 34) (select s0 35) (select s0 36) (select s0 37) (select s0 38) (select s0 39) (select s0 40) (select s0 41) (select s0 42) (select s0 43) (select s0 44) (select s0 45) (select s0 46) (select s0 47) (select s0 48) (select s0 50) (select s0 51) (select s0 52) (select s0 262) (select s0 263) (select s0 264) (select s0 265) (select s0 266) (select s0 268) (select s0 269)))), (assert (>= (select s0 28) 1)), (assert (>= (select s0 0) 0)), (assert (>= (select s0 8) 0)), (assert (>= (select s0 9) 0)), (assert (>= (select s0 10) 0)), (assert (>= (select s0 11) 0)), (assert (>= (select s0 12) 0)), (assert (>= (select s0 13) 0)), (assert (>= (select s0 14) 0)), (assert (>= (select s0 15) 0)), (assert (>= (select s0 16) 0)), (assert (>= (select s0 17) 0)), (assert (>= (select s0 18) 0)), (assert (>= (select s0 19) 0)), (assert (>= (select s0 20) 0)), (assert (>= (select s0 21) 0)), (assert (>= (select s0 22) 0)), (assert (>= (select s0 23) 0)), (assert (>= (select s0 24) 0)), (assert (>= (select s0 25) 0)), (assert (>= (select s0 26) 0)), (assert (>= (select s0 27) 0)), (assert (>= (select s0 28) 0)), (assert (>= (select s0 29) 0)), (assert (>= (select s0 30) 0)), (assert (>= (select s0 31) 0)), (assert (>= (select s0 32) 0)), (assert (>= (select s0 33) 0)), (assert (>= (select s0 34) 0)), (assert (>= (select s0 35) 0)), (assert (>= (select s0 36) 0)), (assert (>= (select s0 37) 0)), (assert (>= (select s0 38) 0)), (assert (>= (select s0 39) 0)), (assert (>= (select s0 40) 0)), (assert (>= (select s0 41) 0)), (assert (>= (select s0 42) 0)), (assert (>= (select s0 43) 0)), (assert (>= (select s0 44) 0)), (assert (>= (select s0 45) 0)), (assert (>= (select s0 46) 0)), (assert (>= (select s0 47) 0)), (assert (>= (select s0 48) 0)), (assert (>= (select s0 50) 0)), (assert (>= (select s0 51) 0)), (assert (>= (select s0 52) 0)), (assert (>= (select s0 262) 0)), (assert (>= (select s0 263) 0)), (assert (>= (select s0 264) 0)), (assert (>= (select s0 265) 0)), (assert (>= (select s0 266) 0)), (assert (>= (select s0 268) 0)), (assert (>= (select s0 269) 0))]
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout when executing script :
org.smtlib.impl.Script@354d82fd
java.lang.RuntimeException: SMT solver raised an exception or timeout when executing script :
org.smtlib.impl.Script@354d82fd
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:448)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 11:02:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 K-induction depth 1
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Jun 01, 2018 11:02:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
Jun 01, 2018 11:02:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
Jun 01, 2018 11:02:45 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 1/ 16 properties. Interrupting other analysis methods.
Jun 01, 2018 11:02:45 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 69160ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-06.tgz
mv QuasiCertifProtocol-PT-06 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is QuasiCertifProtocol-PT-06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r141-qhx2-152673582600068"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;