Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...........................
/home/mcc/execution
total 268K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 103K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ResAllocation-PT-R003C015, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-qhx2-152673582200357
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-00
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-01
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-02
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-03
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-04
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-05
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-06
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-07
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-08
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-09
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-10
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-11
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-12
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-13
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-14
FORMULA_NAME ResAllocation-PT-R003C015-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1527860272689

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityFireability.pnml.gal, -t, CGAL, -reachable-file, ReachabilityFireability.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityFireability.pnml.gal -t CGAL -reachable-file ReachabilityFireability.prop --nowitness
Loading property file ReachabilityFireability.prop.
Read [reachable] property : ResAllocation-PT-R003C015-ReachabilityFireability-00 with value :((!(((((p_12_0>=1)&&(r_12_1>=1))&&(r_11_1>=1))&&(p_3_0>=1))||(r_0_0>=1)))&&(((!(((r_13_0>=1)&&(p_13_1>=1))&&(r_12_0>=1)))&&((p_8_2>=1)&&(p_11_0>=1)))&&((r_14_0>=1)&&(r_13_0>=1))))
Read [invariant] property : ResAllocation-PT-R003C015-ReachabilityFireability-01 with value :((((!((r_6_0>=1)&&(r_5_0>=1)))&&(!(((r_7_0>=1)&&(p_7_1>=1))&&(r_6_0>=1))))||(!((p_8_2>=1)&&((r_12_0>=1)&&(r_11_0>=1)))))||((!(((r_10_0>=1)&&(r_9_0>=1))&&(p_4_2>=1)))||((r_10_0>=1)&&(r_9_0>=1))))
Read [reachable] property : ResAllocation-PT-R003C015-ReachabilityFireability-02 with value :(!(((!(((p_2_1>=1)&&(r_2_2>=1))&&(r_1_2>=1)))||(!(((p_14_1>=1)&&(r_14_2>=1))&&(r_13_2>=1))))||(r_0_0>=1)))
Read [invariant] property : ResAllocation-PT-R003C015-ReachabilityFireability-03 with value :((((r_11_0>=1)&&(p_11_1>=1))&&(r_10_0>=1))||(!(((r_11_0>=1)&&(p_11_1>=1))&&(r_10_0>=1))))
Read [invariant] property : ResAllocation-PT-R003C015-ReachabilityFireability-04 with value :(((((r_3_2>=1)&&(r_2_2>=1))&&(((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1)))||(((((r_3_0>=1)&&(p_3_1>=1))&&(r_2_0>=1))&&((r_13_2>=1)&&(r_12_2>=1)))&&((((p_6_0>=1)&&(r_6_1>=1))&&(r_5_1>=1))||((r_8_0>=1)&&(r_7_0>=1)))))||(!((((r_3_2>=1)&&(r_2_2>=1))&&(p_13_0>=1))&&((((r_9_0>=1)&&(p_9_1>=1))&&(r_8_0>=1))||(((r_7_0>=1)&&(p_7_1>=1))&&(r_6_0>=1))))))
Read [invariant] property : ResAllocation-PT-R003C015-ReachabilityFireability-05 with value :((!(p_6_2>=1))||(!(((p_10_1>=1)&&(r_10_2>=1))&&(r_9_2>=1))))
Read [reachable] property : ResAllocation-PT-R003C015-ReachabilityFireability-06 with value :((!(p_12_2>=1))&&((((r_5_1>=1)&&(p_5_2>=1))&&(r_4_1>=1))&&(p_6_2>=1)))
Read [reachable] property : ResAllocation-PT-R003C015-ReachabilityFireability-07 with value :(((p_7_0>=1)&&(((((p_2_0>=1)&&(r_2_1>=1))&&(r_1_1>=1))||(((p_2_1>=1)&&(r_2_2>=1))&&(r_1_2>=1)))||(((r_5_1>=1)&&(p_5_2>=1))&&(r_4_1>=1))))&&(!((!((r_14_0>=1)&&(r_13_0>=1)))||((r_1_2>=1)&&(r_0_2>=1)))))
Read [reachable] property : ResAllocation-PT-R003C015-ReachabilityFireability-08 with value :((p_13_0>=1)&&(!((!(((r_11_1>=1)&&(p_11_2>=1))&&(r_10_1>=1)))||(((r_1_2>=1)&&(r_0_2>=1))&&(((r_7_0>=1)&&(p_7_1>=1))&&(r_6_0>=1))))))
Read [invariant] property : ResAllocation-PT-R003C015-ReachabilityFireability-09 with value :(((p_11_0>=1)||(((((r_9_1>=1)&&(p_9_2>=1))&&(r_8_1>=1))&&((r_9_2>=1)&&(r_8_2>=1)))||((r_5_2>=1)&&(r_4_2>=1))))||(((!((r_12_0>=1)&&(r_11_0>=1)))||(!(p_11_0>=1)))||(((r_5_1>=1)&&(p_5_2>=1))&&(r_4_1>=1))))
Read [invariant] property : ResAllocation-PT-R003C015-ReachabilityFireability-10 with value :(((!(p_7_0>=1))||((((r_2_0>=1)&&(r_1_0>=1))&&(p_2_2>=1))||(!(((p_2_0>=1)&&(r_2_1>=1))&&(r_1_1>=1)))))||((!((((p_4_0>=1)&&(r_4_1>=1))&&(r_3_1>=1))&&(((r_9_1>=1)&&(p_9_2>=1))&&(r_8_1>=1))))||(!((p_10_2>=1)||((r_13_2>=1)&&(r_12_2>=1))))))
Read [invariant] property : ResAllocation-PT-R003C015-ReachabilityFireability-11 with value :(!((p_5_0>=1)&&(p_6_2>=1)))
Read [reachable] property : ResAllocation-PT-R003C015-ReachabilityFireability-12 with value :((p_2_2>=1)&&(!((((r_3_2>=1)&&(r_2_2>=1))&&((r_1_2>=1)&&(r_0_2>=1)))||(!(((r_7_1>=1)&&(p_7_2>=1))&&(r_6_1>=1))))))
Read [reachable] property : ResAllocation-PT-R003C015-ReachabilityFireability-13 with value :(!((!((p_9_0>=1)&&(((p_2_1>=1)&&(r_2_2>=1))&&(r_1_2>=1))))||(((r_9_0>=1)&&(p_9_1>=1))&&(r_8_0>=1))))
Read [invariant] property : ResAllocation-PT-R003C015-ReachabilityFireability-14 with value :((!((((r_10_0>=1)&&(r_9_0>=1))||(((p_8_1>=1)&&(r_8_2>=1))&&(r_7_2>=1)))&&((r_0_0>=1)&&(p_9_0>=1))))||((!((r_2_0>=1)&&(r_1_0>=1)))||(((((p_2_0>=1)&&(r_2_1>=1))&&(r_1_1>=1))&&((r_3_2>=1)&&(r_2_2>=1)))&&(!(((r_13_0>=1)&&(p_13_1>=1))&&(r_12_0>=1))))))
Read [reachable] property : ResAllocation-PT-R003C015-ReachabilityFireability-15 with value :((p_9_0>=1)&&((((((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1))||(((r_7_1>=1)&&(p_7_2>=1))&&(r_6_1>=1)))&&(((r_12_0>=1)&&(r_11_0>=1))&&(((p_6_0>=1)&&(r_6_1>=1))&&(r_5_1>=1))))&&(!((p_8_2>=1)||((p_0_0>=1)&&(r_0_1>=1))))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 60 rows 90 cols
invariant :p_6_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_12_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_0_2 + r_0_2 + -1'r_1_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_5_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_14_0 + r_14_0 = 1
invariant :p_13_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_4_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_7_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_13_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_2_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_3_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_1_0 + r_1_0 + -1'r_2_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_6_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_10_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_7_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_11_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_10_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_3_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_12_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_2_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_9_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_1_1 + r_1_1 + -1'r_2_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_3_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-01 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
invariant :p_9_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_10_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_4_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_14_1 + r_14_1 = 1
invariant :p_14_2 + r_14_2 = 1
invariant :p_2_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_1_2 + r_1_2 + -1'r_2_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_11_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_13_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_7_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_6_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_8_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_5_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_8_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_5_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_0_0 + r_0_0 + -1'r_1_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_9_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_12_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_11_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_4_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_8_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-03 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-09 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation\_PT\_R003C015\_flat\_flat,5.78878e+08,0.961127,20580,2,6564,5,76517,6,0,423,106011,0
Total reachable state count : 578878464

Verifying 16 reachability properties.
Reachability property ResAllocation-PT-R003C015-ReachabilityFireability-00 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-00,838656,0.968744,20732,2,747,6,76517,7,0,453,106011,0
Invariant property ResAllocation-PT-R003C015-ReachabilityFireability-01 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-01,0,0.973236,20788,1,0,6,76517,8,0,473,106011,0
Reachability property ResAllocation-PT-R003C015-ReachabilityFireability-02 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-02,32768,0.977503,20852,2,153,7,76517,9,0,485,106011,0
Invariant property ResAllocation-PT-R003C015-ReachabilityFireability-03 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-03,0,0.986501,20852,1,0,7,76517,10,0,494,106011,0
Invariant property ResAllocation-PT-R003C015-ReachabilityFireability-04 does not hold.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-04,12416,0.997226,20852,2,781,8,76517,11,0,542,106011,0
Invariant property ResAllocation-PT-R003C015-ReachabilityFireability-05 does not hold.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-05,2048,0.998651,20852,2,131,9,76517,12,0,547,106011,0
Reachability property ResAllocation-PT-R003C015-ReachabilityFireability-06 does not hold.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R003C015-ReachabilityFireability-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-06,0,1.00247,20852,1,0,9,76517,13,0,550,106011,0
Reachability property ResAllocation-PT-R003C015-ReachabilityFireability-07 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-07,1.52653e+06,1.02167,20852,2,2145,10,76517,14,0,574,106011,0
Reachability property ResAllocation-PT-R003C015-ReachabilityFireability-08 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-08,24576,1.02512,20852,2,143,11,76517,15,0,590,106011,0
Invariant property ResAllocation-PT-R003C015-ReachabilityFireability-09 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-09,0,1.03125,20852,1,0,11,76517,16,0,615,106011,0
Invariant property ResAllocation-PT-R003C015-ReachabilityFireability-10 does not hold.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-10,94080,1.03987,20852,2,275,12,76517,17,0,639,106011,0
Invariant property ResAllocation-PT-R003C015-ReachabilityFireability-11 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-11,0,1.0424,20852,1,0,12,76517,18,0,640,106011,0
Reachability property ResAllocation-PT-R003C015-ReachabilityFireability-12 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-12,6.17677e+06,1.04633,20852,2,1093,13,76517,19,0,651,106011,0
Reachability property ResAllocation-PT-R003C015-ReachabilityFireability-13 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-13,505856,1.05529,20852,2,589,14,76517,20,0,661,106011,0
Invariant property ResAllocation-PT-R003C015-ReachabilityFireability-14 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-14,0,1.06786,20852,1,0,14,76517,21,0,687,106011,0
Reachability property ResAllocation-PT-R003C015-ReachabilityFireability-15 is true.
FORMULA ResAllocation-PT-R003C015-ReachabilityFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C015-ReachabilityFireability-15,370240,1.08168,20852,2,1357,15,76517,22,0,708,106011,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527860284893

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 1:38:01 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 1:38:01 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 1:38:01 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 91 ms
Jun 01, 2018 1:38:01 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 90 places.
Jun 01, 2018 1:38:01 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 60 transitions.
Jun 01, 2018 1:38:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 16 ms
Jun 01, 2018 1:38:01 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 133 ms
Jun 01, 2018 1:38:02 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 43 ms
Jun 01, 2018 1:38:02 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityFireability.pnml.gal : 4 ms
Jun 01, 2018 1:38:02 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityFireability.prop : 31 ms
Jun 01, 2018 1:38:02 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 76 ms
Jun 01, 2018 1:38:02 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 60 transitions.
Jun 01, 2018 1:38:02 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 60 transitions.
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable ResAllocation-PT-R003C015-ReachabilityFireability-01
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 45 place invariants in 71 ms
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable ResAllocation-PT-R003C015-ReachabilityFireability-03
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable ResAllocation-PT-R003C015-ReachabilityFireability-09
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 3 / 16 in 1098 ms.
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C015-ReachabilityFireability-00(UNSAT) depth K=0 took 63 ms
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C015-ReachabilityFireability-02(UNSAT) depth K=0 took 16 ms
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C015-ReachabilityFireability-04(UNSAT) depth K=0 took 9 ms
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C015-ReachabilityFireability-05(UNSAT) depth K=0 took 9 ms
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 60 transitions.
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C015-ReachabilityFireability-06(UNSAT) depth K=0 took 32 ms
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C015-ReachabilityFireability-07(UNSAT) depth K=0 took 12 ms
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C015-ReachabilityFireability-08(UNSAT) depth K=0 took 24 ms
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Jun 01, 2018 1:38:03 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (declare-fun s () (Array Int (Array Int Int))) with error
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
Jun 01, 2018 1:38:03 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun _enabledsrc__0 ((src (Array Int Int))) Bool (>= (select src 1) 1)) with error (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Exception in thread "Thread-8" java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: Error when declaring system variables to SMT solver.(error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.init(NextBMCSolver.java:93)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:59)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying ResAllocation-PT-R003C015-ReachabilityFireability-10 SMT depth 0
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 0
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 0
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 3/ 16 properties. Interrupting other analysis methods.
Jun 01, 2018 1:38:03 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1166ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C015"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C015.tgz
mv ResAllocation-PT-R003C015 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ResAllocation-PT-R003C015, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-qhx2-152673582200357"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;