Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.........................................................
/home/mcc/execution
total 400K
-rw-r--r-- 1 mcc users 5.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 30K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 31K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 33K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.3K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 153K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is QuasiCertifProtocol-PT-06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-qhx2-152673581900068
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-00
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-01
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-02
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-03
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-04
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-05
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-06
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-08
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-09
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-10
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-11
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-12
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-13
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-14
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527822410426

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 with value :((((((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6)>=2)&&(((((((n4_5+n4_6)+n4_3)+n4_4)+n4_1)+n4_2)+n4_0)<=((((((n1_0+n1_1)+n1_6)+n1_5)+n1_4)+n1_3)+n1_2)))||(AstopOK<=SstopAbort))||(((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=2)||(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)<=((((((n5_4+n5_5)+n5_2)+n5_3)+n5_0)+n5_1)+n5_6)))||(!(((((((n2_6+n2_5)+n2_4)+n2_3)+n2_2)+n2_1)+n2_0)<=((((((s3_0+s3_1)+s3_4)+s3_5)+s3_2)+s3_3)+s3_6)))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 with value :((AstopOK<=((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6))&&(((((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)<=((((((((((((((((((((((((((((((((((((((((((((((((n9_2_0+n9_1_0)+n9_0_0)+n9_0_1)+n9_1_1)+n9_2_1)+n9_3_1)+n9_3_0)+n9_4_0)+n9_5_0)+n9_6_0)+n9_1_2)+n9_2_2)+n9_3_2)+n9_4_2)+n9_4_1)+n9_5_1)+n9_6_1)+n9_0_2)+n9_3_3)+n9_2_3)+n9_5_3)+n9_4_3)+n9_6_2)+n9_5_2)+n9_1_3)+n9_0_3)+n9_4_4)+n9_3_4)+n9_6_4)+n9_5_4)+n9_0_4)+n9_6_3)+n9_2_4)+n9_1_4)+n9_6_5)+n9_0_6)+n9_4_5)+n9_5_5)+n9_2_5)+n9_3_5)+n9_0_5)+n9_1_5)+n9_5_6)+n9_6_6)+n9_3_6)+n9_4_6)+n9_1_6)+n9_2_6))&&(AstopOK<=((((((n4_5+n4_6)+n4_3)+n4_4)+n4_1)+n4_2)+n4_0)))||((((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6)>=2)&&(((((((s3_0+s3_1)+s3_4)+s3_5)+s3_2)+s3_3)+s3_6)>=2))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 with value :(((!(((((((Sstart_3+Sstart_2)+Sstart_1)+Sstart_0)+Sstart_6)+Sstart_5)+Sstart_4)<=((((((n2_6+n2_5)+n2_4)+n2_3)+n2_2)+n2_1)+n2_0)))||(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=1))&&(((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)>=1))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 with value :(((!(a5<=malicious_reservoir))||(!(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=1)))||(!((((((((n3_3+n3_2)+n3_1)+n3_0)+n3_6)+n3_4)+n3_5)<=a3)||(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)<=AstopOK))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 with value :((((((((((n1_0+n1_1)+n1_6)+n1_5)+n1_4)+n1_3)+n1_2)>=3)&&(malicious_reservoir<=a3))||((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=3)&&(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)>=2)))&&(!((((((((Sstart_3+Sstart_2)+Sstart_1)+Sstart_0)+Sstart_6)+Sstart_5)+Sstart_4)>=1)||(((((((n2_6+n2_5)+n2_4)+n2_3)+n2_2)+n2_1)+n2_0)<=AstopAbort))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 with value :(!(((((((n6_1+n6_2)+n6_0)+n6_5)+n6_6)+n6_3)+n6_4)<=((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 with value :(a5<=((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 with value :(((((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6)>=2)||((AstopOK<=SstopAbort)||(a1>=2)))&&(a3>=2))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 with value :(!((!(n9_1_2<=n8_1_5))||((n7_1_0>=2)||(n9_0_3>=3))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 with value :((!((CstopAbort<=n9_4_5)&&(n6_4>=3)))||((!(n1_5>=2))&&((malicious_reservoir<=s5_4)||(n2_6<=c1_4))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 with value :((!(n6_0<=n8_6_3))&&(n7_5_0>=2))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 with value :(((n9_0_4>=3)||((c1_4>=3)||(n7_0_2<=n8_1_2)))&&(n7_6_1<=n3_3))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 with value :((n9_0_2>=3)&&(n8_1_1>=2))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 with value :(n7_4_1<=n8_3_4)
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 with value :((!(s4_1<=n8_1_3))&&(!((n7_6_5>=2)&&(n7_2_6>=3))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 with value :(n3_2>=3)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n7_6_0 + -1'n7_6_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_5 + -1's6_4 + -1's6_6 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_5 + -1's5_4 + -1's4_0 + -1's5_6 + -1's4_2 + -1's4_1 + -1's4_4 + -1's4_3 + -1's3_0 + -1's3_1 + -1's4_5 + -1's4_6 + -1's3_4 + -1's3_5 + -1's3_2 + -1's3_3 + -1's2_1 + -1's2_2 + -1's3_6 + -1's2_0 + -1's2_5 + -1's2_6 + -1's2_3 + -1's2_4 + -1'Sstart_3 + -1'Sstart_2 + -1'Sstart_1 + -1'Sstart_0 + -1'Sstart_6 + -1'Sstart_5 + -1'Sstart_4 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_6 + -1'SstopOK_4 + -1'SstopOK_5 = -4
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n7_0_2 + -1'n7_0_4 + -1'n8_1_4 + n8_5_2 + -1'n8_5_5 + n8_1_5 = 0
invariant :n2_4 + -1'n2_2 + n1_4 + -1'n1_2 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n3_3 + n4_3 + -1'n4_4 + -1'n3_4 = 0
invariant :n7_4_2 + -1'n7_4_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_4_0 + -1'n7_4_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_3_1 + -1'n7_3_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n8_4_6 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n4_5 + -1'n4_4 + -1'n3_4 + n3_5 = 0
invariant :n7_5_3 + -1'n7_5_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n7_6_2 + -1'n7_6_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_2 + -1'n8_5_2 + n8_5_5 + -1'n8_6_5 = 0
invariant :n8_2_1 + -1'n8_1_1 + n8_1_5 + -1'n8_2_5 = 0
invariant :n7_6_1 + -1'n7_6_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_3 + -1'n5_6 + -1'n6_6 + n6_3 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :Cstart_1 + -1'Cstart_0 + -1'n8_4_0 + n8_1_1 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_4_4 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n3_0 + -1'n4_4 + n4_0 + -1'n3_4 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :Cstart_4 + -1'Cstart_0 + -1'n8_4_0 + n8_1_4 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_3_2 + -1'n8_5_2 + n8_5_5 + -1'n8_3_5 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n8_3_3 + -1'n8_0_3 + n8_0_5 + -1'n8_3_5 = 0
invariant :n7_3_2 + -1'n7_3_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_6 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_0 + -1'n8_4_0 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_1_3 + -1'n8_0_3 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n2_6 + -1'n2_2 + n1_6 + -1'n1_2 = 0
invariant :n7_6_5 + -1'n7_6_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_2 + -1'n8_5_2 + n8_5_5 + -1'n8_1_5 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n8_5_0 + -1'n8_4_0 + n8_4_5 + -1'n8_5_5 = 0
invariant :n7_0_6 + -1'n7_0_4 + -1'n8_1_4 + n8_0_6 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n8_0_0 + -1'n8_4_0 + n8_4_5 + -1'n8_0_5 = 0
invariant :n7_3_5 + -1'n7_3_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_4 + -1'n8_1_4 + n8_1_5 + -1'n8_2_5 = 0
invariant :n8_2_3 + -1'n8_0_3 + n8_0_5 + -1'n8_2_5 = 0
invariant :n7_2_3 + -1'n7_2_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_0 + -1'n8_4_0 + n8_4_5 + -1'n8_3_5 = 0
invariant :n7_5_1 + -1'n7_5_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_4_3 + -1'n7_4_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n5_5 + -1'n5_6 + n6_5 + -1'n6_6 = 0
invariant :n7_2_2 + -1'n7_2_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_2_4 + -1'n7_2_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_1_1 + -1'n7_1_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_6 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 + n8_0_6 + -1'n8_0_5 = 0
invariant :Cstart_2 + -1'Cstart_0 + -1'n8_4_0 + n8_5_2 + n8_4_5 + -1'n8_5_5 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n8_3_1 + -1'n8_1_1 + n8_1_5 + -1'n8_3_5 = 0
invariant :n7_5_5 + -1'n7_5_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_0_1 + -1'n7_0_4 + n8_1_1 + -1'n8_1_4 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_3_0 + -1'n7_3_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_6 + -1'n8_0_6 + n8_0_5 + -1'n8_2_5 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n7_0_5 + -1'n7_0_4 + -1'n8_1_4 + n8_1_5 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_0 + -1'n8_4_0 + n8_0_3 + n8_4_5 + -1'n8_0_5 = 0
invariant :n5_2 + n6_2 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_0_0 + -1'n7_0_4 + n8_4_0 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n8_5_1 + -1'n8_1_1 + -1'n8_5_5 + n8_1_5 = 0
invariant :n8_3_4 + -1'n8_1_4 + n8_1_5 + -1'n8_3_5 = 0
invariant :n8_1_6 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_4 + -1'n5_6 + -1'n6_6 + n6_4 = 0
invariant :n7_3_4 + -1'n7_3_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n8_0_4 + -1'n8_1_4 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :n2_3 + -1'n2_2 + n1_3 + -1'n1_2 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :n7_5_4 + -1'n7_5_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_2_1 + -1'n7_2_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n4_6 + -1'n4_4 + n3_6 + -1'n3_4 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + CstopAbort + CstopOK_0 + CstopOK_1 + CstopOK_6 + CstopOK_5 + CstopOK_4 + CstopOK_3 + CstopOK_2 + 7'Cstart_0 + 6'n8_4_0 + -1'n8_1_1 + -1'n8_1_4 + -1'n8_5_2 + -1'n8_0_3 + -6'n8_4_5 + n8_5_5 + -1'n8_0_6 + 2'n8_0_5 + 2'n8_1_5 = 7
invariant :n3_2 + -1'n4_4 + n4_2 + -1'n3_4 = 0
invariant :n5_1 + n6_1 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n7_1_4 + -1'n7_1_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_5 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n8_0_1 + -1'n8_1_1 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :a5 + a2 + a4 + a3 + AstopAbort + a1 + Astart + AstopOK = 1
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n5_0 + -1'n5_6 + n6_0 + -1'n6_6 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n7_1_2 + -1'n7_1_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_4 + -1'n8_1_4 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n8_6_1 + -1'n8_1_1 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n2_5 + -1'n2_2 + n1_5 + -1'n1_2 = 0
invariant :n8_2_0 + -1'n8_4_0 + n8_4_5 + -1'n8_2_5 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n7_2_5 + -1'n7_2_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_6_4 + -1'n7_6_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_6_3 + -1'n7_6_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_6 + -1'n8_0_6 + n8_0_5 + -1'n8_3_5 = 0
invariant :n8_6_6 + -1'n8_6_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_4 + -1'n8_1_4 + -1'n8_5_5 + n8_1_5 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_1_5 + -1'n7_1_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n8_5_3 + -1'n8_0_3 + -1'n8_5_5 + n8_0_5 = 0
invariant :n7_4_4 + -1'n7_4_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :n7_1_3 + -1'n7_1_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_6_3 + -1'n8_0_3 + -1'n8_6_5 + n8_0_5 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n8_2_2 + -1'n8_5_2 + n8_5_5 + -1'n8_2_5 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n8_4_3 + -1'n8_0_3 + -1'n8_4_5 + n8_0_5 = 0
invariant :n7_5_0 + -1'n7_5_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_1 + -1'n8_1_1 + -1'n8_4_5 + n8_1_5 = 0
invariant :n7_2_0 + -1'n7_2_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_5_2 + -1'n7_5_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n1_1 + -1'n2_2 + n2_1 + -1'n1_2 = 0
invariant :n3_1 + -1'n4_4 + n4_1 + -1'n3_4 = 0
invariant :n7_4_1 + -1'n7_4_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_5 + -1'n7_4_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_0_3 + -1'n7_0_4 + -1'n8_1_4 + n8_0_3 + -1'n8_0_5 + n8_1_5 = 0
invariant :n8_0_2 + -1'n8_5_2 + n8_5_5 + -1'n8_0_5 = 0
invariant :n1_0 + -1'n2_2 + n2_0 + -1'n1_2 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n8_6_0 + -1'n8_4_0 + n8_4_5 + -1'n8_6_5 = 0
invariant :s6_0 + s6_1 + s6_2 + s6_3 + s6_5 + s6_4 + SstopAbort + s6_6 + s5_1 + s5_0 + s5_3 + s5_2 + s5_5 + s5_4 + s4_0 + s5_6 + s4_2 + s4_1 + s4_4 + s4_3 + s3_0 + s3_1 + s4_5 + s4_6 + s3_4 + s3_5 + s3_2 + s3_3 + s2_1 + s2_2 + s3_6 + s2_0 + s2_5 + s2_6 + s2_3 + s2_4 + Sstart_3 + Sstart_2 + Sstart_1 + Sstart_0 + Sstart_6 + Sstart_5 + Sstart_4 + SstopOK_2 + SstopOK_3 + SstopOK_0 + SstopOK_1 + SstopOK_6 + SstopOK_4 + SstopOK_5 = 7
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n7_1_0 + -1'n7_1_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_2 + -1'n8_5_2 + -1'n8_4_5 + n8_5_5 = 0
invariant :n7_3_3 + -1'n7_3_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n7_6_0 + -1'n7_6_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_5 + -1's6_4 + -1's6_6 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_5 + -1's5_4 + -1's4_0 + -1's5_6 + -1's4_2 + -1's4_1 + -1's4_4 + -1's4_3 + -1's3_0 + -1's3_1 + -1's4_5 + -1's4_6 + -1's3_4 + -1's3_5 + -1's3_2 + -1's3_3 + -1's2_1 + -1's2_2 + -1's3_6 + -1's2_0 + -1's2_5 + -1's2_6 + -1's2_3 + -1's2_4 + -1'Sstart_3 + -1'Sstart_2 + -1'Sstart_1 + -1'Sstart_0 + -1'Sstart_6 + -1'Sstart_5 + -1'Sstart_4 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_6 + -1'SstopOK_4 + -1'SstopOK_5 = -4
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n7_0_2 + -1'n7_0_4 + -1'n8_1_4 + n8_5_2 + -1'n8_5_5 + n8_1_5 = 0
invariant :n2_4 + -1'n2_2 + n1_4 + -1'n1_2 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n3_3 + n4_3 + -1'n4_4 + -1'n3_4 = 0
invariant :n7_4_2 + -1'n7_4_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_4_0 + -1'n7_4_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_3_1 + -1'n7_3_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n8_4_6 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n4_5 + -1'n4_4 + -1'n3_4 + n3_5 = 0
invariant :n7_5_3 + -1'n7_5_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n7_6_2 + -1'n7_6_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_2 + -1'n8_5_2 + n8_5_5 + -1'n8_6_5 = 0
invariant :n8_2_1 + -1'n8_1_1 + n8_1_5 + -1'n8_2_5 = 0
invariant :n7_6_1 + -1'n7_6_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_3 + -1'n5_6 + -1'n6_6 + n6_3 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :Cstart_1 + -1'Cstart_0 + -1'n8_4_0 + n8_1_1 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_4_4 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n3_0 + -1'n4_4 + n4_0 + -1'n3_4 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :Cstart_4 + -1'Cstart_0 + -1'n8_4_0 + n8_1_4 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_3_2 + -1'n8_5_2 + n8_5_5 + -1'n8_3_5 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n8_3_3 + -1'n8_0_3 + n8_0_5 + -1'n8_3_5 = 0
invariant :n7_3_2 + -1'n7_3_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_6 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_0 + -1'n8_4_0 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_1_3 + -1'n8_0_3 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n2_6 + -1'n2_2 + n1_6 + -1'n1_2 = 0
invariant :n7_6_5 + -1'n7_6_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_2 + -1'n8_5_2 + n8_5_5 + -1'n8_1_5 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n8_5_0 + -1'n8_4_0 + n8_4_5 + -1'n8_5_5 = 0
invariant :n7_0_6 + -1'n7_0_4 + -1'n8_1_4 + n8_0_6 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n8_0_0 + -1'n8_4_0 + n8_4_5 + -1'n8_0_5 = 0
invariant :n7_3_5 + -1'n7_3_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_4 + -1'n8_1_4 + n8_1_5 + -1'n8_2_5 = 0
invariant :n8_2_3 + -1'n8_0_3 + n8_0_5 + -1'n8_2_5 = 0
invariant :n7_2_3 + -1'n7_2_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_0 + -1'n8_4_0 + n8_4_5 + -1'n8_3_5 = 0
invariant :n7_5_1 + -1'n7_5_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_4_3 + -1'n7_4_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n5_5 + -1'n5_6 + n6_5 + -1'n6_6 = 0
invariant :n7_2_2 + -1'n7_2_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_2_4 + -1'n7_2_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_1_1 + -1'n7_1_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_6 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 + n8_0_6 + -1'n8_0_5 = 0
invariant :Cstart_2 + -1'Cstart_0 + -1'n8_4_0 + n8_5_2 + n8_4_5 + -1'n8_5_5 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n8_3_1 + -1'n8_1_1 + n8_1_5 + -1'n8_3_5 = 0
invariant :n7_5_5 + -1'n7_5_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_0_1 + -1'n7_0_4 + n8_1_1 + -1'n8_1_4 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_3_0 + -1'n7_3_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_6 + -1'n8_0_6 + n8_0_5 + -1'n8_2_5 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n7_0_5 + -1'n7_0_4 + -1'n8_1_4 + n8_1_5 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_0 + -1'n8_4_0 + n8_0_3 + n8_4_5 + -1'n8_0_5 = 0
invariant :n5_2 + n6_2 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_0_0 + -1'n7_0_4 + n8_4_0 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n8_5_1 + -1'n8_1_1 + -1'n8_5_5 + n8_1_5 = 0
invariant :n8_3_4 + -1'n8_1_4 + n8_1_5 + -1'n8_3_5 = 0
invariant :n8_1_6 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_4 + -1'n5_6 + -1'n6_6 + n6_4 = 0
invariant :n7_3_4 + -1'n7_3_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n8_0_4 + -1'n8_1_4 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :n2_3 + -1'n2_2 + n1_3 + -1'n1_2 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :n7_5_4 + -1'n7_5_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_2_1 + -1'n7_2_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n4_6 + -1'n4_4 + n3_6 + -1'n3_4 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + CstopAbort + CstopOK_0 + CstopOK_1 + CstopOK_6 + CstopOK_5 + CstopOK_4 + CstopOK_3 + CstopOK_2 + 7'Cstart_0 + 6'n8_4_0 + -1'n8_1_1 + -1'n8_1_4 + -1'n8_5_2 + -1'n8_0_3 + -6'n8_4_5 + n8_5_5 + -1'n8_0_6 + 2'n8_0_5 + 2'n8_1_5 = 7
invariant :n3_2 + -1'n4_4 + n4_2 + -1'n3_4 = 0
invariant :n5_1 + n6_1 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n7_1_4 + -1'n7_1_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_5 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n8_0_1 + -1'n8_1_1 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :a5 + a2 + a4 + a3 + AstopAbort + a1 + Astart + AstopOK = 1
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n5_0 + -1'n5_6 + n6_0 + -1'n6_6 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n7_1_2 + -1'n7_1_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_4 + -1'n8_1_4 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n8_6_1 + -1'n8_1_1 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n2_5 + -1'n2_2 + n1_5 + -1'n1_2 = 0
invariant :n8_2_0 + -1'n8_4_0 + n8_4_5 + -1'n8_2_5 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n7_2_5 + -1'n7_2_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_6_4 + -1'n7_6_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_6_3 + -1'n7_6_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_6 + -1'n8_0_6 + n8_0_5 + -1'n8_3_5 = 0
invariant :n8_6_6 + -1'n8_6_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_4 + -1'n8_1_4 + -1'n8_5_5 + n8_1_5 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_1_5 + -1'n7_1_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n8_5_3 + -1'n8_0_3 + -1'n8_5_5 + n8_0_5 = 0
invariant :n7_4_4 + -1'n7_4_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :n7_1_3 + -1'n7_1_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_6_3 + -1'n8_0_3 + -1'n8_6_5 + n8_0_5 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n8_2_2 + -1'n8_5_2 + n8_5_5 + -1'n8_2_5 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n8_4_3 + -1'n8_0_3 + -1'n8_4_5 + n8_0_5 = 0
invariant :n7_5_0 + -1'n7_5_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_1 + -1'n8_1_1 + -1'n8_4_5 + n8_1_5 = 0
invariant :n7_2_0 + -1'n7_2_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_5_2 + -1'n7_5_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n1_1 + -1'n2_2 + n2_1 + -1'n1_2 = 0
invariant :n3_1 + -1'n4_4 + n4_1 + -1'n3_4 = 0
invariant :n7_4_1 + -1'n7_4_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_5 + -1'n7_4_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_0_3 + -1'n7_0_4 + -1'n8_1_4 + n8_0_3 + -1'n8_0_5 + n8_1_5 = 0
invariant :n8_0_2 + -1'n8_5_2 + n8_5_5 + -1'n8_0_5 = 0
invariant :n1_0 + -1'n2_2 + n2_0 + -1'n1_2 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n8_6_0 + -1'n8_4_0 + n8_4_5 + -1'n8_6_5 = 0
invariant :s6_0 + s6_1 + s6_2 + s6_3 + s6_5 + s6_4 + SstopAbort + s6_6 + s5_1 + s5_0 + s5_3 + s5_2 + s5_5 + s5_4 + s4_0 + s5_6 + s4_2 + s4_1 + s4_4 + s4_3 + s3_0 + s3_1 + s4_5 + s4_6 + s3_4 + s3_5 + s3_2 + s3_3 + s2_1 + s2_2 + s3_6 + s2_0 + s2_5 + s2_6 + s2_3 + s2_4 + Sstart_3 + Sstart_2 + Sstart_1 + Sstart_0 + Sstart_6 + Sstart_5 + Sstart_4 + SstopOK_2 + SstopOK_3 + SstopOK_0 + SstopOK_1 + SstopOK_6 + SstopOK_4 + SstopOK_5 = 7
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n7_1_0 + -1'n7_1_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_2 + -1'n8_5_2 + -1'n8_4_5 + n8_5_5 = 0
invariant :n7_3_3 + -1'n7_3_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol\_PT\_06\_flat\_flat,2.27196e+06,51.0147,487132,2,295765,5,2.80836e+06,6,0,1129,1.10607e+06,0
Total reachable state count : 2271960

Verifying 16 reachability properties.
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-00,358,52.7966,487308,2,2634,6,2.80836e+06,7,0,1533,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-01,658440,53.0457,487428,2,261173,7,2.80836e+06,8,0,1588,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-02,0,54.9427,487428,1,0,7,2.80836e+06,9,0,5112,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-03,1.27543e+06,56.483,487428,2,191684,8,2.80836e+06,10,0,5241,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-04,70,56.562,487428,2,494,9,2.80836e+06,11,0,5369,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-05,1,56.6493,487428,2,271,10,2.80836e+06,12,0,5508,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-06,1,57.4544,487428,2,271,11,2.80836e+06,13,0,5544,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 does not hold.
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-07,0,57.4995,487428,1,0,11,2.80836e+06,14,0,5556,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-08,4,57.9544,487428,2,611,12,2.80836e+06,15,0,5566,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-09,0,57.9578,487428,1,0,12,2.80836e+06,16,0,5583,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-10,0,59.1782,487428,1,0,12,2.80836e+06,17,0,5591,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-11,1,59.2124,487428,2,271,13,2.80836e+06,18,0,5608,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-12,0,59.4866,487428,1,0,13,2.80836e+06,19,0,5611,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-13,1,59.5125,487428,2,271,14,2.80836e+06,20,0,5615,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-14,1,59.5256,487428,2,271,15,2.80836e+06,21,0,5626,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-15,0,59.5297,487428,1,0,15,2.80836e+06,22,0,5627,1.10607e+06,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527822476690

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 3:06:53 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 3:06:53 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 3:06:53 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 94 ms
Jun 01, 2018 3:06:53 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 270 places.
Jun 01, 2018 3:06:53 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 116 transitions.
Jun 01, 2018 3:06:53 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 20 ms
Jun 01, 2018 3:06:53 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 129 ms
Jun 01, 2018 3:06:53 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 100 ms
Jun 01, 2018 3:06:53 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 36 ms
Jun 01, 2018 3:06:53 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 124 ms
Jun 01, 2018 3:06:53 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 7 ms
Jun 01, 2018 3:06:54 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Jun 01, 2018 3:06:54 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Jun 01, 2018 3:06:54 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 196 ms
Jun 01, 2018 3:06:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1012 ms.
Jun 01, 2018 3:06:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=0 took 17 ms
Jun 01, 2018 3:06:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=0 took 7 ms
Jun 01, 2018 3:06:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=0 took 10 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=0 took 12 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=0 took 9 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=0 took 12 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=0 took 11 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=0 took 8 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=0 took 7 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=0 took 11 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=0 took 25 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=0 took 14 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=0 took 14 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=0 took 11 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=0 took 13 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=0 took 14 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=1 took 96 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 46 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=1 took 188 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=1 took 35 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=1 took 8 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=1 took 15 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=1 took 40 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=1 took 12 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=1 took 7 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=1 took 20 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=1 took 16 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=1 took 10 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=1 took 17 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=1 took 15 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=1 took 15 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=1 took 12 ms
Jun 01, 2018 3:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=1 took 14 ms
Jun 01, 2018 3:06:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=2 took 659 ms
Jun 01, 2018 3:06:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=2 took 1337 ms
Jun 01, 2018 3:06:57 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 3195 ms
Jun 01, 2018 3:06:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 116 transitions.
Jun 01, 2018 3:06:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/116 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:06:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 13 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:06:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 116 transitions.
Jun 01, 2018 3:06:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 12 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:06:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=2 took 534 ms
Jun 01, 2018 3:06:58 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 3159 ms
Jun 01, 2018 3:06:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=2 took 791 ms
Jun 01, 2018 3:06:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=2 took 737 ms
Jun 01, 2018 3:07:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=2 took 405 ms
Jun 01, 2018 3:07:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Jun 01, 2018 3:07:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=0 took 2106 ms
Jun 01, 2018 3:07:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-01
Jun 01, 2018 3:07:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(SAT) depth K=0 took 1037 ms
Jun 01, 2018 3:07:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=2 took 1628 ms
Jun 01, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=2 took 284 ms
Jun 01, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-02
Jun 01, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(SAT) depth K=0 took 1243 ms
Jun 01, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=2 took 895 ms
Jun 01, 2018 3:07:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=2 took 325 ms
Jun 01, 2018 3:07:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=2 took 346 ms
Jun 01, 2018 3:07:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-03
Jun 01, 2018 3:07:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(SAT) depth K=0 took 848 ms
Jun 01, 2018 3:07:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=2 took 416 ms
Jun 01, 2018 3:07:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=2 took 274 ms
Jun 01, 2018 3:07:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-04
Jun 01, 2018 3:07:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(SAT) depth K=0 took 840 ms
Jun 01, 2018 3:07:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=2 took 290 ms
Jun 01, 2018 3:07:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=2 took 286 ms
Jun 01, 2018 3:07:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-05
Jun 01, 2018 3:07:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(SAT) depth K=0 took 805 ms
Jun 01, 2018 3:07:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=2 took 480 ms
Jun 01, 2018 3:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-06
Jun 01, 2018 3:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(SAT) depth K=0 took 1743 ms
Jun 01, 2018 3:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
Jun 01, 2018 3:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
Jun 01, 2018 3:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(FALSE) depth K=0 took 79 ms
Jun 01, 2018 3:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-08
Jun 01, 2018 3:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(SAT) depth K=0 took 676 ms
Jun 01, 2018 3:07:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-09
Jun 01, 2018 3:07:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(SAT) depth K=0 took 729 ms
Jun 01, 2018 3:07:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-10
Jun 01, 2018 3:07:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(SAT) depth K=0 took 689 ms
Jun 01, 2018 3:07:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-11
Jun 01, 2018 3:07:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(SAT) depth K=0 took 1128 ms
Jun 01, 2018 3:07:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-12
Jun 01, 2018 3:07:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(SAT) depth K=0 took 710 ms
Jun 01, 2018 3:07:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-13
Jun 01, 2018 3:07:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(SAT) depth K=0 took 834 ms
Jun 01, 2018 3:07:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-14
Jun 01, 2018 3:07:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(SAT) depth K=0 took 786 ms
Jun 01, 2018 3:07:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 116 transitions.
Jun 01, 2018 3:07:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/116) took 1029 ms. Total solver calls (SAT/UNSAT): 98(98/0)
Jun 01, 2018 3:07:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=3 took 9191 ms
Jun 01, 2018 3:07:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-15
Jun 01, 2018 3:07:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(SAT) depth K=0 took 2239 ms
Jun 01, 2018 3:07:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/116) took 4110 ms. Total solver calls (SAT/UNSAT): 386(386/0)
Jun 01, 2018 3:07:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/116) took 7689 ms. Total solver calls (SAT/UNSAT): 748(748/0)
Jun 01, 2018 3:07:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/116) took 11158 ms. Total solver calls (SAT/UNSAT): 1070(1070/0)
Jun 01, 2018 3:07:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/116) took 14228 ms. Total solver calls (SAT/UNSAT): 1349(1319/30)
Jun 01, 2018 3:07:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=3 took 12883 ms
Jun 01, 2018 3:07:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=3 took 2269 ms
Jun 01, 2018 3:07:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/116) took 17506 ms. Total solver calls (SAT/UNSAT): 1649(1613/36)
Jun 01, 2018 3:07:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/116) took 20556 ms. Total solver calls (SAT/UNSAT): 1927(1891/36)
Jun 01, 2018 3:07:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Jun 01, 2018 3:07:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=1 took 21047 ms
Jun 01, 2018 3:07:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/116) took 24098 ms. Total solver calls (SAT/UNSAT): 2252(2216/36)
Jun 01, 2018 3:07:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/116) took 27314 ms. Total solver calls (SAT/UNSAT): 2552(2516/36)
Jun 01, 2018 3:07:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=3 took 13887 ms
Jun 01, 2018 3:07:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/116) took 30909 ms. Total solver calls (SAT/UNSAT): 2879(2843/36)
Jun 01, 2018 3:07:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/116) took 34141 ms. Total solver calls (SAT/UNSAT): 3170(3134/36)
Jun 01, 2018 3:07:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/116) took 37516 ms. Total solver calls (SAT/UNSAT): 3457(3421/36)
Jun 01, 2018 3:07:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-01
Jun 01, 2018 3:07:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(SAT) depth K=1 took 16989 ms
Jun 01, 2018 3:07:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=3 took 9526 ms
Jun 01, 2018 3:07:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/116) took 40569 ms. Total solver calls (SAT/UNSAT): 3732(3684/48)
Jun 01, 2018 3:07:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 3:07:55 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 3:07:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 SMT depth 3
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Jun 01, 2018 3:07:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
Jun 01, 2018 3:07:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 3:07:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 K-induction depth 1
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Jun 01, 2018 3:07:55 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 1/ 16 properties. Interrupting other analysis methods.
Jun 01, 2018 3:07:55 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 61537ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-06.tgz
mv QuasiCertifProtocol-PT-06 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is QuasiCertifProtocol-PT-06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-qhx2-152673581900068"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;