fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r117-csrt-152666477100572
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for Peterson-PT-4

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15742.920 3600000.00 12231265.00 896.40 FTTFTTTT?F?FFTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 40K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 114K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 82K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 20K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 56K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 32K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 37K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 29K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 100K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 511K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is Peterson-PT-4, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666477100572
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-00
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-01
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-02
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-03
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-04
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-05
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-06
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-07
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-08
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-09
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-10
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-11
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-12
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-13
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-14
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527263654359

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-00 with value :(((((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4))&&(!((((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)>=1)))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-01 with value :(((((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)>=1)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_3_1_0+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_4_0_0)+TestAlone_3_0_0)+TestAlone_2_0_0)+TestAlone_1_0_0)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_0_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_3_0_1)+TestAlone_4_3_0)+TestAlone_0_0_1)+TestAlone_2_3_0)+TestAlone_3_3_0)+TestAlone_4_2_0)+TestAlone_1_3_0)+TestAlone_2_2_0)+TestAlone_3_2_0)+TestAlone_4_1_0)+TestAlone_1_2_0)+TestAlone_3_2_2)+TestAlone_1_2_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_3_2)+TestAlone_1_3_2)+TestAlone_0_3_2)+TestAlone_4_2_2)+TestAlone_2_0_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_3_2)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_0_1_3)+TestAlone_4_0_3)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_1_1)+TestAlone_0_2_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_4_2_1)+TestAlone_0_3_1)+TestAlone_1_0_2)+TestAlone_3_0_2)+TestAlone_4_3_1)+TestAlone_0_0_2)+TestAlone_1_1_2)+TestAlone_3_1_2)+TestAlone_4_0_2)+TestAlone_0_1_2)+TestAlone_0_2_4)+TestAlone_3_1_4)+TestAlone_2_2_4)+TestAlone_1_2_4)+TestAlone_0_3_4)+TestAlone_3_2_4)+TestAlone_2_3_4)+TestAlone_1_3_4)+TestAlone_3_3_4)+TestAlone_4_1_3)+TestAlone_0_2_3)+TestAlone_1_2_3)+TestAlone_2_2_3)+TestAlone_4_2_3)+TestAlone_0_3_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_3_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_2_1_4)>=1)&&(((((CS_0+CS_1)+CS_3)+CS_2)+CS_4)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)))||(!((((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)))))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-02 with value :((((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)>=3)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-03 with value :((((((((((((((((((((TestTurn_0_0+TestTurn_2_0)+TestTurn_1_0)+TestTurn_4_0)+TestTurn_3_0)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_3_2)+TestTurn_4_2)+TestTurn_1_2)+TestTurn_2_2)+TestTurn_4_1)+TestTurn_0_2)+TestTurn_2_1)+TestTurn_3_1)+TestTurn_4_3)+TestTurn_2_3)+TestTurn_3_3)+TestTurn_0_3)+TestTurn_1_3)<=(((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-04 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)>=2)&&(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)>=3)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)<=(((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-05 with value :(!((((((((((((((((((((((TestTurn_0_0+TestTurn_2_0)+TestTurn_1_0)+TestTurn_4_0)+TestTurn_3_0)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_3_2)+TestTurn_4_2)+TestTurn_1_2)+TestTurn_2_2)+TestTurn_4_1)+TestTurn_0_2)+TestTurn_2_1)+TestTurn_3_1)+TestTurn_4_3)+TestTurn_2_3)+TestTurn_3_3)+TestTurn_0_3)+TestTurn_1_3)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4))||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)<=(((((((((((((((((((AskForSection_3_3+AskForSection_4_3)+AskForSection_1_3)+AskForSection_2_3)+AskForSection_4_2)+AskForSection_0_3)+AskForSection_2_2)+AskForSection_3_2)+AskForSection_0_2)+AskForSection_1_2)+AskForSection_3_1)+AskForSection_4_1)+AskForSection_1_1)+AskForSection_2_1)+AskForSection_0_1)+AskForSection_4_0)+AskForSection_3_0)+AskForSection_2_0)+AskForSection_1_0)+AskForSection_0_0)))||(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)>=2)||((((((((((((((((((((TestTurn_0_0+TestTurn_2_0)+TestTurn_1_0)+TestTurn_4_0)+TestTurn_3_0)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_3_2)+TestTurn_4_2)+TestTurn_1_2)+TestTurn_2_2)+TestTurn_4_1)+TestTurn_0_2)+TestTurn_2_1)+TestTurn_3_1)+TestTurn_4_3)+TestTurn_2_3)+TestTurn_3_3)+TestTurn_0_3)+TestTurn_1_3)>=3))))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-06 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_3_1_0+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_4_0_0)+TestAlone_3_0_0)+TestAlone_2_0_0)+TestAlone_1_0_0)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_0_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_3_0_1)+TestAlone_4_3_0)+TestAlone_0_0_1)+TestAlone_2_3_0)+TestAlone_3_3_0)+TestAlone_4_2_0)+TestAlone_1_3_0)+TestAlone_2_2_0)+TestAlone_3_2_0)+TestAlone_4_1_0)+TestAlone_1_2_0)+TestAlone_3_2_2)+TestAlone_1_2_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_3_2)+TestAlone_1_3_2)+TestAlone_0_3_2)+TestAlone_4_2_2)+TestAlone_2_0_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_3_2)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_0_1_3)+TestAlone_4_0_3)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_1_1)+TestAlone_0_2_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_4_2_1)+TestAlone_0_3_1)+TestAlone_1_0_2)+TestAlone_3_0_2)+TestAlone_4_3_1)+TestAlone_0_0_2)+TestAlone_1_1_2)+TestAlone_3_1_2)+TestAlone_4_0_2)+TestAlone_0_1_2)+TestAlone_0_2_4)+TestAlone_3_1_4)+TestAlone_2_2_4)+TestAlone_1_2_4)+TestAlone_0_3_4)+TestAlone_3_2_4)+TestAlone_2_3_4)+TestAlone_1_3_4)+TestAlone_3_3_4)+TestAlone_4_1_3)+TestAlone_0_2_3)+TestAlone_1_2_3)+TestAlone_2_2_3)+TestAlone_4_2_3)+TestAlone_0_3_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_3_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_2_1_4)>=2)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)))&&(!((((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3)<=(((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)))))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-07 with value :(((!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)))&&(!((((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3)>=2)))||(((((CS_0+CS_1)+CS_3)+CS_2)+CS_4)<=(((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-08 with value :(!((!(TestAlone_4_1_3>=3))&&((IsEndLoop_2_3_3>=2)||(TestAlone_1_3_4<=TestIdentity_3_2_1))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-09 with value :(TestAlone_0_1_4>=3)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-10 with value :(IsEndLoop_1_1_4<=IsEndLoop_2_1_1)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-11 with value :(TestAlone_1_2_0<=TestAlone_3_0_1)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-12 with value :((IsEndLoop_0_2_1>=2)||(TestAlone_2_0_3<=BeginLoop_4_2_1))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-13 with value :(!(IsEndLoop_1_1_0>=3))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-14 with value :(!((!(IsEndLoop_1_0_0<=AskForSection_3_0))&&((BeginLoop_0_1_2>=3)&&(EndTurn_3_3>=2))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-15 with value :((!((TestIdentity_4_0_1<=TestTurn_3_2)&&(TestIdentity_2_1_1<=IsEndLoop_1_0_3)))&&((TestAlone_4_0_3<=IsEndLoop_2_1_3)&&((TestIdentity_2_0_2<=BeginLoop_3_3_2)||(AskForSection_1_2>=1))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 630
// Phase 1: matrix 630 rows 480 cols
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_0_4 + IsEndLoop_0_2_4 + IsEndLoop_0_1_4 + EndTurn_0_0 + IsEndLoop_0_3_4 + EndTurn_0_1 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_3_0 + BeginLoop_0_0_1 + BeginLoop_0_1_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_3_1 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_0_2 + BeginLoop_0_1_3 + BeginLoop_0_3_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_3_3 + BeginLoop_0_2_3 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_1_4 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_2_2 + TestAlone_0_3_2 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_4 + TestAlone_0_3_4 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_2_3 + TestAlone_0_3_3 + TestAlone_0_0_4 + TestAlone_0_1_4 + TestIdentity_0_2_0 + TestIdentity_0_1_0 + TestIdentity_0_3_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestTurn_0_3 + TestIdentity_0_0_2 + TestIdentity_0_3_1 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_1_1 + TestIdentity_0_0_1 + TestIdentity_0_2_1 + TestIdentity_0_3_3 + TestIdentity_0_0_4 + TestIdentity_0_2_3 + TestIdentity_0_0_3 + TestIdentity_0_1_3 + TestIdentity_0_3_2 + TestIdentity_0_3_4 + TestIdentity_0_1_4 + TestIdentity_0_2_4 + CS_0 + AskForSection_0_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_1_3 + IsEndLoop_1_0_3 + IsEndLoop_1_3_3 + IsEndLoop_1_2_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_1_4 + IsEndLoop_1_3_4 + EndTurn_1_1 + EndTurn_1_0 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_0_0 + BeginLoop_1_3_0 + BeginLoop_1_1_0 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_3_2 + BeginLoop_1_0_4 + BeginLoop_1_3_3 + BeginLoop_1_2_3 + BeginLoop_1_3_4 + BeginLoop_1_2_4 + BeginLoop_1_1_4 + TestAlone_1_1_0 + TestAlone_1_0_0 + TestAlone_1_3_0 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_3_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_4 + TestAlone_1_3_4 + TestTurn_1_0 + TestTurn_1_1 + TestAlone_1_2_3 + TestAlone_1_3_3 + TestAlone_1_0_4 + TestAlone_1_1_4 + TestIdentity_1_1_0 + TestIdentity_1_3_0 + TestIdentity_1_2_0 + TestTurn_1_2 + TestIdentity_1_0_0 + TestTurn_1_3 + TestIdentity_1_0_2 + TestIdentity_1_3_1 + TestIdentity_1_1_2 + TestIdentity_1_1_1 + TestIdentity_1_0_1 + TestIdentity_1_2_1 + TestIdentity_1_3_3 + TestIdentity_1_0_4 + TestIdentity_1_2_3 + TestIdentity_1_0_3 + TestIdentity_1_1_3 + TestIdentity_1_2_2 + TestIdentity_1_3_2 + TestIdentity_1_2_4 + TestIdentity_1_3_4 + TestIdentity_1_1_4 + CS_1 + AskForSection_1_3 + AskForSection_1_2 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :Turn_0_2 + Turn_0_3 + Turn_0_0 + Turn_0_1 + Turn_0_4 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_1_2 + Turn_1_3 + Turn_1_0 + Turn_1_1 + Turn_1_4 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_0_2 + IsEndLoop_4_1_2 + IsEndLoop_4_2_2 + IsEndLoop_4_3_2 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_1_3 + IsEndLoop_4_0_4 + IsEndLoop_4_3_3 + IsEndLoop_4_1_4 + IsEndLoop_4_3_4 + IsEndLoop_4_2_4 + EndTurn_4_0 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_0_0 + EndTurn_4_3 + BeginLoop_4_2_0 + BeginLoop_4_3_0 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_2_1 + BeginLoop_4_0_1 + BeginLoop_4_1_2 + BeginLoop_4_3_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_0_4 + BeginLoop_4_3_3 + BeginLoop_4_2_3 + BeginLoop_4_1_3 + BeginLoop_4_3_4 + BeginLoop_4_2_4 + BeginLoop_4_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_3_0 + TestAlone_4_2_0 + TestAlone_4_1_0 + TestAlone_4_1_2 + TestAlone_4_2_2 + TestAlone_4_3_2 + TestAlone_4_0_3 + TestAlone_4_1_1 + TestAlone_4_2_1 + TestAlone_4_3_1 + TestAlone_4_0_2 + TestTurn_4_0 + TestAlone_4_1_3 + TestAlone_4_2_3 + TestAlone_4_3_3 + TestIdentity_4_1_0 + TestIdentity_4_0_0 + TestIdentity_4_2_0 + TestTurn_4_2 + TestTurn_4_1 + TestTurn_4_3 + TestIdentity_4_3_1 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_0_1 + TestIdentity_4_3_0 + TestIdentity_4_2_1 + TestIdentity_4_1_1 + TestIdentity_4_3_3 + TestIdentity_4_1_3 + TestIdentity_4_2_3 + TestIdentity_4_3_2 + TestIdentity_4_0_3 + TestIdentity_4_2_2 + TestIdentity_4_3_4 + TestIdentity_4_2_4 + TestIdentity_4_0_4 + TestIdentity_4_1_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_1 + AskForSection_4_0 + Idle_4 + CS_4 = 1
invariant :WantSection_4_T + Idle_4 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_3_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_0_4 + IsEndLoop_3_3_3 + IsEndLoop_3_1_4 + IsEndLoop_3_3_4 + IsEndLoop_3_2_4 + EndTurn_3_1 + EndTurn_3_0 + EndTurn_3_2 + BeginLoop_3_0_0 + EndTurn_3_3 + BeginLoop_3_2_0 + BeginLoop_3_3_0 + BeginLoop_3_1_0 + BeginLoop_3_2_1 + BeginLoop_3_0_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_3_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_0_4 + BeginLoop_3_3_3 + BeginLoop_3_2_3 + BeginLoop_3_3_4 + BeginLoop_3_2_4 + BeginLoop_3_1_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_1_1 + TestAlone_3_0_1 + TestAlone_3_3_0 + TestAlone_3_2_0 + TestAlone_3_2_2 + TestAlone_3_3_2 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_2_4 + TestAlone_3_3_4 + TestTurn_3_0 + TestAlone_3_0_4 + TestIdentity_3_1_0 + TestIdentity_3_0_0 + TestIdentity_3_3_0 + TestIdentity_3_2_0 + TestTurn_3_2 + TestTurn_3_1 + TestTurn_3_3 + TestIdentity_3_3_1 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_0_1 + TestIdentity_3_2_1 + TestIdentity_3_1_1 + TestIdentity_3_3_3 + TestIdentity_3_1_3 + TestIdentity_3_2_3 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_3_2 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + TestIdentity_3_0_4 + TestIdentity_3_1_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_2_2 + Turn_2_3 + Turn_2_0 + Turn_2_1 + Turn_2_4 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_1_3 + IsEndLoop_2_0_3 + IsEndLoop_2_2_3 + IsEndLoop_2_0_4 + IsEndLoop_2_3_3 + IsEndLoop_2_2_4 + IsEndLoop_2_1_4 + IsEndLoop_2_3_4 + EndTurn_2_1 + EndTurn_2_0 + EndTurn_2_2 + BeginLoop_2_0_0 + EndTurn_2_3 + BeginLoop_2_3_0 + BeginLoop_2_1_0 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_0_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_3_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_3_2 + BeginLoop_2_0_4 + BeginLoop_2_3_3 + BeginLoop_2_2_3 + BeginLoop_2_3_4 + BeginLoop_2_2_4 + BeginLoop_2_1_4 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestAlone_2_3_0 + TestAlone_2_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_2_4 + TestAlone_2_3_4 + TestTurn_2_0 + TestAlone_2_2_3 + TestAlone_2_3_3 + TestAlone_2_0_4 + TestAlone_2_1_4 + TestIdentity_2_1_0 + TestIdentity_2_3_0 + TestIdentity_2_2_0 + TestTurn_2_2 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_3 + TestIdentity_2_0_2 + TestIdentity_2_3_1 + TestIdentity_2_1_2 + TestIdentity_2_0_1 + TestIdentity_2_2_1 + TestIdentity_2_1_1 + TestIdentity_2_3_3 + TestIdentity_2_0_4 + TestIdentity_2_1_3 + TestIdentity_2_2_3 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_3_2 + TestIdentity_2_2_4 + TestIdentity_2_3_4 + TestIdentity_2_1_4 + AskForSection_2_3 + AskForSection_2_2 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 = 1
invariant :Turn_3_1 + Turn_3_2 + Turn_3_0 + Turn_3_4 + Turn_3_3 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 630
// Phase 1: matrix 630 rows 480 cols
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_0_4 + IsEndLoop_0_2_4 + IsEndLoop_0_1_4 + EndTurn_0_0 + IsEndLoop_0_3_4 + EndTurn_0_1 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_3_0 + BeginLoop_0_0_1 + BeginLoop_0_1_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_3_1 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_0_2 + BeginLoop_0_1_3 + BeginLoop_0_3_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_3_3 + BeginLoop_0_2_3 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_1_4 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_2_2 + TestAlone_0_3_2 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_4 + TestAlone_0_3_4 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_2_3 + TestAlone_0_3_3 + TestAlone_0_0_4 + TestAlone_0_1_4 + TestIdentity_0_2_0 + TestIdentity_0_1_0 + TestIdentity_0_3_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestTurn_0_3 + TestIdentity_0_0_2 + TestIdentity_0_3_1 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_1_1 + TestIdentity_0_0_1 + TestIdentity_0_2_1 + TestIdentity_0_3_3 + TestIdentity_0_0_4 + TestIdentity_0_2_3 + TestIdentity_0_0_3 + TestIdentity_0_1_3 + TestIdentity_0_3_2 + TestIdentity_0_3_4 + TestIdentity_0_1_4 + TestIdentity_0_2_4 + CS_0 + AskForSection_0_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_1_3 + IsEndLoop_1_0_3 + IsEndLoop_1_3_3 + IsEndLoop_1_2_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_1_4 + IsEndLoop_1_3_4 + EndTurn_1_1 + EndTurn_1_0 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_0_0 + BeginLoop_1_3_0 + BeginLoop_1_1_0 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_3_2 + BeginLoop_1_0_4 + BeginLoop_1_3_3 + BeginLoop_1_2_3 + BeginLoop_1_3_4 + BeginLoop_1_2_4 + BeginLoop_1_1_4 + TestAlone_1_1_0 + TestAlone_1_0_0 + TestAlone_1_3_0 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_3_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_4 + TestAlone_1_3_4 + TestTurn_1_0 + TestTurn_1_1 + TestAlone_1_2_3 + TestAlone_1_3_3 + TestAlone_1_0_4 + TestAlone_1_1_4 + TestIdentity_1_1_0 + TestIdentity_1_3_0 + TestIdentity_1_2_0 + TestTurn_1_2 + TestIdentity_1_0_0 + TestTurn_1_3 + TestIdentity_1_0_2 + TestIdentity_1_3_1 + TestIdentity_1_1_2 + TestIdentity_1_1_1 + TestIdentity_1_0_1 + TestIdentity_1_2_1 + TestIdentity_1_3_3 + TestIdentity_1_0_4 + TestIdentity_1_2_3 + TestIdentity_1_0_3 + TestIdentity_1_1_3 + TestIdentity_1_2_2 + TestIdentity_1_3_2 + TestIdentity_1_2_4 + TestIdentity_1_3_4 + TestIdentity_1_1_4 + CS_1 + AskForSection_1_3 + AskForSection_1_2 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :Turn_0_2 + Turn_0_3 + Turn_0_0 + Turn_0_1 + Turn_0_4 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_1_2 + Turn_1_3 + Turn_1_0 + Turn_1_1 + Turn_1_4 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_0_2 + IsEndLoop_4_1_2 + IsEndLoop_4_2_2 + IsEndLoop_4_3_2 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_1_3 + IsEndLoop_4_0_4 + IsEndLoop_4_3_3 + IsEndLoop_4_1_4 + IsEndLoop_4_3_4 + IsEndLoop_4_2_4 + EndTurn_4_0 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_0_0 + EndTurn_4_3 + BeginLoop_4_2_0 + BeginLoop_4_3_0 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_2_1 + BeginLoop_4_0_1 + BeginLoop_4_1_2 + BeginLoop_4_3_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_0_4 + BeginLoop_4_3_3 + BeginLoop_4_2_3 + BeginLoop_4_1_3 + BeginLoop_4_3_4 + BeginLoop_4_2_4 + BeginLoop_4_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_3_0 + TestAlone_4_2_0 + TestAlone_4_1_0 + TestAlone_4_1_2 + TestAlone_4_2_2 + TestAlone_4_3_2 + TestAlone_4_0_3 + TestAlone_4_1_1 + TestAlone_4_2_1 + TestAlone_4_3_1 + TestAlone_4_0_2 + TestTurn_4_0 + TestAlone_4_1_3 + TestAlone_4_2_3 + TestAlone_4_3_3 + TestIdentity_4_1_0 + TestIdentity_4_0_0 + TestIdentity_4_2_0 + TestTurn_4_2 + TestTurn_4_1 + TestTurn_4_3 + TestIdentity_4_3_1 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_0_1 + TestIdentity_4_3_0 + TestIdentity_4_2_1 + TestIdentity_4_1_1 + TestIdentity_4_3_3 + TestIdentity_4_1_3 + TestIdentity_4_2_3 + TestIdentity_4_3_2 + TestIdentity_4_0_3 + TestIdentity_4_2_2 + TestIdentity_4_3_4 + TestIdentity_4_2_4 + TestIdentity_4_0_4 + TestIdentity_4_1_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_1 + AskForSection_4_0 + Idle_4 + CS_4 = 1
invariant :WantSection_4_T + Idle_4 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_3_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_0_4 + IsEndLoop_3_3_3 + IsEndLoop_3_1_4 + IsEndLoop_3_3_4 + IsEndLoop_3_2_4 + EndTurn_3_1 + EndTurn_3_0 + EndTurn_3_2 + BeginLoop_3_0_0 + EndTurn_3_3 + BeginLoop_3_2_0 + BeginLoop_3_3_0 + BeginLoop_3_1_0 + BeginLoop_3_2_1 + BeginLoop_3_0_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_3_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_0_4 + BeginLoop_3_3_3 + BeginLoop_3_2_3 + BeginLoop_3_3_4 + BeginLoop_3_2_4 + BeginLoop_3_1_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_1_1 + TestAlone_3_0_1 + TestAlone_3_3_0 + TestAlone_3_2_0 + TestAlone_3_2_2 + TestAlone_3_3_2 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_2_4 + TestAlone_3_3_4 + TestTurn_3_0 + TestAlone_3_0_4 + TestIdentity_3_1_0 + TestIdentity_3_0_0 + TestIdentity_3_3_0 + TestIdentity_3_2_0 + TestTurn_3_2 + TestTurn_3_1 + TestTurn_3_3 + TestIdentity_3_3_1 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_0_1 + TestIdentity_3_2_1 + TestIdentity_3_1_1 + TestIdentity_3_3_3 + TestIdentity_3_1_3 + TestIdentity_3_2_3 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_3_2 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + TestIdentity_3_0_4 + TestIdentity_3_1_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_2_2 + Turn_2_3 + Turn_2_0 + Turn_2_1 + Turn_2_4 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_1_3 + IsEndLoop_2_0_3 + IsEndLoop_2_2_3 + IsEndLoop_2_0_4 + IsEndLoop_2_3_3 + IsEndLoop_2_2_4 + IsEndLoop_2_1_4 + IsEndLoop_2_3_4 + EndTurn_2_1 + EndTurn_2_0 + EndTurn_2_2 + BeginLoop_2_0_0 + EndTurn_2_3 + BeginLoop_2_3_0 + BeginLoop_2_1_0 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_0_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_3_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_3_2 + BeginLoop_2_0_4 + BeginLoop_2_3_3 + BeginLoop_2_2_3 + BeginLoop_2_3_4 + BeginLoop_2_2_4 + BeginLoop_2_1_4 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestAlone_2_3_0 + TestAlone_2_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_2_4 + TestAlone_2_3_4 + TestTurn_2_0 + TestAlone_2_2_3 + TestAlone_2_3_3 + TestAlone_2_0_4 + TestAlone_2_1_4 + TestIdentity_2_1_0 + TestIdentity_2_3_0 + TestIdentity_2_2_0 + TestTurn_2_2 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_3 + TestIdentity_2_0_2 + TestIdentity_2_3_1 + TestIdentity_2_1_2 + TestIdentity_2_0_1 + TestIdentity_2_2_1 + TestIdentity_2_1_1 + TestIdentity_2_3_3 + TestIdentity_2_0_4 + TestIdentity_2_1_3 + TestIdentity_2_2_3 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_3_2 + TestIdentity_2_2_4 + TestIdentity_2_3_4 + TestIdentity_2_1_4 + AskForSection_2_3 + AskForSection_2_2 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 = 1
invariant :Turn_3_1 + Turn_3_2 + Turn_3_0 + Turn_3_4 + Turn_3_3 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
FORMULA Peterson-PT-4-ReachabilityCardinality-00 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-01 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-02 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-06 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-07 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-13 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-14 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 9232 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 72 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
LTSmin run took 3138 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 10130 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 2467 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 57172 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 33133 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 1921 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality10==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 3:54:16 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 3:54:16 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 3:54:16 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 129 ms
May 25, 2018 3:54:16 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 480 places.
May 25, 2018 3:54:16 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 690 transitions.
May 25, 2018 3:54:16 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 31 ms
May 25, 2018 3:54:16 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 226 ms
May 25, 2018 3:54:17 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 147 ms
May 25, 2018 3:54:17 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 226 ms
May 25, 2018 3:54:17 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 7 ms
May 25, 2018 3:54:17 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 3 ms
May 25, 2018 3:54:17 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
May 25, 2018 3:54:17 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 157 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 954 ms.
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=0 took 25 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=0 took 9 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=0 took 9 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=0 took 4 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=0 took 14 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=0 took 25 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=0 took 11 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=0 took 19 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=0 took 11 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=0 took 6 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=0 took 18 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=0 took 12 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=0 took 12 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=0 took 12 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=0 took 12 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=0 took 16 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=1 took 58 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=1 took 74 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=1 took 17 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=1 took 19 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=1 took 18 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=1 took 44 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=1 took 24 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=1 took 24 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=1 took 11 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=1 took 9 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=1 took 1 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=1 took 2 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=1 took 2 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=1 took 1 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=1 took 8 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=1 took 8 ms
May 25, 2018 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 200 ms
May 25, 2018 3:54:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=2 took 892 ms
May 25, 2018 3:54:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=2 took 247 ms
May 25, 2018 3:54:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=2 took 294 ms
May 25, 2018 3:54:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=2 took 278 ms
May 25, 2018 3:54:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=2 took 252 ms
May 25, 2018 3:54:22 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 480 variables to be positive in 4075 ms
May 25, 2018 3:54:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 690 transitions.
May 25, 2018 3:54:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/690 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 3:54:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 79 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 3:54:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 690 transitions.
May 25, 2018 3:54:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 3:54:22 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 480 variables to be positive in 3940 ms
May 25, 2018 3:54:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=2 took 3315 ms
May 25, 2018 3:54:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=2 took 420 ms
May 25, 2018 3:54:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=2 took 428 ms
May 25, 2018 3:54:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=2 took 539 ms
May 25, 2018 3:54:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=2 took 193 ms
May 25, 2018 3:54:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=2 took 236 ms
May 25, 2018 3:54:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=2 took 198 ms
May 25, 2018 3:54:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=2 took 283 ms
May 25, 2018 3:54:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=2 took 135 ms
May 25, 2018 3:54:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=2 took 176 ms
May 25, 2018 3:54:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=2 took 294 ms
May 25, 2018 3:54:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=3 took 13827 ms
May 25, 2018 3:54:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=3 took 2186 ms
May 25, 2018 3:54:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=3 took 5567 ms
May 25, 2018 3:54:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=3 took 2530 ms
May 25, 2018 3:54:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=3 took 1522 ms
May 25, 2018 3:55:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=3 took 12216 ms
May 25, 2018 3:55:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=3 took 15739 ms
May 25, 2018 3:55:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=3 took 12279 ms
May 25, 2018 3:55:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=3 took 9619 ms
May 25, 2018 3:55:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=3 took 1403 ms
May 25, 2018 3:55:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=3 took 8839 ms
May 25, 2018 3:56:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=3 took 14723 ms
May 25, 2018 3:56:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 690 transitions.
May 25, 2018 3:56:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/690) took 1201 ms. Total solver calls (SAT/UNSAT): 137(0/137)
May 25, 2018 3:56:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=3 took 3548 ms
May 25, 2018 3:56:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/690) took 4659 ms. Total solver calls (SAT/UNSAT): 548(0/548)
May 25, 2018 3:56:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/690) took 8141 ms. Total solver calls (SAT/UNSAT): 957(0/957)
May 25, 2018 3:56:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=3 took 8740 ms
May 25, 2018 3:56:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/690) took 11357 ms. Total solver calls (SAT/UNSAT): 1364(0/1364)
May 25, 2018 3:56:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Peterson-PT-4-ReachabilityCardinality-00
May 25, 2018 3:56:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-00
May 25, 2018 3:56:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-00(FALSE) depth K=0 took 120400 ms
May 25, 2018 3:56:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/690) took 15175 ms. Total solver calls (SAT/UNSAT): 1770(0/1770)
May 25, 2018 3:56:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/690) took 19078 ms. Total solver calls (SAT/UNSAT): 2040(0/2040)
May 25, 2018 3:56:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=3 took 11023 ms
May 25, 2018 3:56:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/690) took 22625 ms. Total solver calls (SAT/UNSAT): 2442(0/2442)
May 25, 2018 3:56:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=3 took 2047 ms
May 25, 2018 3:56:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/690) took 27313 ms. Total solver calls (SAT/UNSAT): 2843(0/2843)
May 25, 2018 3:56:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/690) took 30735 ms. Total solver calls (SAT/UNSAT): 3241(0/3241)
May 25, 2018 3:56:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/690) took 34378 ms. Total solver calls (SAT/UNSAT): 3638(0/3638)
May 25, 2018 3:56:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/690) took 37753 ms. Total solver calls (SAT/UNSAT): 4034(0/4034)
May 25, 2018 3:56:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/690) took 40983 ms. Total solver calls (SAT/UNSAT): 4428(0/4428)
May 25, 2018 3:56:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-01
May 25, 2018 3:56:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-01
May 25, 2018 3:56:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-01(TRUE) depth K=0 took 29490 ms
May 25, 2018 3:56:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-02
May 25, 2018 3:56:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-02
May 25, 2018 3:56:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-02(TRUE) depth K=0 took 2335 ms
May 25, 2018 3:56:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/690) took 46447 ms. Total solver calls (SAT/UNSAT): 4950(0/4950)
May 25, 2018 3:56:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/690) took 49905 ms. Total solver calls (SAT/UNSAT): 5210(0/5210)
May 25, 2018 3:57:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-03
May 25, 2018 3:57:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-03(SAT) depth K=0 took 5473 ms
May 25, 2018 3:57:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/690) took 53061 ms. Total solver calls (SAT/UNSAT): 5598(0/5598)
May 25, 2018 3:57:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-04
May 25, 2018 3:57:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-04(SAT) depth K=0 took 4000 ms
May 25, 2018 3:57:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/690) took 56605 ms. Total solver calls (SAT/UNSAT): 5984(0/5984)
May 25, 2018 3:57:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-05
May 25, 2018 3:57:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-05(SAT) depth K=0 took 2528 ms
May 25, 2018 3:57:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/690) took 60867 ms. Total solver calls (SAT/UNSAT): 6241(0/6241)
May 25, 2018 3:57:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/690) took 65984 ms. Total solver calls (SAT/UNSAT): 6497(0/6497)
May 25, 2018 3:57:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/690) took 70951 ms. Total solver calls (SAT/UNSAT): 6751(0/6751)
May 25, 2018 3:57:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/690) took 76063 ms. Total solver calls (SAT/UNSAT): 7006(0/7006)
May 25, 2018 3:57:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/690) took 79593 ms. Total solver calls (SAT/UNSAT): 7385(0/7385)
May 25, 2018 3:57:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/690) took 82807 ms. Total solver calls (SAT/UNSAT): 7764(0/7764)
May 25, 2018 3:57:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/690) took 86011 ms. Total solver calls (SAT/UNSAT): 8139(0/8139)
May 25, 2018 3:57:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/690) took 91088 ms. Total solver calls (SAT/UNSAT): 8555(8/8547)
May 25, 2018 3:57:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=4 took 68790 ms
May 25, 2018 3:57:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-06
May 25, 2018 3:57:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-06
May 25, 2018 3:57:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-06(TRUE) depth K=0 took 35361 ms
May 25, 2018 3:57:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/690) took 95289 ms. Total solver calls (SAT/UNSAT): 8880(23/8857)
May 25, 2018 3:57:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/690) took 100193 ms. Total solver calls (SAT/UNSAT): 9201(34/9167)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 25, 2018 3:57:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 102448 ms. Total solver calls (SAT/UNSAT): 9320(35/9285)
May 25, 2018 3:57:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 690 transitions.
May 25, 2018 3:57:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-07
May 25, 2018 3:57:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-07
May 25, 2018 3:57:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-07(TRUE) depth K=0 took 11112 ms
May 25, 2018 3:57:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
May 25, 2018 3:57:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=0 took 3809 ms
May 25, 2018 3:57:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Peterson-PT-4-ReachabilityCardinality-09
May 25, 2018 3:57:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-09
May 25, 2018 3:57:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-09(FALSE) depth K=0 took 1877 ms
May 25, 2018 3:58:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
May 25, 2018 3:58:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=0 took 3476 ms
May 25, 2018 3:58:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-11
May 25, 2018 3:58:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-11(SAT) depth K=0 took 3781 ms
May 25, 2018 3:58:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-12
May 25, 2018 3:58:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-12(SAT) depth K=0 took 3478 ms
May 25, 2018 3:58:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-13
May 25, 2018 3:58:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-13
May 25, 2018 3:58:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-13(TRUE) depth K=0 took 1159 ms
May 25, 2018 3:58:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-14
May 25, 2018 3:58:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-14
May 25, 2018 3:58:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-14(TRUE) depth K=0 took 1219 ms
May 25, 2018 3:58:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-15
May 25, 2018 3:58:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-15(SAT) depth K=0 took 2507 ms
May 25, 2018 3:58:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 23167 ms. Total solver calls (SAT/UNSAT): 2549(0/2549)
May 25, 2018 3:58:14 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 237624ms conformant to PINS in folder :/home/mcc/execution
May 25, 2018 3:59:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=4 took 83827 ms
May 25, 2018 3:59:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-03
May 25, 2018 3:59:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-03(SAT) depth K=1 took 76456 ms
May 25, 2018 3:59:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
May 25, 2018 3:59:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=1 took 18280 ms
May 25, 2018 4:00:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
May 25, 2018 4:00:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=1 took 40309 ms
May 25, 2018 4:00:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-11
May 25, 2018 4:00:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-11(SAT) depth K=1 took 14010 ms
May 25, 2018 4:00:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-12
May 25, 2018 4:00:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-12(SAT) depth K=1 took 8045 ms
May 25, 2018 4:01:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=4 took 124270 ms
May 25, 2018 4:01:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-15
May 25, 2018 4:01:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-15(SAT) depth K=1 took 25611 ms
May 25, 2018 4:03:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=4 took 115003 ms
May 25, 2018 4:03:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
May 25, 2018 4:03:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=2 took 153822 ms
May 25, 2018 4:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
May 25, 2018 4:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=2 took 70272 ms
May 25, 2018 4:06:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=4 took 185793 ms
May 25, 2018 4:07:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-11
May 25, 2018 4:07:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-11(SAT) depth K=2 took 123999 ms
May 25, 2018 4:09:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-12
May 25, 2018 4:09:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-12(SAT) depth K=2 took 128421 ms
May 25, 2018 4:09:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=4 took 185074 ms
May 25, 2018 4:11:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=4 took 106796 ms
May 25, 2018 4:11:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=4 took 52189 ms
May 25, 2018 4:12:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=4 took 27235 ms
May 25, 2018 4:13:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=4 took 41912 ms
May 25, 2018 4:14:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=4 took 97884 ms
May 25, 2018 4:15:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=4 took 28985 ms
May 25, 2018 4:15:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=4 took 41917 ms
May 25, 2018 4:16:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=4 took 42834 ms
ITS-tools command line returned an error code 137
May 25, 2018 4:17:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=4 took 83987 ms
May 25, 2018 4:19:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=5 took 100756 ms
May 25, 2018 4:21:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=5 took 112478 ms
May 25, 2018 4:25:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
May 25, 2018 4:25:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=3 took 963701 ms
May 25, 2018 4:26:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=6 took 270604 ms
May 25, 2018 4:28:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
May 25, 2018 4:28:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=3 took 173459 ms
May 25, 2018 4:32:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=6 took 399207 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-4"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-4.tgz
mv Peterson-PT-4 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is Peterson-PT-4, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666477100572"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;