fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r117-csrt-152666477000496
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for PermAdmissibility-PT-10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15741.400 3380105.00 6951873.00 1065.70 [undef] Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 876K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 27K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 102K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 39K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 484K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is PermAdmissibility-PT-10, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666477000496
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-10-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527259696794

Flatten gal took : 273 ms
Constant places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Symmetric choice reduction at 1 with 28 rule applications. Total rules 92 place count 104 transition count 592
Constant places removed 28 places and 252 transitions.
Iterating post reduction 1 with 28 rules applied. Total rules applied 120 place count 76 transition count 340
Applied a total of 120 rules in 54 ms. Remains 76 /168 variables (removed 92) and now considering 340/592 (removed 252) transitions.
// Phase 1: matrix 340 rows 76 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph5937607695207803212.txt, -o, /tmp/graph5937607695207803212.bin, -w, /tmp/graph5937607695207803212.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph5937607695207803212.bin, -l, -1, -v, -w, /tmp/graph5937607695207803212.weights, -q, 0, -e, 0.001], workingDir=null]
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 6 ordering constraints for composite.
built 76 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 340 rows 76 cols
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7267 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 102 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255

BK_STOP 1527263076899

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 2:48:19 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 2:48:19 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 2:48:19 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 147 ms
May 25, 2018 2:48:19 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 168 places.
May 25, 2018 2:48:20 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 592 transitions.
May 25, 2018 2:48:20 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 41 ms
May 25, 2018 2:48:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 265 ms
May 25, 2018 2:48:20 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 16 ms
May 25, 2018 2:48:20 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
May 25, 2018 2:48:21 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 2:48:21 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 112 ms
May 25, 2018 2:48:21 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 340 transitions.
May 25, 2018 2:48:21 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 65 ms
Begin: Fri May 25 14:48:21 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Fri May 25 14:48:21 2018
network size: 76 nodes, 914 links, 678 weight
quality increased from -0.035987 to 0.401684
end computation: Fri May 25 14:48:21 2018
level 1:
start computation: Fri May 25 14:48:21 2018
network size: 6 nodes, 30 links, 678 weight
quality increased from 0.401684 to 0.414853
end computation: Fri May 25 14:48:21 2018
level 2:
start computation: Fri May 25 14:48:21 2018
network size: 4 nodes, 14 links, 678 weight
quality increased from 0.414853 to 0.414853
end computation: Fri May 25 14:48:21 2018
End: Fri May 25 14:48:21 2018
Total duration: 0 sec
0.414853
May 25, 2018 2:48:21 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 2:48:21 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 73 ms
May 25, 2018 2:48:21 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 2:48:21 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 154 redundant transitions.
May 25, 2018 2:48:21 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 5 ms
May 25, 2018 2:48:21 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 22 ms
May 25, 2018 2:48:23 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 76 variables to be positive in 1673 ms
May 25, 2018 2:48:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 340 transitions.
May 25, 2018 2:48:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/340 took 4 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 2:48:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 62 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 2:48:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 340 transitions.
May 25, 2018 2:48:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 16 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 2:48:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 340 transitions.
May 25, 2018 2:48:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/340) took 3020 ms. Total solver calls (SAT/UNSAT): 1489(1489/0)
May 25, 2018 2:48:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/340) took 6276 ms. Total solver calls (SAT/UNSAT): 3655(3655/0)
May 25, 2018 2:48:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/340) took 9316 ms. Total solver calls (SAT/UNSAT): 5630(5630/0)
May 25, 2018 2:48:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(211/340) took 12367 ms. Total solver calls (SAT/UNSAT): 6116(6116/0)
May 25, 2018 2:48:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(220/340) took 15416 ms. Total solver calls (SAT/UNSAT): 6412(6412/0)
May 25, 2018 2:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(224/340) took 18522 ms. Total solver calls (SAT/UNSAT): 6682(6682/0)
May 25, 2018 2:48:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(230/340) took 21576 ms. Total solver calls (SAT/UNSAT): 7057(7057/0)
May 25, 2018 2:48:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(232/340) took 24612 ms. Total solver calls (SAT/UNSAT): 7174(7174/0)
May 25, 2018 2:48:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(284/340) took 28675 ms. Total solver calls (SAT/UNSAT): 9253(9253/0)
May 25, 2018 2:48:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(289/340) took 32038 ms. Total solver calls (SAT/UNSAT): 9513(9513/0)
May 25, 2018 2:48:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(295/340) took 35867 ms. Total solver calls (SAT/UNSAT): 9792(9792/0)
May 25, 2018 2:49:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(303/340) took 38957 ms. Total solver calls (SAT/UNSAT): 10108(10108/0)
May 25, 2018 2:49:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 41773 ms. Total solver calls (SAT/UNSAT): 10738(10738/0)
May 25, 2018 2:49:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 340 transitions.
May 25, 2018 2:59:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 619094 ms. Total solver calls (SAT/UNSAT): 14905(0/14905)
May 25, 2018 2:59:24 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 663475ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 134
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.004: completed loading model GAL
pins2lts-mc, 0.009: Initializing POR dependencies: labels 340, guards 340
pins2lts-mc, 0.067: There are 340 state labels and 1 edge labels
pins2lts-mc, 0.067: State length is 76, there are 340 groups
pins2lts-mc, 0.067: Running bfs using 1 core (sequential)
pins2lts-mc, 0.067: Using a non-indexing tree table with 2^27 elements
pins2lts-mc, 0.067: Successor permutation: none
pins2lts-mc, 0.067: Visible groups: 0 / 340, labels: 0 / 340
pins2lts-mc, 0.067: POR cycle proviso: none
pins2lts-mc, 0.067: Global bits: 0, count bits: 0, local bits: 0
pins2lts-mc, 0.167: 6 levels 1000 states 5900 transitions
pins2lts-mc, 0.281: 7 levels 2000 states 13324 transitions
pins2lts-mc, 0.511: 8 levels 4000 states 26524 transitions
pins2lts-mc, 0.977: 9 levels 8000 states 50752 transitions
pins2lts-mc, 1.901: 9 levels 16000 states 103252 transitions
pins2lts-mc, 3.704: 10 levels 32000 states 200652 transitions
pins2lts-mc, 7.294: 11 levels 64000 states 412599 transitions
pins2lts-mc, 14.603: 12 levels 128000 states 864830 transitions
pins2lts-mc, 28.937: 13 levels 256000 states 1700388 transitions
pins2lts-mc, 58.112: 13 levels 512000 states 3379009 transitions
pins2lts-mc, 116.027: 14 levels 1024000 states 6711500 transitions
pins2lts-mc, 235.101: 16 levels 2048000 states 13650705 transitions
pins2lts-mc, 471.138: 17 levels 4096000 states 26268620 transitions
pins2lts-mc, 955.831: 18 levels 8192000 states 50926725 transitions
pins2lts-mc, 1948.082: 20 levels 16384000 states 99055843 transitions
pins2lts-mc, 2703.839: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 2703.843:
pins2lts-mc, 2703.843:
pins2lts-mc, 2703.843: Explored 22422735 states 131649083 transitions, fanout: 5.871
pins2lts-mc, 2703.843: Total exploration time 2703.780 sec (2703.780 sec minimum, 2703.780 sec on average)
pins2lts-mc, 2703.843: States per second: 8293, Transitions per second: 48691
pins2lts-mc, 2703.843:
pins2lts-mc, 2703.843: Queue width: 8B, total height: 10463235, memory: 79.83MB
pins2lts-mc, 2703.843: Tree memory: 506.9MB, 16.2 B/state, compr.: 5.3%
pins2lts-mc, 2703.843: Tree fill ratio (roots/leafs): 24.0%/99.0%
pins2lts-mc, 2703.843: Stored 342 string chucks using 0MB
pins2lts-mc, 2703.843: Total memory used for chunk indexing: 0MB
pins2lts-mc, 2703.843: Est. total memory use: 586.7MB (~1103.8MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-10"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-10.tgz
mv PermAdmissibility-PT-10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is PermAdmissibility-PT-10, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666477000496"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;