Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...............................
/home/mcc/execution
total 572K
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 39K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 27K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 36K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 200K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is LamportFastMutEx-PT-6, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666476600138
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527242259842

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-00 with value :(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-01 with value :((((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)<=(((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true))||(((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=3))||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)<=(((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)))&&(!(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)>=3)))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-02 with value :(!((!(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)>=3))||(!(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)))))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-03 with value :((!(((((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)<=((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6))&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6))))||(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)<=(((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-04 with value :(!(((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)>=2)||(((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)>=1))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3)||(((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)>=1))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-05 with value :(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))&&(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)))&&(!((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=3)||((((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)>=1))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-06 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))||(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)))||(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-07 with value :((((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3)||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)>=1))||((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6))||(((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))))&&(!(((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=3)))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-08 with value :((P_b_4_true>=1)&&(((y_6<=x_0)||(P_wait_0_3<=P_start_1_3))&&((P_sety_9_1>=3)||(P_done_6_5>=1))))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-09 with value :(P_awaity_5<=P_fordo_12_5)
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-10 with value :(P_wait_0_5>=2)
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-11 with value :(!((P_done_0_0<=P_done_0_6)||((P_setbi_24_1<=P_b_1_false)&&(P_done_5_2>=2))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-12 with value :((!((P_wait_2_2<=P_CS_21_2)&&(P_wait_0_2<=P_wait_5_0)))&&(P_done_4_6>=3))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-13 with value :((((P_done_2_0>=2)||(P_sety_9_6<=P_done_4_5))&&(P_done_6_5>=1))&&(((P_ifyi_15_5>=1)&&(P_setbi_24_6<=P_sety_9_1))&&(!(P_awaity_2>=2))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-14 with value :(P_b_1_true>=2)
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-15 with value :(P_done_4_5>=3)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_3_0 + P_done_3_0 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_3_0 + P_done_3_0 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-03 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-05 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-10 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-11 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-12 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5703 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 82 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
255
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx\_PT\_6\_flat\_flat,5.47232e+11,2500.38,13147952,2,1.88998e+06,5,2.76711e+07,6,0,1263,4.29856e+07,0
Total reachable state count : 547231759144

Verifying 16 reachability properties.
Invariant property LamportFastMutEx-PT-6-ReachabilityCardinality-00 does not hold.
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-00,1,2500.65,13148192,2,218,6,2.76711e+07,7,0,1280,4.29856e+07,0
Invariant property LamportFastMutEx-PT-6-ReachabilityCardinality-01 does not hold.
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-01,1,2501.79,13148288,2,218,7,2.76711e+07,8,0,1430,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-02 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-6-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-02,0,2506.95,13148288,1,0,7,2.76711e+07,9,0,1458,4.29856e+07,0
Invariant property LamportFastMutEx-PT-6-ReachabilityCardinality-03 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-03,0,2511.86,13148288,1,0,7,2.76711e+07,10,0,1538,4.29856e+07,0
Invariant property LamportFastMutEx-PT-6-ReachabilityCardinality-04 does not hold.
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-04,5.47161e+11,2761.26,13148288,2,2.79231e+06,8,2.76711e+07,11,0,27944,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-05 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-6-ReachabilityCardinality-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-05,0,2769.39,13148316,1,0,8,2.76711e+07,12,0,28024,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-06 is true.
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-06,4,2771.68,13148316,2,232,9,2.76711e+07,13,0,28104,4.29856e+07,0
Invariant property LamportFastMutEx-PT-6-ReachabilityCardinality-07 does not hold.
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-07,7.59753e+10,2934.47,13148316,2,3.40151e+06,10,2.76711e+07,14,0,43978,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-08 is true.
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-08,4.61496e+09,2943.4,13148316,2,164090,11,2.76711e+07,15,0,43995,4.29856e+07,0
Invariant property LamportFastMutEx-PT-6-ReachabilityCardinality-09 does not hold.
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-09,5.09336e+08,2947.95,13148316,2,104623,12,2.76711e+07,16,0,43999,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-10 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-6-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-10,0,2952.05,13148316,1,0,12,2.76711e+07,17,0,44000,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-11 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-6-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-11,0,2958.09,13148316,1,0,12,2.76711e+07,18,0,44009,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-12 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-6-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-12,0,2958.48,13148316,1,0,12,2.76711e+07,19,0,44019,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-13 is true.
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-13,2.43856e+08,2959.9,13148316,2,51389,13,2.76711e+07,20,0,44040,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-14 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-6-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-14,0,2963.59,13148316,1,0,13,2.76711e+07,21,0,44041,4.29856e+07,0
Reachability property LamportFastMutEx-PT-6-ReachabilityCardinality-15 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-6-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-6-ReachabilityCardinality-15,0,2963.65,13148316,1,0,13,2.76711e+07,22,0,44042,4.29856e+07,0

BK_STOP 1527245270765

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 9:57:41 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 9:57:41 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 9:57:41 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 116 ms
May 25, 2018 9:57:42 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 217 places.
May 25, 2018 9:57:42 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 420 transitions.
May 25, 2018 9:57:42 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 32 ms
May 25, 2018 9:57:42 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 182 ms
May 25, 2018 9:57:42 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 82 ms
May 25, 2018 9:57:42 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 9 ms
May 25, 2018 9:57:42 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 33 ms
May 25, 2018 9:57:42 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 139 ms
May 25, 2018 9:57:42 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
May 25, 2018 9:57:42 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 67 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 722 ms.
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=0 took 3 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=0 took 9 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(UNSAT) depth K=0 took 14 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(UNSAT) depth K=0 took 7 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=0 took 2 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=0 took 8 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=0 took 11 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(UNSAT) depth K=0 took 8 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=0 took 7 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=0 took 7 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=0 took 15 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(UNSAT) depth K=0 took 14 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(UNSAT) depth K=0 took 14 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=0 took 12 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(UNSAT) depth K=0 took 11 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=0 took 19 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=1 took 13 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=1 took 10 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(UNSAT) depth K=1 took 7 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 45 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(UNSAT) depth K=1 took 7 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=1 took 23 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=1 took 14 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=1 took 18 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(UNSAT) depth K=1 took 22 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=1 took 9 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=1 took 20 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=1 took 16 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(UNSAT) depth K=1 took 5 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(UNSAT) depth K=1 took 7 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=1 took 4 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(UNSAT) depth K=1 took 3 ms
May 25, 2018 9:57:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=1 took 14 ms
May 25, 2018 9:57:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=2 took 246 ms
May 25, 2018 9:57:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=2 took 458 ms
May 25, 2018 9:57:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(UNSAT) depth K=2 took 152 ms
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(UNSAT) depth K=2 took 325 ms
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 1962 ms
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 420 transitions.
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/420 took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 54 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 420 transitions.
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 21 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 1804 ms
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=2 took 449 ms
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=0 took 409 ms
May 25, 2018 9:57:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=2 took 509 ms
May 25, 2018 9:57:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=2 took 131 ms
May 25, 2018 9:57:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-01
May 25, 2018 9:57:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(SAT) depth K=0 took 668 ms
May 25, 2018 9:57:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(UNSAT) depth K=2 took 541 ms
May 25, 2018 9:57:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=2 took 82 ms
May 25, 2018 9:57:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=2 took 116 ms
May 25, 2018 9:57:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=2 took 105 ms
May 25, 2018 9:57:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(UNSAT) depth K=2 took 72 ms
May 25, 2018 9:57:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(UNSAT) depth K=2 took 83 ms
May 25, 2018 9:57:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=2 took 74 ms
May 25, 2018 9:57:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(UNSAT) depth K=2 took 75 ms
May 25, 2018 9:57:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=2 took 79 ms
May 25, 2018 9:57:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-02
May 25, 2018 9:57:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-02
May 25, 2018 9:57:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(FALSE) depth K=0 took 1090 ms
May 25, 2018 9:57:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-PT-6-ReachabilityCardinality-03
May 25, 2018 9:57:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-03
May 25, 2018 9:57:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(TRUE) depth K=0 took 701 ms
May 25, 2018 9:57:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=3 took 1725 ms
May 25, 2018 9:57:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
May 25, 2018 9:57:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=0 took 938 ms
May 25, 2018 9:57:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-05
May 25, 2018 9:57:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-05
May 25, 2018 9:57:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(FALSE) depth K=0 took 626 ms
May 25, 2018 9:57:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-06
May 25, 2018 9:57:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(SAT) depth K=0 took 799 ms
May 25, 2018 9:57:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-07
May 25, 2018 9:57:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(SAT) depth K=0 took 4388 ms
May 25, 2018 9:57:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-08
May 25, 2018 9:57:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(SAT) depth K=0 took 953 ms
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-09
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(SAT) depth K=0 took 1995 ms
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-10
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-10
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(FALSE) depth K=0 took 202 ms
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-11
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-11
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(FALSE) depth K=0 took 275 ms
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-12
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-12
May 25, 2018 9:57:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(FALSE) depth K=0 took 266 ms
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=3 took 9992 ms
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-13
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(SAT) depth K=0 took 807 ms
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-14
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-14
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(FALSE) depth K=0 took 213 ms
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-15
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-15
May 25, 2018 9:57:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(FALSE) depth K=0 took 218 ms
May 25, 2018 9:58:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
May 25, 2018 9:58:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=1 took 1057 ms
May 25, 2018 9:58:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(UNSAT) depth K=3 took 3598 ms
May 25, 2018 9:58:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-01
May 25, 2018 9:58:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(SAT) depth K=1 took 10685 ms
May 25, 2018 9:58:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
May 25, 2018 9:58:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=1 took 1074 ms
May 25, 2018 9:58:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(UNSAT) depth K=3 took 12317 ms
May 25, 2018 9:58:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-06
May 25, 2018 9:58:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(SAT) depth K=1 took 4414 ms
May 25, 2018 9:58:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=3 took 7866 ms
May 25, 2018 9:58:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-07
May 25, 2018 9:58:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(SAT) depth K=1 took 15815 ms
May 25, 2018 9:58:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-08
May 25, 2018 9:58:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(SAT) depth K=1 took 8664 ms
May 25, 2018 9:58:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=3 took 21439 ms
May 25, 2018 9:58:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 420 transitions.
May 25, 2018 9:58:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/420) took 1134 ms. Total solver calls (SAT/UNSAT): 65(0/65)
May 25, 2018 9:58:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-09
May 25, 2018 9:58:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(SAT) depth K=1 took 7320 ms
May 25, 2018 9:58:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/420) took 4434 ms. Total solver calls (SAT/UNSAT): 258(6/252)
May 25, 2018 9:58:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=3 took 5394 ms
May 25, 2018 9:58:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/420) took 7674 ms. Total solver calls (SAT/UNSAT): 452(18/434)
May 25, 2018 9:58:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-13
May 25, 2018 9:58:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(SAT) depth K=1 took 6182 ms
May 25, 2018 9:58:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/420) took 12251 ms. Total solver calls (SAT/UNSAT): 710(30/680)
May 25, 2018 9:58:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(UNSAT) depth K=3 took 8626 ms
May 25, 2018 9:59:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/420) took 16088 ms. Total solver calls (SAT/UNSAT): 903(36/867)
May 25, 2018 9:59:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=3 took 5415 ms
May 25, 2018 9:59:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/420) took 19392 ms. Total solver calls (SAT/UNSAT): 1044(36/1008)
May 25, 2018 9:59:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/420) took 23216 ms. Total solver calls (SAT/UNSAT): 1184(36/1148)
May 25, 2018 9:59:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=3 took 6389 ms
May 25, 2018 9:59:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/420) took 26950 ms. Total solver calls (SAT/UNSAT): 1323(36/1287)
May 25, 2018 9:59:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=3 took 2922 ms
May 25, 2018 9:59:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/420) took 30711 ms. Total solver calls (SAT/UNSAT): 1461(36/1425)
May 25, 2018 9:59:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/420) took 34216 ms. Total solver calls (SAT/UNSAT): 1598(36/1562)
May 25, 2018 9:59:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(UNSAT) depth K=3 took 7777 ms
May 25, 2018 9:59:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/420) took 37393 ms. Total solver calls (SAT/UNSAT): 1734(36/1698)
May 25, 2018 9:59:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(UNSAT) depth K=3 took 4248 ms
May 25, 2018 9:59:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/420) took 40589 ms. Total solver calls (SAT/UNSAT): 1869(36/1833)
May 25, 2018 9:59:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=3 took 4340 ms
May 25, 2018 9:59:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/420) took 46126 ms. Total solver calls (SAT/UNSAT): 2136(58/2078)
May 25, 2018 9:59:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(UNSAT) depth K=3 took 2102 ms
May 25, 2018 9:59:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=3 took 970 ms
May 25, 2018 9:59:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/420) took 49142 ms. Total solver calls (SAT/UNSAT): 2399(80/2319)
May 25, 2018 9:59:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/420) took 54626 ms. Total solver calls (SAT/UNSAT): 2658(102/2556)
May 25, 2018 9:59:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/420) took 59988 ms. Total solver calls (SAT/UNSAT): 2913(123/2790)
May 25, 2018 9:59:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/420) took 65153 ms. Total solver calls (SAT/UNSAT): 3164(143/3021)
May 25, 2018 9:59:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
May 25, 2018 9:59:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=2 took 58552 ms
May 25, 2018 9:59:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/420) took 69314 ms. Total solver calls (SAT/UNSAT): 3411(163/3248)
May 25, 2018 9:59:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/420) took 74502 ms. Total solver calls (SAT/UNSAT): 3654(183/3471)
May 25, 2018 10:00:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/420) took 80130 ms. Total solver calls (SAT/UNSAT): 3893(201/3692)
May 25, 2018 10:00:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/420) took 85270 ms. Total solver calls (SAT/UNSAT): 4128(219/3909)
May 25, 2018 10:00:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/420) took 90710 ms. Total solver calls (SAT/UNSAT): 4359(237/4122)
May 25, 2018 10:00:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/420) took 96490 ms. Total solver calls (SAT/UNSAT): 4586(254/4332)
May 25, 2018 10:00:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=4 took 49399 ms
May 25, 2018 10:00:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/420) took 101676 ms. Total solver calls (SAT/UNSAT): 4809(270/4539)
May 25, 2018 10:00:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/420) took 106750 ms. Total solver calls (SAT/UNSAT): 5028(286/4742)
May 25, 2018 10:00:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/420) took 110833 ms. Total solver calls (SAT/UNSAT): 5243(302/4941)
May 25, 2018 10:00:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/420) took 114313 ms. Total solver calls (SAT/UNSAT): 5454(316/5138)
May 25, 2018 10:00:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/420) took 117750 ms. Total solver calls (SAT/UNSAT): 5661(330/5331)
May 25, 2018 10:00:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/420) took 121436 ms. Total solver calls (SAT/UNSAT): 5864(344/5520)
May 25, 2018 10:00:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-01
May 25, 2018 10:00:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(SAT) depth K=2 took 56495 ms
May 25, 2018 10:00:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/420) took 125478 ms. Total solver calls (SAT/UNSAT): 6063(357/5706)
May 25, 2018 10:00:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/420) took 130304 ms. Total solver calls (SAT/UNSAT): 6258(369/5889)
May 25, 2018 10:00:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/420) took 134363 ms. Total solver calls (SAT/UNSAT): 6449(381/6068)
May 25, 2018 10:01:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/420) took 138323 ms. Total solver calls (SAT/UNSAT): 6636(393/6243)
May 25, 2018 10:01:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/420) took 143489 ms. Total solver calls (SAT/UNSAT): 6860(393/6467)
May 25, 2018 10:01:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/420) took 148715 ms. Total solver calls (SAT/UNSAT): 7083(393/6690)
May 25, 2018 10:01:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/420) took 153590 ms. Total solver calls (SAT/UNSAT): 7305(393/6912)
May 25, 2018 10:01:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/420) took 157947 ms. Total solver calls (SAT/UNSAT): 7526(393/7133)
May 25, 2018 10:01:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/420) took 163074 ms. Total solver calls (SAT/UNSAT): 7746(393/7353)
May 25, 2018 10:01:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/420) took 167679 ms. Total solver calls (SAT/UNSAT): 7965(393/7572)
May 25, 2018 10:01:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/420) took 172488 ms. Total solver calls (SAT/UNSAT): 8183(416/7767)
May 25, 2018 10:01:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/420) took 177123 ms. Total solver calls (SAT/UNSAT): 8400(439/7961)
May 25, 2018 10:01:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/420) took 181917 ms. Total solver calls (SAT/UNSAT): 8616(462/8154)
May 25, 2018 10:01:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/420) took 186650 ms. Total solver calls (SAT/UNSAT): 8831(485/8346)
May 25, 2018 10:01:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/420) took 191664 ms. Total solver calls (SAT/UNSAT): 9045(508/8537)
May 25, 2018 10:02:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/420) took 196304 ms. Total solver calls (SAT/UNSAT): 9258(531/8727)
May 25, 2018 10:02:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/420) took 200950 ms. Total solver calls (SAT/UNSAT): 9470(553/8917)
May 25, 2018 10:02:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/420) took 205385 ms. Total solver calls (SAT/UNSAT): 9681(575/9106)
May 25, 2018 10:02:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/420) took 209882 ms. Total solver calls (SAT/UNSAT): 9891(597/9294)
May 25, 2018 10:02:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/420) took 215299 ms. Total solver calls (SAT/UNSAT): 10100(619/9481)
May 25, 2018 10:02:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/420) took 219850 ms. Total solver calls (SAT/UNSAT): 10308(641/9667)
May 25, 2018 10:02:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/420) took 224600 ms. Total solver calls (SAT/UNSAT): 10515(663/9852)
May 25, 2018 10:02:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/420) took 229124 ms. Total solver calls (SAT/UNSAT): 10721(684/10037)
May 25, 2018 10:02:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/420) took 234429 ms. Total solver calls (SAT/UNSAT): 10926(705/10221)
May 25, 2018 10:02:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/420) took 238975 ms. Total solver calls (SAT/UNSAT): 11130(726/10404)
May 25, 2018 10:02:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/420) took 243085 ms. Total solver calls (SAT/UNSAT): 11333(747/10586)
May 25, 2018 10:02:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/420) took 247657 ms. Total solver calls (SAT/UNSAT): 11535(768/10767)
May 25, 2018 10:02:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/420) took 251380 ms. Total solver calls (SAT/UNSAT): 11736(789/10947)
May 25, 2018 10:03:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/420) took 255282 ms. Total solver calls (SAT/UNSAT): 11936(809/11127)
May 25, 2018 10:03:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/420) took 259538 ms. Total solver calls (SAT/UNSAT): 12135(829/11306)
May 25, 2018 10:03:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/420) took 263490 ms. Total solver calls (SAT/UNSAT): 12333(849/11484)
May 25, 2018 10:03:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/420) took 267386 ms. Total solver calls (SAT/UNSAT): 12530(869/11661)
May 25, 2018 10:03:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/420) took 271161 ms. Total solver calls (SAT/UNSAT): 12726(889/11837)
May 25, 2018 10:03:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/420) took 275485 ms. Total solver calls (SAT/UNSAT): 12921(909/12012)
May 25, 2018 10:03:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/420) took 279709 ms. Total solver calls (SAT/UNSAT): 13115(928/12187)
May 25, 2018 10:03:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/420) took 284441 ms. Total solver calls (SAT/UNSAT): 13308(947/12361)
May 25, 2018 10:03:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/420) took 288806 ms. Total solver calls (SAT/UNSAT): 13500(966/12534)
May 25, 2018 10:03:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/420) took 292772 ms. Total solver calls (SAT/UNSAT): 13691(985/12706)
May 25, 2018 10:03:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/420) took 296804 ms. Total solver calls (SAT/UNSAT): 13881(1004/12877)
May 25, 2018 10:03:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/420) took 301168 ms. Total solver calls (SAT/UNSAT): 14070(1023/13047)
May 25, 2018 10:03:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/420) took 305957 ms. Total solver calls (SAT/UNSAT): 14258(1041/13217)
May 25, 2018 10:03:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/420) took 310030 ms. Total solver calls (SAT/UNSAT): 14445(1059/13386)
May 25, 2018 10:03:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=4 took 216628 ms
May 25, 2018 10:03:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/420) took 314502 ms. Total solver calls (SAT/UNSAT): 14631(1077/13554)
May 25, 2018 10:04:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/420) took 318052 ms. Total solver calls (SAT/UNSAT): 14816(1095/13721)
May 25, 2018 10:04:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/420) took 322142 ms. Total solver calls (SAT/UNSAT): 15000(1113/13887)
May 25, 2018 10:04:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/420) took 326418 ms. Total solver calls (SAT/UNSAT): 15183(1131/14052)
May 25, 2018 10:04:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/420) took 329844 ms. Total solver calls (SAT/UNSAT): 15332(1137/14195)
May 25, 2018 10:04:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
May 25, 2018 10:04:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=2 took 207388 ms
May 25, 2018 10:04:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/420) took 333359 ms. Total solver calls (SAT/UNSAT): 15480(1143/14337)
May 25, 2018 10:04:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/420) took 336471 ms. Total solver calls (SAT/UNSAT): 15579(1149/14430)
May 25, 2018 10:04:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/420) took 340770 ms. Total solver calls (SAT/UNSAT): 15678(1155/14523)
May 25, 2018 10:04:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-06
May 25, 2018 10:04:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(SAT) depth K=2 took 9681 ms
May 25, 2018 10:04:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/420) took 344113 ms. Total solver calls (SAT/UNSAT): 15876(1167/14709)
May 25, 2018 10:04:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/420) took 348207 ms. Total solver calls (SAT/UNSAT): 16056(1167/14889)
May 25, 2018 10:04:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/420) took 352386 ms. Total solver calls (SAT/UNSAT): 16235(1196/15039)
May 25, 2018 10:04:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/420) took 356400 ms. Total solver calls (SAT/UNSAT): 16413(1224/15189)
May 25, 2018 10:04:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/420) took 360862 ms. Total solver calls (SAT/UNSAT): 16590(1251/15339)
May 25, 2018 10:04:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/420) took 364700 ms. Total solver calls (SAT/UNSAT): 16766(1277/15489)
May 25, 2018 10:04:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/420) took 369929 ms. Total solver calls (SAT/UNSAT): 16941(1302/15639)
May 25, 2018 10:04:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/420) took 373020 ms. Total solver calls (SAT/UNSAT): 17115(1326/15789)
May 25, 2018 10:05:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/420) took 376664 ms. Total solver calls (SAT/UNSAT): 17460(1349/16111)
May 25, 2018 10:05:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/420) took 380622 ms. Total solver calls (SAT/UNSAT): 17631(1371/16260)
May 25, 2018 10:05:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/420) took 384086 ms. Total solver calls (SAT/UNSAT): 17801(1392/16409)
May 25, 2018 10:05:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/420) took 387364 ms. Total solver calls (SAT/UNSAT): 17970(1412/16558)
May 25, 2018 10:05:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=4 took 75081 ms
May 25, 2018 10:05:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/420) took 390644 ms. Total solver calls (SAT/UNSAT): 18138(1431/16707)
May 25, 2018 10:05:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/420) took 394122 ms. Total solver calls (SAT/UNSAT): 18305(1449/16856)
May 25, 2018 10:05:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/420) took 397448 ms. Total solver calls (SAT/UNSAT): 18471(1449/17022)
May 25, 2018 10:05:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/420) took 403307 ms. Total solver calls (SAT/UNSAT): 18636(1449/17187)
May 25, 2018 10:05:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/420) took 406618 ms. Total solver calls (SAT/UNSAT): 18963(1449/17514)
May 25, 2018 10:05:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/420) took 410332 ms. Total solver calls (SAT/UNSAT): 19286(1449/17837)
May 25, 2018 10:05:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/420) took 415678 ms. Total solver calls (SAT/UNSAT): 19605(1466/18139)
May 25, 2018 10:05:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=4 took 28837 ms
May 25, 2018 10:05:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/420) took 421652 ms. Total solver calls (SAT/UNSAT): 19920(1500/18420)
May 25, 2018 10:05:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(143/420) took 425352 ms. Total solver calls (SAT/UNSAT): 20076(1517/18559)
May 25, 2018 10:05:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/420) took 430809 ms. Total solver calls (SAT/UNSAT): 20385(1551/18834)
May 25, 2018 10:05:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(146/420) took 433975 ms. Total solver calls (SAT/UNSAT): 20538(1568/18970)
May 25, 2018 10:06:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/420) took 437285 ms. Total solver calls (SAT/UNSAT): 20690(1584/19106)
May 25, 2018 10:06:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(148/420) took 440319 ms. Total solver calls (SAT/UNSAT): 20841(1600/19241)
May 25, 2018 10:06:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(150/420) took 445521 ms. Total solver calls (SAT/UNSAT): 21140(1632/19508)
May 25, 2018 10:06:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(151/420) took 448783 ms. Total solver calls (SAT/UNSAT): 21288(1648/19640)
May 25, 2018 10:06:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/420) took 452358 ms. Total solver calls (SAT/UNSAT): 21435(1664/19771)
May 25, 2018 10:06:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/420) took 458994 ms. Total solver calls (SAT/UNSAT): 21726(1695/20031)
May 25, 2018 10:06:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(155/420) took 462428 ms. Total solver calls (SAT/UNSAT): 21870(1710/20160)
May 25, 2018 10:06:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/420) took 467995 ms. Total solver calls (SAT/UNSAT): 22155(1740/20415)
May 25, 2018 10:06:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/420) took 474211 ms. Total solver calls (SAT/UNSAT): 22436(1770/20666)
May 25, 2018 10:06:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(160/420) took 477647 ms. Total solver calls (SAT/UNSAT): 22575(1785/20790)
May 25, 2018 10:06:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/420) took 483722 ms. Total solver calls (SAT/UNSAT): 22850(1813/21037)
May 25, 2018 10:06:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(163/420) took 486890 ms. Total solver calls (SAT/UNSAT): 22986(1827/21159)
May 25, 2018 10:06:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/420) took 490366 ms. Total solver calls (SAT/UNSAT): 23121(1841/21280)
May 25, 2018 10:06:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(165/420) took 493888 ms. Total solver calls (SAT/UNSAT): 23255(1855/21400)
May 25, 2018 10:07:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(167/420) took 499360 ms. Total solver calls (SAT/UNSAT): 23520(1883/21637)
May 25, 2018 10:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-07
May 25, 2018 10:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(SAT) depth K=2 took 160470 ms
May 25, 2018 10:07:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(169/420) took 504495 ms. Total solver calls (SAT/UNSAT): 23781(1909/21872)
May 25, 2018 10:07:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(171/420) took 509589 ms. Total solver calls (SAT/UNSAT): 24038(1935/22103)
May 25, 2018 10:07:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-08
May 25, 2018 10:07:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(SAT) depth K=2 took 8040 ms
May 25, 2018 10:07:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(173/420) took 512712 ms. Total solver calls (SAT/UNSAT): 24291(1961/22330)
May 25, 2018 10:07:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(175/420) took 517718 ms. Total solver calls (SAT/UNSAT): 24540(1986/22554)
May 25, 2018 10:07:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/420) took 522880 ms. Total solver calls (SAT/UNSAT): 24785(2010/22775)
May 25, 2018 10:07:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(179/420) took 527342 ms. Total solver calls (SAT/UNSAT): 25026(2034/22992)
May 25, 2018 10:07:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(183/420) took 530902 ms. Total solver calls (SAT/UNSAT): 25412(2058/23354)
May 25, 2018 10:07:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(186/420) took 534220 ms. Total solver calls (SAT/UNSAT): 25628(2058/23570)
May 25, 2018 10:07:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(UNSAT) depth K=4 took 120005 ms
May 25, 2018 10:07:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(190/420) took 538493 ms. Total solver calls (SAT/UNSAT): 25902(2074/23828)
May 25, 2018 10:07:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(192/420) took 541637 ms. Total solver calls (SAT/UNSAT): 26033(2084/23949)
May 25, 2018 10:07:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-09
May 25, 2018 10:07:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(SAT) depth K=2 took 34058 ms
May 25, 2018 10:07:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(196/420) took 545917 ms. Total solver calls (SAT/UNSAT): 26283(2103/24180)
May 25, 2018 10:07:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(199/420) took 550330 ms. Total solver calls (SAT/UNSAT): 26460(2115/24345)
May 25, 2018 10:07:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/420) took 554258 ms. Total solver calls (SAT/UNSAT): 26628(2127/24501)
May 25, 2018 10:08:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(207/420) took 558038 ms. Total solver calls (SAT/UNSAT): 26888(2142/24746)
May 25, 2018 10:08:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(210/420) took 561448 ms. Total solver calls (SAT/UNSAT): 27032(2150/24882)
May 25, 2018 10:08:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=4 took 26307 ms
May 25, 2018 10:08:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(213/420) took 564485 ms. Total solver calls (SAT/UNSAT): 27167(2156/25011)
May 25, 2018 10:08:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-13
May 25, 2018 10:08:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(SAT) depth K=2 took 20058 ms
May 25, 2018 10:08:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(217/420) took 568017 ms. Total solver calls (SAT/UNSAT): 27333(2163/25170)
May 25, 2018 10:08:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(223/420) took 571280 ms. Total solver calls (SAT/UNSAT): 27552(2169/25383)
May 25, 2018 10:08:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(229/420) took 574761 ms. Total solver calls (SAT/UNSAT): 27747(2181/25566)
May 25, 2018 10:08:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(236/420) took 577932 ms. Total solver calls (SAT/UNSAT): 27975(2205/25770)
May 25, 2018 10:08:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(246/420) took 580974 ms. Total solver calls (SAT/UNSAT): 28243(2205/26038)
May 25, 2018 10:08:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=4 took 20240 ms
May 25, 2018 10:08:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(254/420) took 584455 ms. Total solver calls (SAT/UNSAT): 28471(2225/26246)
May 25, 2018 10:08:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(260/420) took 588043 ms. Total solver calls (SAT/UNSAT): 28636(2265/26371)
May 25, 2018 10:08:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(266/420) took 591457 ms. Total solver calls (SAT/UNSAT): 28793(2299/26494)
May 25, 2018 10:08:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/420) took 594644 ms. Total solver calls (SAT/UNSAT): 28921(2333/26588)
May 25, 2018 10:08:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(281/420) took 597851 ms. Total solver calls (SAT/UNSAT): 29170(2376/26794)
May 25, 2018 10:08:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(290/420) took 601022 ms. Total solver calls (SAT/UNSAT): 29381(2410/26971)
May 25, 2018 10:08:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(301/420) took 604519 ms. Total solver calls (SAT/UNSAT): 29661(2415/27246)
May 25, 2018 10:08:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(304/420) took 607847 ms. Total solver calls (SAT/UNSAT): 29955(2415/27540)
May 25, 2018 10:08:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=4 took 25542 ms
May 25, 2018 10:08:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(307/420) took 611366 ms. Total solver calls (SAT/UNSAT): 30240(2427/27813)
May 25, 2018 10:09:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(309/420) took 615450 ms. Total solver calls (SAT/UNSAT): 30425(2449/27976)
May 25, 2018 10:09:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(311/420) took 618894 ms. Total solver calls (SAT/UNSAT): 30606(2471/28135)
May 25, 2018 10:09:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(315/420) took 621904 ms. Total solver calls (SAT/UNSAT): 30956(2514/28442)
May 25, 2018 10:09:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(317/420) took 626162 ms. Total solver calls (SAT/UNSAT): 31125(2534/28591)
May 25, 2018 10:09:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/420) took 629937 ms. Total solver calls (SAT/UNSAT): 31290(2554/28736)
May 25, 2018 10:09:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(321/420) took 633711 ms. Total solver calls (SAT/UNSAT): 31451(2574/28877)
May 25, 2018 10:09:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(323/420) took 637345 ms. Total solver calls (SAT/UNSAT): 31608(2592/29016)
May 25, 2018 10:09:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(326/420) took 641531 ms. Total solver calls (SAT/UNSAT): 31836(2619/29217)
May 25, 2018 10:09:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(328/420) took 644754 ms. Total solver calls (SAT/UNSAT): 31983(2637/29346)
May 25, 2018 10:09:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(333/420) took 647906 ms. Total solver calls (SAT/UNSAT): 32333(2677/29656)
May 25, 2018 10:09:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(339/420) took 651144 ms. Total solver calls (SAT/UNSAT): 32720(2721/29999)
May 25, 2018 10:09:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(344/420) took 654248 ms. Total solver calls (SAT/UNSAT): 33015(2748/30267)
May 25, 2018 10:09:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(349/420) took 658208 ms. Total solver calls (SAT/UNSAT): 33285(2778/30507)
May 25, 2018 10:09:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(360/420) took 661232 ms. Total solver calls (SAT/UNSAT): 33563(2778/30785)
May 25, 2018 10:09:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(366/420) took 664532 ms. Total solver calls (SAT/UNSAT): 33824(2793/31031)
May 25, 2018 10:09:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(373/420) took 667831 ms. Total solver calls (SAT/UNSAT): 34083(2825/31258)
May 25, 2018 10:09:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(385/420) took 670927 ms. Total solver calls (SAT/UNSAT): 34413(2864/31549)
May 25, 2018 10:09:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 673522 ms. Total solver calls (SAT/UNSAT): 34650(2883/31767)
May 25, 2018 10:09:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 420 transitions.
May 25, 2018 10:09:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 69 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 10:09:58 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 736032ms conformant to PINS in folder :/home/mcc/execution
May 25, 2018 10:11:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
May 25, 2018 10:11:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=3 took 190898 ms
May 25, 2018 10:12:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=5 took 197545 ms
May 25, 2018 10:14:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-01
May 25, 2018 10:14:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(SAT) depth K=3 took 186028 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 10:20:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
May 25, 2018 10:20:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=3 took 358180 ms
May 25, 2018 10:23:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-06
May 25, 2018 10:23:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(SAT) depth K=3 took 211762 ms
May 25, 2018 10:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=5 took 714151 ms
May 25, 2018 10:26:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=5 took 160622 ms
May 25, 2018 10:28:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=5 took 113578 ms
May 25, 2018 10:33:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(UNSAT) depth K=5 took 300107 ms
May 25, 2018 10:34:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-07
May 25, 2018 10:34:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-07(SAT) depth K=3 took 617598 ms
May 25, 2018 10:35:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-08
May 25, 2018 10:35:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(SAT) depth K=3 took 63159 ms
May 25, 2018 10:35:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-09
May 25, 2018 10:35:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(SAT) depth K=3 took 3091 ms
May 25, 2018 10:35:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=5 took 122027 ms
May 25, 2018 10:37:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=5 took 79610 ms
May 25, 2018 10:37:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-13
May 25, 2018 10:37:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(SAT) depth K=3 took 116908 ms
May 25, 2018 10:38:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=5 took 76632 ms
May 25, 2018 10:44:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
May 25, 2018 10:44:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=4 took 450909 ms
May 25, 2018 10:47:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 25, 2018 10:47:50 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 10:47:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying LamportFastMutEx-PT-6-ReachabilityCardinality-00 SMT depth 6
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 25, 2018 10:47:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 6
May 25, 2018 10:47:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 6
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 10:47:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying LamportFastMutEx-PT-6-ReachabilityCardinality-07 K-induction depth 4
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 25, 2018 10:47:50 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 8/ 16 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-6"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-6.tgz
mv LamportFastMutEx-PT-6 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is LamportFastMutEx-PT-6, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666476600138"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;